Michael

The "text book" standard that is

1    signal
2    gnd
3    signal
4    gnd
5    pwr
6    signal
7    pwr
8    signal

thou never actually using 8 layers this is all i can give you. Hope it helps.

Nathan

BTW the reference is PCB design techniques for emc compliance by mark montrose. 2nd Edition


Michael Biggs wrote:


Anyone have a preferred method of stackup guidelines of web references to
layer stackups for 8 layers using four power planes and four signal layers?
I am torn between two methods being that I have two internal power planes.
Thanks for any help!
Also I have a couple of BGA's on this layout and when I run (using
Protel99SE) my DRC everything is great other than the "dogbones" I had to
route to the via on all the unused pins of the BGA. Any way to create rules
for this so I do not get violations during DRC?
Thanks again!

MichaelB




--
Nathan Horsfield Inspiration Technology P/L Ph: +61 8 8211 9668
Fax: +61 8 8211 9658 www.instech.com.au






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