I'd probably do it this way (top to bottom):

sig
gnd1
pwr1
sig
sig
gnd2
pwr2
sig

Assumptions:  your highest-speed parts are on the top side.  gnd1 and pwr1
are your main power rails for the highest-speed parts.

Whatever you do, keep each gnd plane and it's matching pwr plane adjacent to
each other - the distributed capacitance of this arrangement helps in
decoupling the supply rails.  This is in addition to your decoupling caps,
not to replace them.

I don't have anything to say about the dogbones.  I'm still using cat
treats...

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com


----- Original Message -----
From: "Michael Biggs" <[EMAIL PROTECTED]>
To: "'Protel EDA Forum'" <[EMAIL PROTECTED]>
Sent: Monday, June 02, 2003 4:20 PM
Subject: [PEDA] eight-layer stackup


> Anyone have a preferred method of stackup guidelines of web references to
> layer stackups for 8 layers using four power planes and four signal
layers?
> I am torn between two methods being that I have two internal power planes.
> Thanks for any help!
>  Also I have a couple of BGA's on this layout and when I run (using
> Protel99SE) my DRC everything is great other than the "dogbones" I had to
> route to the via on all the unused pins of the BGA. Any way to create
rules
> for this so I do not get violations during DRC?
> Thanks again!
>
> MichaelB




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