(2009.07.30) kirk...@pdx.edu:
> While investigating some analog to digital converters for an IMU
> project I'm working on, I settled on a TI ADS1278. One reason for
> using this ADC is that it has such fine resolution that I may be
> able to eliminate the amplifiers on the input for most inertial
> sensors! This ADC has impressive specs, but I'm a bit concerned
> about the integral non-linearity (INL) spec. In a previous IMU
> design, I've seen the result of this parameter when it is too high,
> and the symptom is a bit nasty.
> The ADS1278 spec shows INL as (,0.0003,0.0012)% FSR, where FSR =
> 2Vref. I'm not sure if this is 2 *times* Vref, or if Vref is
> 2*Volts* in this measurement. To avoid figuring this out right now,
> I'll speak in terms of bits, which is what I am concerned with
> anyway.

Typically that would be 2 * (Vref), and Vref would be ~2.5 V, so
fullscale would be ~5 V. I did look at the datasheet, and i think this
is the situation for the ADS1278. If you ever find a 24 ADC that retains
24 bits at <= 3V please let me know.

> FSR = 2^24 bits (24 bit adc), so that means that the INL is
> 0.000003*2^24 = 50. since 50 is close to 2^6, that means we are
> (typically) giving up the lowest 6 bits of the converter to INL.
> This still leaves 18 bits of converter range, but only if the
> application is designed so that the sensors rail out near the full
> voltage of the converter. Making this happen may require an input
> amplifier. Worst case, INL is 0.000012*2^24 = 201, ~ 8 bits, leaving
> me with a 16 bit ADC. Again, if I leave out the amplifier, I could
> wind up with 12-14 bit conversion, which is hardly worth the effort
> of placing this part.

24 bit converters are not a slam-dunk win in all cases.

> On to my question: Tim and I discussed this, and he mentioned that
> the INL could be calibrated out. After some thought, I don't think
> this is possible. I thought problem with INL is that the output may
> show a particular bit pattern for more than one input voltage. Could
> someone (maybe Tim?) explain how this works and how we can calibrate
> this out? Secondly, has anyone actually done this? What was it for?

INL is a quasi-DC measurement. Theoretically it would be measured by
feeding the ADC with a series of known voltages while holding things
like temperature and supply voltages constant. The data gathered is
plotted as ADC-measured voltage versus real voltage, a best fit line is
found and the maximum voltage difference between the best fit line and
the measured voltage divided by the full scale voltage is reported as
the INL.

I'm not sure that the INL on a 24 bit converter is actually measured
this way however, because i'm not sure that sufficiently accurate
sweepable voltage sources exist at practical price points, but that's a
side issue.

In principle INL could be completely calibrated out if all input
voltages were checked at all temperatures and supply voltages and the
device did not age. This is of course impractical. But it is practical
to do a series of measurements and calculate a 2nd or 3rd order
non-linearity correction.


  Understanding Linearity and Monotonicity
    Defines INL

  Delta Sigma ADC Bridge Measurement Techniques
    Example of effective bit number calculations (ENOB)

  Getting the Most out of Delta-Sigma Converters
    Short paper on ENOB calculations

  Accurate and Repeatable bits versus Actual bits of ADCs
    A little more depth on ENOB calculations

  An Efficient Linearity Test for On-chip High Speed ADC and DAC Using Loop-back
    Method of measuring an correcting INL errors (requires DAC)

  A Maximum Likelihood Estimator for ADC and DAC Linearity Testing
     Same as chun, but better math

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