Re: Problems connecting XDS560R JTAG

I am glad to see you found it !! Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: Problems connecting XDS560R JTAG

Also, if you want to use xds560r to debug dsp, you may need to 'wakeup' the dsp using the arm. Regards ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: Problems connecting XDS560R JTAG

Connecting the emulator is a bit triky and needs you to do several things in a certain order to work properly. I don't remember that order, but it was something like: first swich on the board, then connect the emulator, then open CCS, then ... If you do that things in a different order then

Re: HD MPEG-4 SP

We don't mind if the output is just sd, but our input would be 720p Do you know if is it possible to provide a 720p input to TMS320DM355's H.264 decoder (although its output will be sp) ? Thank you, Carlos ___ Davinci-linux-open-source mailing list

Re: DVEVM analog RGB + SYNC?

Digital output on DC5 is NOT implemented. You have to write the proper settings to Davinci registers by yourself Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: DVEVM no digital video output (DC5)

Digital output on DC5 is NOT implemented. You have to write the proper settings to Davinci registers by yourself. Also note that those values will depend on which screen you are attaching to DC5 Carlos ___ Davinci-linux-open-source mailing list

Re: DVEVM no digital video output (DC5)

Maybe you don't have the undocumented DCLKCTL and DCLKPTN0 registers set properly. They are crucial for generating correct clock to the display. Try 0x800 for DCLKCTL and 0x1 for DCLKPTN0. Cheers ___ Davinci-linux-open-source mailing list

Re: HD MPEG-4 SP

Thank you, Brad. We are wondering if it is possible (using a DM355) to decode a MPEG-4 from a DVBS signal. It does not matter if the output resolution is about 780p, but it should decode up to 1080i. Many thanks, Carlos ___ Davinci-linux-open-source

Re: HD MPEG-4 SP

Thanks, Brad. There is something I don't understand yet. So, to decode MPEG4 we can choose : 1.- TMS320DM644x + MPEG4 codec (front fee $20,000 + $.67 per unit @ 10 KU) or 2.- TMS320DM355 + free MPEG4 codec ($0) How is that? Thanks, Carlos ___

HD MPEG-4 SP

Where could I find TI's HD MPEG-4 SP features and price? Many thanks, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: VICP

VICP provides performance boost on Video Encode applications. TI gives access to the VICP only to their Authorized Software Providers (ASPs) or via their multimedia codecs. Carlos ___ Davinci-linux-open-source mailing list

Re: New UBL source and DVFlasher App on DVEVM update site

I am getting the same result. I am able to download other resources (for example 090s_o_win50ce_sdk_dm644x_3_1.zip) but I can't download dvflasher_1_11.tar Regards, Carlos ___ Davinci-linux-open-source mailing list

Re: New UBL source and DVFlasher App on DVEVM update site

I can't download the newest version of the UBL source. Anyone is getting the same error as me while attempting to download? : The page cannot be found The page you are looking for might have been removed, had its name changed, or is temporarily unavailable. Please try the following: If

Re: video out

Try to use something like 'video=dm64xxfb:output=pal:format=component' on your bootargs Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: How to power on the VPSS and VPBE modules from the ARM side in u-boot?

Look for davinci_psc_all_enable function at board/davinci/davinci.c Cheers Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: Preview Engine / Codecs

The actual pdf (sprue38a.pdf, june 2006) does not contain any documentation about preview registers, but the old one does (sprue38.pdf, december 2005) Regards, Carlos ___ Davinci-linux-open-source mailing list

Re: how to create .x64p files

The .x64p file is the .out file Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: u-boot-594 on nand can not work

1. Does anyone have sources for the first bootloader in NAND (the max 14 kB loader)? We only have a .bin file. I am also interested in that TI's max 14kb first bootloader (UBL) 2. Does anyone know the proper U-boot configuration for NAND flash booting? Undefine CFG_ENV_IS_IN_FLASH at

Re: External I2C device error

tvp5146 on DVEVM has also 0x5D address (Although on DaVinci documentation you would find 0x56 as tvp5146 address, 0x5D is actually the right one) Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: u-boot POST

Um, maybe POST is not done yet for DaVinci u-boot ... Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Developing CODECs for DaVinci

Hello: Is anybody out there developing CODECs for DaVinci processors? It seems that VICP coproccessor is somewhat restricted and used only by Texas CODECs (avaliable at a very high price). Did someone try to develop a CODEC even without using VICP coprocessor? Is it possible to get information

Re: Allocate more memory in DDR

Did you try to use fbset command? in /etc/fb.modes you may have several resolutions you can choose by using the fbset command like : fbset -fb /dev/fb/3 640x480-60 (the example is for the video window) Regards, Carlos ___ Davinci-linux-open-source

Re: build cross-compiler for davinci myself

What do you mean? Do you want to cross-compile an application for davinci on your computer? Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: re-flash the linux kernel on NOR flash

I erase all the data in NOR flash when I update the u-boot. The Linux kernel in the NOR flash is erased, too. How can I re-flash the Linux kernel into NOR flash ? Sorry that was to write the kernel to NAND flash ! To write your kernel to NOR I think you could load it via tftp

Re: CCS ERROR

Does .bss belong to BIOS CODE section? None of BIOS CODE sections can be stored in DDR2 (just a thought) Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: CCS ERROR

Sorry I think I was wrong, BIOS CODE sections can be in DDR2. The sections that can't be in DDR2 are BIOS DATA ones, that includes .stack Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: Frame buffer memory organization

I don't know if it is related to your problem, but I think you have 2 bytes per pixel (try to adjust OSDWIN0XL, etc to (num_pixels*2)) Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: Issue regarding USB support

Do you compile without errors when you uncheck your USB options? (just to dismiss things like environment variables, links, and so on) Thanks, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: Issue regarding USB support

When i'm trying to compile the kernel with the new configuration, it's showing so many errors. I didn't have errors. Please, post the errors you have. Regards, Carlos ___ Davinci-linux-open-source mailing list

Re: ***SPAM*** Score/Req: 09.40/05.00 - Fwd: Is Code Engine necessary

Where could we find that TI BIOS LINK ? Thanks, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: Is it tested? RE: Anybody using UART1, UART2 ? (solved)

I would ask for the procedure to enable UART1 I add port-line number at serial.c Do you mean to change this line at ./arch/mips/vr41xx/common/serial.c?: int vr41xx_serial_ports = 0; In my kernel tree I have these 'serial.c': $ find -name serial.c ./arch/mips/vr4181/common/serial.c

Re: Re: Best way to get data from a fpga?

Though we don't have a driver available, VLYNQ may be an option worth looking at. Thank you Thom. Do you know where could I find more information about VLYNQ protocol in order to implement it on fpga side? (sprue36 is not very thorough) Many thanks, Carlos

Re: Booting problem on Davinci EVM

Any ideas from on how to debug this and to confirm UART on board is good/bad are appreciated. To see if UART on board is bad, you could configure S3 to boot from UART. When you power on your DVEVM you must see the messages BOOTME BOOTME Regards, Carlos

Re: Best way to get data from a fpga?

Hello. Many thanks for your replies! We want to transmit about 4kbytes periodically from fpga to davinci (unidireccional data operation) using 16 data lines if possible, at a maximum data rate of 20 Mbytes/sec (peak) Data is buffered on fpga side and we also need a 'control path' (through the

Re: Requesting UART Boot basic knowledge

Then tried l (load into memory). Then there was no response. As if the console was hung. I think I now need to send u-boot.bin. how should I send this ? As a ASCII TEXT ? No, you should send 'l' + Load address + data length + start address + u-boot (u-boot in binary form) Note that you should

Best way to get data from a fpga?

Hello We want to get data from a fpga and I we are looking for the best 'port' to attach our fpga. EMIF, ATA interface... what do you think is the best way ? Thanks! Carlos ___ Davinci-linux-open-source mailing list

Re: Accesing dsp's memory (ddr2)

Using the below I can Read/Write ARM/DSP DDR memory using Physical addresses, load and execute programs in the DSP etc. (maps entire 256MB)... int fd; void *map; if ((fd=open(/dev/mem,O_RDWR|O_SYNC))==-1) exit(1); map=mmap((void

Re: Best way to get data from a fpga?

The best way I think is to use vpfe by using CCD raw data mode:) I am sorry, I forgot to say that we need vpfe to capture video... Thanks, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

SOLVED ! : OSD shifted when executing code on DSP

Accorging to DDR2 Memory Controller User's Guide (SPRUE22B), the peripheral bus burst priority register (PBBPR) helps prevent command starvation within the DDR2 memory controller. To avoid command starvation, the DDR2 memory controller momentarily raises the priority of the oldest command in the

Re: OSD shifted when executing code on DSP

The OSD appears shifted for just a frame time and then goes back. It seems to occur most often when I am moving data with memcpy. That is exactly what I see if I do a memcpy on the dsp (if I don't do the change to PBBPR register) I am at a loss as to what to do next! Try to change the

Re: OSD shifted when executing code on DSP

Hello ! Thank you very much for your reply. May be some bandwidth issue or bus sharing Is that a big single memcpy() ? If yes, can you try looping around smaller shots ? I changed my dsp's program to be only the following lines: while (1) { for (m=0; mlongFFT; m++) {

Re: OSD shifted when executing code on DSP

(I am using rgb888 mode) ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: OSD shifted when executing code on DSP

Could this problem be becouse of Advisory 1.1.6 on sprz241d.pdf (silicon errata) that stands: DDR2: Multiple Master Access to the DDR2 at the Same Time may Cause Master to Stop. Revision(s) Affected: 1.1 How could I know my silicon revision? How could I know DSP, ARM, VCLK and MCLK clock rates?

Re: OSD shifted when executing code on DSP

The effect appears even if I don't execute any program on the arm. (it happens only on the LCD attached to DC5 and specially when the DSP do some memcpy) The 'shift' on the OSD is not always the whole screen... Many thanks, Carlos ___

Re: SPI issue

Btw, do you know why there is no SPI driver in MV by default? As I know there is some complex SPI infrastructure which is not ready yet... Do you know where can find more information on this (assuming I'd like to share my driver with the rest of community [but I need to talk to my boss first])?

Re: Mouse via USB

Did you set J7 to host position? How many devices are you connecting to your USB? Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: SPI issue

I finally tried to setup SPI according to data sheet (SPRUE32) but I think data sheet is wrong. It states (see below) that configuration should be done while in reset mode (SPIGCR0: RESET bit). But it doesn't work. I agree and I also saw that behaviour. I write a 0x0001 to SPIGCR0 (spi out

Re: SPI issue

Did you write your SPI driver yourself? Maybe SPIFMT0 or SPIDELAY are not properly configured. Where are you configuring SPI registers? Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: SPI issue

SPIDELAY |= (0xF 24); // maximum setup time SPIDELAY |= (0xF 16); // maximum hold time I am using 0 for these two. 3) Do you know maybe TI supplies examples for SPI controller which shows how to communicate with SPI slave (SPI EEPROM or smth like this)? I need to hold CS active during data

Re: ### Davinci UBL

Rudy did. Look for his 27-Sep post Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

Re: input data through 'video in' port (DC4)

We got it !! It was necessary to transmit the two fields and their corresponding blanking periods. Thank you and regards! Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: input data through 'video in' port (DC4)

What mode have you configured the VPFE in? This behavior that you are observing sounds like the VPFE is in BT.656 mode where only the clock and data lines are used and the VSYNC and HSYNC are encoded in the data stream. That's right. I tried to change the registers to use raw mode

u-boot splash screen

Some customers expect to 'see something' just after power on. Becouse of that I am modifying davinci's u-boot-594 to get a splash screen. I archieved in making u-boot showing the 'color bars' on my screen (LCD) Now, I want to see an image, so I changed u-boot to configure all VPBE registers

Re: u-boot splash screen

I saw in sprue37, page 39, figure 22 the signal: venc_sclk_osd What register should I use to change venc_sclk_osd? Could it be my problem? ('Setting Up Clocks for DM420 OSD' was not the problem) Thanks and regards, Carlos ___ Davinci-linux-open-source

How to generate c code from a image?

Hello I want to change the logo that appears when loading montavista linux. To make that, I should modify drivers/video/logo/logo_linux_clut224.c and compile the kernel, but I don't know how to generate logo_linux_clut224.c from an image Anybody knows? Thanks, Carlos

Re: Minimal Configuration

Can anyone advise on how to make the kernel boot log be more verbose. Im getting the system hanging just before the usual time when the console login appears. Just a short in the dark: Did you change /etc permissions? Carlos ___

Re: VLYNQ protocol specification

So: Should I assume VLYNQ is 'propietary' and there is no specification avaliable out there? Thanks and regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: VLYNQ REVID address?

The VLYNQ peripheral has consumes 2 memory regions within the DM6446 memory map, the control registers at base address 0x01e0 and the memory window to access the remote devices' memory map at base address 0x0c00. That was it! Thank you!

Re: Minimal Configuration

I have started with a minimal bin,dev,etc,lib type structure, but the Kernel Panics! I think at least sbin directory is also necessary Regards, Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

uboot splash screen

Does somebody know if davinci's uboot is capable of displaying a splash screen? I modified include/configs/davinci.h to add 'bmp' command (adding CFG_CMD_BMP to the list of CONFIG_COMMANDS) but I get an error when uboot compiles: make[1]: *** [.depend] Error 1 make[1]: Leaving directory

Re: uboot splash screen

I thought those boot splash (i.e. the montavista logo) were hardcoded in arrays in one of the header files? Do you know in wich file ismontavista's logo hardcoded? (I will need to modify it in the future) For now I want also uboot's splash screen becouse it would show very shortly after power

VLYNQ REVID address?

Hello! VLYNQ REVID register does not appear on sprue14.pdf. I think it could be 0x0C00 but according to sprue14.pdf 0x0C00 address is 'Reserved'. At what address VLYNQ REVID is located? By the way I tried to monitor VLYNQ activity on DVEVM's R17 (VLYNQ_CLK) but I could only see the

Re: USB problems

In 'USB HID devices' thread (24 August) David Brownell said: The basic issue is that the 2.6.10 driver version only supports two periodic endpoints. The hub takes one, the mouse takes the second ... nothing left for a keyboard. I don't know if that issue is fixed in the last kernel. Regards,

Re: Problem writing to SPI registers

Finally I archieved to configure SPI registers. It was neccesary to 'power up' SPI module with this sequence: 1.- Wait until PTSTAT is 0 2.- Set enable state in MDCTL22 (SPI) 3.- Set 'GO' bit in PTCMD 4.- Wait until PTSTAT is 0 Now I think my registers are properly configured, but I still can't

Problem writing to SPI registers

I am seeing a weird behaviour when I write to SPI registers. They seem to hold their value only for a short period of time, and then they go to 0x00. With this code: #define SPIGCR0 0x01C66800 *(int *__iomem) IO_ADDRESS(SPIGCR0) |= 0x0001; printk (SPIGCR0 %X\n, *(int

Re: Writing UBL and UBOOT in NAND

Hello! If you are using the ubl_nand.bin that we provide (or maybe got from spectrum digital) then you will need to set your start address to 0x100(or 0x120 to be more exact). Your memory dumps look good though. Keep me advised. There may be a CRC problem as Hiroshi said : So the ubl

Re: Writing UBL and UBOOT in NAND

Hello! Daniel will let us know the correct behavior of RBL, but I think you need to modify u-boot in order to write ubl using u-boot's nand command. RBL (and ubl_nand) requires CRC generated by DaVinci's hardware, but its algorithm is different from the one implemented in u-boot. So the ubl

Re: Use the arm_v5t_le-gcc on davinci EVM

2, Added follows to Makefile: ARCH = $ARCH CROSS_COMPILE = $CROSS_COMPILE export ARCH CROSS_COMPILE I can compile the kernel and modules without any change to the Makefile... Why did you add that lines? Regards, Carlos

Re: Writing UBL and UBOOT in NAND

Um, I wrote u-boot-567-nand.bin (and the header) as I did with ubl_nand.bin. The header starting at 0x18000 and u-boot-567-nand.bin starting at 0x18200, but I get : Booting PSP Boot Loader Starting NAND Copy NAND Boot failed. Starting UART BOOTPSP BOOTPSP Could I have an error on the header?

Re: UART UBL

Can the User Boot Loader (UBL) be used to upload UBOOT, thus allowing the user to restore UBOOT to flash? Yes, load Rudy's UBL via uart. Then using Rudy's UBL load uboot. Once you have uboot, you could write the uboot you have in memory to nor flash using 'cp.b' command. Regards, Carlos

Re: UART UBL

I have written the equivalent in Linux and it appears to download correctly, I get the 'DONE' Suggesting DaVinci has used downloaded the the UBL but then it just starts again with the 'BOOTME'. What are you sending as your header? I send ACK 0BB80100 Are you sending your

Re: Writing UBL and UBOOT in NAND

Reading the ubl descriptor and the fist bytes of ubl_nand.bin stored in NAND I think see everthing ok... I am puzzled : DaVinci EVM # nand read 0x8070 0x4000 0x4000 NAND read: device 0 offset 16384, size 16384 ... 16384 bytes read: OK DaVinci EVM # md 0x8070 8070: 00edaca1 2000

Re: problem loading new kernel into RAM via tftp

Emm sorry, I meant: Since you have a bad file name, try to set the 'bootfile' environment variable before 'dhcp' command: DaVinci EVM # setenv bootfile uImage ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com

Re: problem loading new kernel into RAM via tftp

TFTP from server 192.168.100.70; our IP address is 192.168.100.64 Filename '#65533;'. Load address: 0x8070 Loading: * TFTP error: 'File not found' (1) Starting again As you has a bad file name, try to set the bootfile environment variable before 'dhcp' command: DaVinci EVM # setenv

Re: erasing nand using u-boot

The version of u-boot that I'm using has the commands: nand erase offset length nand write address offset length That was it ! 'nand erase' and 'nand write' instead of 'erase' and 'cp.b' Thank you so much! Regards, Carlos ___ Davinci-linux-open-source

Writing UBL and UBOOT in NAND

Hello, Thank you all for your kind replies. I wish to ask if I am doing something wrong, since my DVEVM doesn't boot from nand yet: 1.- To use the NAND to boot, I put S3 positions 1 and 0 to 00. I also put J4 in NAND. 2.- I made a UBL descriptor in a hex editor, sent it to uboot using tftp and

Re: UART UBL

Hello! I loaded u-boot-567-nand.bin using Rudy's UBL and executed. Now I have some doubts about writing ubl_nand.bin and u-boot-567-nand.bin into nand. I loaded ubl_nand.bin through tftp to memory: DaVinci EVM # tftp TFTP from server 192.168.1.34; our IP address is 192.168.1.33 Filename

NAND and NOR addresses

Hello list: When you have S3 in 10 position and J4 in NAND position, it isn't harmful for NOR to write to addresses - 0001 since that addresses correspond now to NAND flash and NOT to NOR flash. Is this correct? (I don't want to overwrite my NOR uboot) Thank you, Carlos

Re: Is there any FAQ of the Davinci-linux?

Thank you very much! And is there any more froum talking about te davinci-linux? Andy Ye created one QQ Davinci discussing group, Group number is 30456209. Regards, Carlos ___ Davinci-linux-open-source mailing list

Re: UART UBL

Thanks!.. Now my uart boot works.. I am trying it and I get the last DONE message from Davinci, but thats all, I don't get the Rboot- (nor anything). Should I send UBL binary file least significant byte first? Thanks, Carlos ___

Re: UART UBL

For send UBL binary file least significant byte first I mean, If a word is 77073096... should I send 96 30 07 77 (and in ASCII HEX)? or 77 07 30 96 (ASCII HEX)? Thanks and regards, Carlos ___ Davinci-linux-open-source mailing list

Re: Connecting an LCD Display to Davinci

Vsync are toggling correctly but I can't get VCLK to toggle. I think your VCLK problem could happen if you are using RGB666 mode. RGB666 mode is not working. Use instead a LCD888 mode and don't connect 2 LSB singals for each color component. Maybe the DCLK is not setup (No documenation) or

Re: UART UBL

Hello Rudy, Thank you so much for this invaluable contribution! Carlos ___ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source

DVEVM updates: 1.10 only

Hello: I tried to download DVEVM 1.10 and 1.00 cd's from ti but... if you try to download v1.00 cd's you will download v1.10 !! For example, if you try to downloadmvl_setuplinux_1_00_00_32.bin, you will get mvl_setuplinux_1_10_00_30.bin instead !! Regards, Carlos

Can't draw in white

I am using DirectFB-0.9.22 to draw some graphics on davinci's /dev/fb/0. Everything is fine when I use the analog output to see the screen on the Color TFT that comes with DVEVM. Recently I attached a LCD and I see this effect on the LCD: If I draw my graphics in WHITE (or using a color close to

Re: how to upload DSP programs from ARM to DSP and start them the re

There may be others that may better satisfy your particular use case - others on the list, feel free to jump in. Does your script processing thread need to communicate with a particular codec Probably not. But the DSP thread should be a non-blocking task, means it's initially started and

Undocummented registers

Anybody knows where can I find information about these 'undocummented' registers? : 0x01C4 0044VPSS_CLKCTL (VPSS clock control) 0x01C4 0D18(PLL2CTL ??) 0x01C7 2614?? 0x01C7 2464DCLKCTL 0x01C7 2468DCLKPTN0 0x01C7 246C ??DCLKPTN1 0x01C7 2470 ??

Re: transparency

If you need to see the transparency, you need to choose the value of the color in RGB for which you need the transparency effect (which in turn takes the blending ratio from the register (OSDWIN0MD.BLND0)( make sure it is any other value than 0 or 7 to achieve blending. For a value of 0 you

Re: about boot from tftp server

BOOTP broadcast 1 DHCP clieant broundto address 192.168.3.101 TFTP from server 192.168.3.1:our IP address is 192.168.3.101 Filename 'tftpboot/uImage' Load address:0x8070 Loading... TFTP error: File not found (1) Starting again If you are exporting 'tftpboot' directory, use setenv bootfile

Re: error with davinci_vpfe as module

Is it possible to load an updated kernel like 2.6.18? are they supported by TI Davinci or rather by Montavista? You could find the last kernel in http://source.mvista.com/git/ I didn't try that kernel. Comments from people on this list about this kernel are welcome ! In

Re: Linux serial driver problem ....

while trying to manipulate the serial port - i got some errors root@(none):/mnt/fileSys/appl# stty -F /dev/ttyS0 115200 cs8 -parenb -cstopb stty: /dev/ttyS0: Inappropriate ioctl for device does anyone have any idea why that may happen ... Don't know, but: Could it be becouse of ttyS0 is in

Re: Who can tell me the ubl_nand.bin's source code or it's download-URL?

I have downloaded the second stage bootloader source code(uboot_bl2_MontaVista_tar.gz) and made it for both Nor and Nand,and boot Linux successfuly.I want to know how to get and make the ubl_nand.bin (14 KB first stage boot-loader) and where is the download-URL for ubl_nand.bin source code?

Re: Connecting a LCD

Currently the LCD configuration is not supported on the VPBE driver. So format=rgb will not work. I saw in .../drivers/video/davincifb.c that format=component is supported (dm64xxfb_pal_component_config function) I try with format=component but still have no signal on DC5. Shouldn't be HSYNC

Re: Connecting a LCD

For Component and for all analog outputs you will see the proper signals at the 4 DACs (DAC_IOUTA - D). In case of component, you will see that the three DACs carry the Y, Cr and Cb signals, with Y containing the sync signals. Right, I see the signals there. I will try to write a new function

Re: Connecting a LCD

Currently the LCD configuration is not supported on the VPBE driver. So format=rgb will not work. Thank you Hadli! So: Should I find the proper configuration in VPBE registers to get video in DC5? Any clue? Thanks! Carlos ___