https://bugzilla.kernel.org/show_bug.cgi?id=205089
MasterCATZ (masterc...@hotmail.com) changed:
What|Removed |Added
CC|
GuC error capture blurts some debug messages about empty
register lists for certain register types on engines during
firmware initialization.
These are not errors or warnings, so get rid of them.
Signed-off-by: Alan Previn
---
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 77
This series remove unnecessary GuC err capture noise.
Alan Previn (1):
drm/i915/guc: Remove unnecessary GuC err capture noise
.../gpu/drm/i915/gt/uc/intel_guc_capture.c| 77 +--
1 file changed, 2 insertions(+), 75 deletions(-)
--
2.25.1
Handling the array of CRTC duplicate the struct msm_drm_private
duplicates a list of CRTCs in the drm_device. Drop it and use the
existing list for CRTC enumeration.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +-
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c |
Stop using deprecated drm_handle_vblank(), use drm_crtc_handle_vblank()
instead.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_irq.c
Stop using deprecated drm_handle_vblank(), use drm_crtc_handle_vblank()
instead.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_irq.c
Afther the commit f026e431cf86 ("drm/msm: Convert to Linux IRQ
interfaces") converted MSM DRM driver to handle IRQs on it's own (rather
than using the DRM IRQ mid-layer), there is little point in keeping
irq wrapper in the msm_drv.c which just call into individual drivers.
Push respective code
Not tainted
5.18.0-rc5-next-20220506-00033-g6cee8cab6089-dirty #419
[8.624161] Hardware name: Qualcomm Technologies, Inc. SM8350 HDK (DT)
[8.641496] Workqueue: events_unbound deferred_probe_work_func
[8.647510] pstate: 604000c5 (nZCv daIF +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[8.654681] pc
Quoting Kuogee Hsieh (2022-05-06 14:41:07)
> dp_catalog_ctrl_reset() will software reset DP controller. But it will
> not reset programmable registers to default value. DP driver still have
> to clear mask bits to interrupt status registers to disable interrupts
> after software reset of
On Thu, Apr 28, 2022 at 01:18:42PM +0100, Tvrtko Ursulin wrote:
>
> Hi,
>
> On 28/04/2022 00:07, Matt Roper wrote:
> > Rather than storing subslice masks internally as u8[] (inside the sseu
> > structure) and u32 (everywhere else), let's move over to using an
> > intel_sseu_ss_mask_t typedef
On 07/05/2022 02:33, Abhinav Kumar wrote:
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
In preparation to reworking dpu_plane_sspp_atomic_update() inline the
_dpu_plane_set_scanout() function.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 41
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
In preparation to reworking dpu_plane_sspp_atomic_update() inline the
_dpu_plane_set_scanout() function.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 41 ++-
1 file changed, 18
Hi Pekka,
On 4/27/22 04:55, Pekka Paalanen wrote:
On Tue, 26 Apr 2022 21:53:19 -0300
Igor Torrente wrote:
Hi Pekka,
On 4/21/22 07:58, Pekka Paalanen wrote:
On Mon, 4 Apr 2022 17:45:15 -0300
Igor Torrente wrote:
Adds this common format to vkms.
This commit also adds new helper
On 5/6/2022 3:29 PM, Dmitry Baryshkov wrote:
On 07/05/2022 00:48, Abhinav Kumar wrote:
On 5/6/2022 2:39 PM, Dmitry Baryshkov wrote:
On 07/05/2022 00:30, Abhinav Kumar wrote:
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
Wrap SSPP and multirect index/mode into a single structure that
On Fri, 06 May 2022 20:10:30 +0200, Lucas Stach wrote:
> Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
>
> Signed-off-by: Lucas Stach
> ---
> .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++
> 1 file changed, 62 insertions(+)
> create mode 100644
>
On Fri, 06 May 2022 15:05:30 +0100, Andre Przywara wrote:
> The Arm PL110 and PL111 are IP blocks that provide a display engine with
> an LCD interface, being able to drive a variety of LC panels.
>
> Convert the binding over to DT schema, to the DTs can be automatically
> checked.
> This still
On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> out a framebuffer and hands the pixels over to a digital signal encoder.
> It supports multiple layers, scaling and rotation.
>
> Convert the existing DT binding
On Fri, 06 May 2022 20:10:28 +0200, Lucas Stach wrote:
> Add binding for the i.MX8MP HDMI parallel video interface block.
>
> Signed-off-by: Lucas Stach
> ---
> .../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 83 +++
> 1 file changed, 83 insertions(+)
> create mode 100644
>
On Fri, 06 May 2022 15:05:31 +0100, Andre Przywara wrote:
> The Arm HDLCD is a display controller that scans out a framebuffer and
> hands a signal to a digital encoder to generate a DVI or HDMI signal.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara
> ---
>
On Fri, 06 May 2022 20:10:26 +0200, Lucas Stach wrote:
> The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
> core with a little bit of SoC integration around it.
>
> Signed-off-by: Lucas Stach
> ---
> .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 73 +++
>
On 07/05/2022 00:48, Abhinav Kumar wrote:
On 5/6/2022 2:39 PM, Dmitry Baryshkov wrote:
On 07/05/2022 00:30, Abhinav Kumar wrote:
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
Wrap SSPP and multirect index/mode into a single structure that
represents software view on the pipe used.
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
Where feasible, use dpu_sw_pipe rather than a combo of dpu_hw_pipe and
multirect_index/_mode arguments.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 59 ++--
On 14/04/2022 21:44, Konrad Dybcio wrote:
Add support for the Adreno 619 GPU, as found in Snapdragon 690 (SM6350),
480 (SM4350) and 750G (SM7225).
Signed-off-by: Konrad Dybcio
---
Changes in v2:
- Don't reserve icache/dcache regions on legacy GMUs, as that
is apparently not necessary and
On 5/6/2022 2:39 PM, Dmitry Baryshkov wrote:
On 07/05/2022 00:30, Abhinav Kumar wrote:
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
Wrap SSPP and multirect index/mode into a single structure that
represents software view on the pipe used.
Signed-off-by: Dmitry Baryshkov
---
dp_catalog_ctrl_reset() will software reset DP controller. But it will
not reset programmable registers to default value. DP driver still have
to clear mask bits to interrupt status registers to disable interrupts
after software reset of controller. This patch removes the enable flag
condition
On 07/05/2022 00:30, Abhinav Kumar wrote:
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
Wrap SSPP and multirect index/mode into a single structure that
represents software view on the pipe used.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 8 +-
On 05/05/2022 13:28, Dan Carpenter wrote:
The msm_gem_prime_get_sg_table() needs to return error pointers on
error. This is called from drm_gem_map_dma_buf() and returning a
NULL will lead to a crash in that function.
Fixes: ac45146733b0 ("drm/msm: fix msm_gem_prime_get_sg_table()")
Sorry I totally missed this patch up until now, noticed it while going through
unread emails today. This is:
Reviewed-by: Lyude Paul
FWIW, if there's something you need reviews on that hasn't gotten looked at
after a few weeks feel free to poke the nouveau list/me.
Anyway, I will go ahead and
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
Wrap SSPP and multirect index/mode into a single structure that
represents software view on the pipe used.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 8 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h |
On 06/05/2022 00:40, Jessica Zhang wrote:
There is a possibility for mdp5_get_global_state to return
-EDEADLK when acquiring the modeset lock, but currently global_state in
mdp5_mixer_release doesn't check for if an error is returned.
To avoid a NULL dereference error, let's have
On 06/05/2022 01:01, Rob Clark wrote:
On Thu, May 5, 2022 at 2:41 PM Jessica Zhang wrote:
mdp5_get_global_state runs the risk of hitting a -EDEADLK when acquiring
the modeset lock, but currently mdp5_pipe_release doesn't check for if
an error is returned. Because of this, there is a
On 06/05/2022 00:40, Jessica Zhang wrote:
mdp5_get_global_state runs the risk of hitting a -EDEADLK when acquiring
the modeset lock, but currently mdp5_pipe_release doesn't check for if
an error is returned. Because of this, there is a possibility of
mdp5_pipe_release hitting a NULL dereference
On 07/05/2022 00:17, Abhinav Kumar wrote:
On 5/6/2022 2:05 PM, Dmitry Baryshkov wrote:
On 07/05/2022 00:03, Abhinav Kumar wrote:
On 5/6/2022 1:49 PM, Dmitry Baryshkov wrote:
On 25/04/2022 14:44, Sankeerth Billakanti wrote:
This patch adds support for generic eDP sink through aux_bus. The
On 5/6/2022 2:05 PM, Dmitry Baryshkov wrote:
On 07/05/2022 00:03, Abhinav Kumar wrote:
On 5/6/2022 1:49 PM, Dmitry Baryshkov wrote:
On 25/04/2022 14:44, Sankeerth Billakanti wrote:
This patch adds support for generic eDP sink through aux_bus. The
eDP/DP
controller driver should support
Whoops! Was going through my unread emails and noticed I somehow missed this
patch last month.
Reviewed-by: Lyude Paul
I will push this to drm-misc-fixes in a little bit (assuming I don't find it
there already)
On Tue, 2022-04-05 at 15:21 +0100, Robin Murphy wrote:
> Even if some IOMMU has
On 07/05/2022 00:03, Abhinav Kumar wrote:
On 5/6/2022 1:49 PM, Dmitry Baryshkov wrote:
On 25/04/2022 14:44, Sankeerth Billakanti wrote:
This patch adds support for generic eDP sink through aux_bus. The eDP/DP
controller driver should support aux transactions originating from the
panel-edp
On 5/6/2022 1:49 PM, Dmitry Baryshkov wrote:
On 25/04/2022 14:44, Sankeerth Billakanti wrote:
This patch adds support for generic eDP sink through aux_bus. The eDP/DP
controller driver should support aux transactions originating from the
panel-edp driver and hence should be initialized and
On 25/04/2022 14:44, Sankeerth Billakanti wrote:
This patch adds support for generic eDP sink through aux_bus. The eDP/DP
controller driver should support aux transactions originating from the
panel-edp driver and hence should be initialized and ready.
The panel bridge supporting the panel
On 06/05/2022 21:56, Abhinav Kumar wrote:
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
The funcitons _dpu_crtc_blend_setup() and _dpu_crtc_blend_setup_mixer()
have an intertwined mixture of CTL and LM-related code. Split these two
functions into LM-specific and CTL-specific parts, making both
On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:
The funcitons _dpu_crtc_blend_setup() and _dpu_crtc_blend_setup_mixer()
have an intertwined mixture of CTL and LM-related code. Split these two
functions into LM-specific and CTL-specific parts, making both code
paths clean and observable.
I do
This adds the driver for the Samsung HDMI PHY found on the
i.MX8MP SoC.
Signed-off-by: Lucas Stach
---
drivers/phy/freescale/Kconfig|6 +
drivers/phy/freescale/Makefile |1 +
drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 1078 ++
3 files
Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few
involved pins that are configurable.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 19 +++
1 file changed, 19 insertions(+)
diff --git
This IP block is found in the HDMI subsystem of the i.MX8MP SoC. It has a
full timing generator and can switch between different video sources. On
the i.MX8MP however the only supported source is the LCDIF. The block
just needs to be powered up and told about the polarity of the video
sync signals
The HDMI irqsteer is a secondary interrupt controller within the HDMI
subsystem that maps all HDMI peripheral IRQs into a single upstream
IRQ line.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git
This adds the DT nodes for all the peripherals that make up the
HDMI display pipeline.
Signed-off-by: Lucas Stach
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 81 +++
1 file changed, 81 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach
---
.../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++
1 file changed, 62 insertions(+)
create mode 100644
Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml
diff --git
Add binding for the i.MX8MP HDMI parallel video interface block.
Signed-off-by: Lucas Stach
---
.../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 83 +++
1 file changed, 83 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml
Add a simple wrapper driver for the DWC HDMI bridge driver that
implements the few bits that are necessary to abstract the i.MX8MP
SoC integration.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/imx/Kconfig | 1 +
drivers/gpu/drm/imx/Makefile | 2 +
The HDMI TX controller on the i.MX8MP SoC is a Synopsys designware IP
core with a little bit of SoC integration around it.
Signed-off-by: Lucas Stach
---
.../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 73 +++
1 file changed, 73 insertions(+)
create mode 100644
Hi all,
second round of the i.MX8MP HDMI work. Still not split up into proper
parts for merging through the various trees this needs to go into, but
should make it easy for people to test.
I've worked in the feedback I got from the last round, including fixing
the system hang that could happen
On Fri, May 06, 2022 at 01:10:24PM +0300, Jani Nikula wrote:
> +int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
> +{
> + struct drm_edid drm_edid = {
> + .edid = edid,
> + .size = edid_size(edid),
> + };
> +
> + return _drm_edid_to_sad(_edid,
On Sat, 7 May 2022 at 02:50, Linus Torvalds
wrote:
>
> On Thu, May 5, 2022 at 9:07 PM Dave Airlie wrote:
> >
> > pretty quiet week, one fbdev, msm, kconfig, and 2 amdgpu fixes, about
> > what I'd expect for rc6.
>
> You're not getting the automated pr-tracker-bot response, because your
> subject
On Fri, May 06, 2022 at 01:10:09PM +0300, Jani Nikula wrote:
> We have an iterator for this, use it. It does include the base block,
> but its tag is 0 and will be skipped.
>
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_edid.c | 8 +---
> 1 file
On Fri, May 06, 2022 at 01:10:08PM +0300, Jani Nikula wrote:
> Only one of the conditions can be true.
>
> Suggested-by: Ville Syrjälä
> Signed-off-by: Jani Nikula
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_edid.c | 12 ++--
> 1 file changed, 6 insertions(+), 6
On Fri, May 06, 2022 at 10:23:41AM -0700, Lucas De Marchi wrote:
> On Thu, May 05, 2022 at 02:38:05PM -0700, Matt Roper wrote:
> > From: Stuart Summers
> >
> > Although we already strip 3D-specific flags from PIPE_CONTROL
> > instructions when submitting to a compute engine, there are some
> >
On Thu, May 05, 2022 at 02:38:05PM -0700, Matt Roper wrote:
From: Stuart Summers
Although we already strip 3D-specific flags from PIPE_CONTROL
instructions when submitting to a compute engine, there are some
additional flags that need to be removed when the platform as a whole
lacks a 3D
On Thu, May 05, 2022 at 02:38:03PM -0700, Matt Roper wrote:
From: Ayaz A Siddiqui
v2 (MattR):
- Clarify comment above RING_CMD_CCTL programming.
- Remove bspec reference from field definition. (Lucas)
- Add WARN if we try to use a (presumably uninitialized) wb_index of 0.
On most platforms
On 06.05.2022 15:22, Javier Martinez Canillas wrote:
Commit d258d00fb9c7 ("fbdev: efifb: Cleanup fb_info in .fb_destroy rather
than .remove") attempted to fix a use-after-free error due driver freeing
the fb_info in the .remove handler instead of doing it in .fb_destroy.
But ironically that
On Thu, May 5, 2022 at 9:07 PM Dave Airlie wrote:
>
> pretty quiet week, one fbdev, msm, kconfig, and 2 amdgpu fixes, about
> what I'd expect for rc6.
You're not getting the automated pr-tracker-bot response, because your
subject line was missing...
Just a "how did that happen" together with a
On 5/6/2022 00:18, Tvrtko Ursulin wrote:
On 05/05/2022 19:36, John Harrison wrote:
On 5/5/2022 10:21, Belgaumkar, Vinay wrote:
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
timeouts when
Hi Dave, Daniel,
The following changes since commit 3123109284176b1532874591f7c81f3837bbdc17:
Linux 5.18-rc1 (2022-04-03 14:08:21 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/drm/tegra.git tags/drm/tegra/for-5.19-rc1
for you to fetch changes up to
Hi Jani
On 5/6/2022 4:16 AM, Jani Nikula wrote:
On Thu, 05 May 2022, Doug Anderson wrote:
Ville,
On Tue, Apr 26, 2022 at 1:21 PM Douglas Anderson wrote:
If we're unable to read the EDID for a display because it's corrupt /
bogus / invalid then we'll add a set of standard modes for the
On 5/6/2022 12:18 AM, Tvrtko Ursulin wrote:
On 05/05/2022 19:36, John Harrison wrote:
On 5/5/2022 10:21, Belgaumkar, Vinay wrote:
On 5/5/2022 5:13 AM, Tvrtko Ursulin wrote:
On 05/05/2022 06:40, Vinay Belgaumkar wrote:
SLPC min/max frequency updates require H2G calls. We are seeing
On Thu, May 5, 2022 at 10:05 PM Haowen Bai wrote:
>
> Return boolean values ("true" or "false") instead of 1 or 0 from bool
> functions.
>
> Signed-off-by: Haowen Bai
Thanks, I just applied the same fix from someone else.
Alex
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c | 6
Applied. Thanks!
On Fri, May 6, 2022 at 12:04 PM Alex Deucher wrote:
>
> Series is:
> Reviewed-by: Alex Deucher
>
> On Thu, May 5, 2022 at 7:28 PM Yang Li wrote:
> >
> > Return boolean values ("true" or "false") instead of 1 or 0 from bool
> > functions. This fixes the following warnings from
Series is:
Reviewed-by: Alex Deucher
On Thu, May 5, 2022 at 7:28 PM Yang Li wrote:
>
> Return boolean values ("true" or "false") instead of 1 or 0 from bool
> functions. This fixes the following warnings from coccicheck:
>
> ./drivers/gpu/drm/amd/amdkfd/kfd_int_process_v11.c:244:9-10: WARNING:
On 5/6/2022 5:32 AM, YueHaibing wrote:
While CONFIG_OF is n but COMPILE_TEST is y, we got this:
WARNING: unmet direct dependencies detected for DRM_DP_AUX_BUS
Depends on [n]: HAS_IOMEM [=y] && DRM [=y] && OF [=n]
Selected by [y]:
- DRM_MSM [=y] && HAS_IOMEM [=y] && DRM [=y] &&
Hi Javier,
On Fri, May 06, 2022 at 03:22:25PM +0200, Javier Martinez Canillas wrote:
> Commit d258d00fb9c7 ("fbdev: efifb: Cleanup fb_info in .fb_destroy rather
> than .remove") attempted to fix a use-after-free error due driver freeing
> the fb_info in the .remove handler instead of doing it in
On 5/6/2022 12:51 AM, Tvrtko Ursulin wrote:
On 05/05/2022 19:56, John Harrison wrote:
On 5/4/2022 16:46, Daniele Ceraolo Spurio wrote:
From: Matthew Brost
In GuC submission mode the EU priority must be updated by the GuC
rather
than the driver as the GuC owns the programming of the
Hi Jani,
On Fri, May 06, 2022 at 02:53:50PM +0300, Jani Nikula wrote:
> On Sat, 19 Mar 2022, Andi Shyti wrote:
> > +#define INTEL_GT_RPS_SYSFS_ATTR(_name, _mode, _show, _store) \
> > + struct device_attribute dev_attr_gt_##_name = __ATTR(gt_##_name, _mode,
> > _show, _store); \
> > + struct
On Fri, May 06, 2022 at 08:21:46AM +0100, Tvrtko Ursulin wrote:
>
> On 05/05/2022 21:59, Matt Roper wrote:
> > On Tue, May 03, 2022 at 09:05:43AM +0100, Tvrtko Ursulin wrote:
> > >
> > > On 02/05/2022 17:34, Matt Roper wrote:
> > > > This patch adds the basic definitions needed to support
> > >
Hi
Am 06.05.22 um 16:01 schrieb Noralf Trønnes:
Hi Thomas,
I'm getting this on Ubuntu 22.04:
[0.00] Linux version 5.15.0-27-generic (buildd@ubuntu) (gcc
(Ubuntu 11.2.0-19ubuntu1) 11.2.0, GNU ld (GNU Binutils for Ubuntu) 2.38)
#28-Ubuntu SMP Thu Apr 14 04:55:28 UTC 2022 (Ubuntu
I had to send this out once more.
This time with the right mail addresses and a much simplified patch #3.
Christian.
Am 06.05.22 um 16:10 schrieb Christian König:
The selftests, fix the error handling, remove unused functions and stop
leaking memory in failed tests.
v2: fix the memory leak
The unwrap merge function is now intended for this use case.
Signed-off-by: Christian König
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/drm_syncobj.c | 57 +--
1 file changed, 7 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c
dma_fence_chain containers cleanup signaled fences automatically, so
filter those out from arrays as well.
v2: fix missing walk over the array
v3: massively simplify the patch and actually update the description.
Signed-off-by: Christian König
---
include/linux/dma-fence-unwrap.h | 6 +-
1
Move the code from the inline functions into exported functions.
Signed-off-by: Christian König
Acked-by: Daniel Vetter
---
drivers/dma-buf/Makefile | 2 +-
drivers/dma-buf/dma-fence-unwrap.c | 59 ++
include/linux/dma-fence-unwrap.h | 52
Introduce a dma_fence_unwrap_merge() macro which allows to unwrap fences
which potentially can be containers as well and then merge them back
together into a flat dma_fence_array.
v2: rename the function, add some more comments about how the wrapper is
used, move filtering of signaled fences
The selftests, fix the error handling, remove unused functions and stop
leaking memory in failed tests.
v2: fix the memory leak correctly.
Signed-off-by: Christian König
---
drivers/dma-buf/st-dma-fence-unwrap.c | 48 +++
1 file changed, 19 insertions(+), 29
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara
---
The Arm Komeda (aka Mali-D71) is a display controller that scans out a
framebuffer and hands a signal to a digital encoder to generate a DVI
or HDMI signal. It supports up to two pipelines, each frame can be
composed of up to four layers.
Convert the existing DT binding to DT schema.
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara
---
.../devicetree/bindings/display/arm,hdlcd.txt | 79
The Arm PL110 and PL111 are IP blocks that provide a display engine with
an LCD interface, being able to drive a variety of LC panels.
Convert the binding over to DT schema, to the DTs can be automatically
checked.
This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
because
Hi Thomas,
I'm getting this on Ubuntu 22.04:
[0.00] Linux version 5.15.0-27-generic (buildd@ubuntu) (gcc
(Ubuntu 11.2.0-19ubuntu1) 11.2.0, GNU ld (GNU Binutils for Ubuntu) 2.38)
#28-Ubuntu SMP Thu Apr 14 04:55:28 UTC 2022 (Ubuntu 5.15.0-27.28-generic
5.15.30)
[4.830866] usb 2-3.1:
From: Thierry Reding
When mapping the DMA-BUF attachment fails, map->sgt will be an ERR_PTR-
encoded error code and the cleanup code would try to free that memory,
which obviously would fail.
Zero out that pointer after extracting the error code when this happens
so that kfree() can do the
Am 06.05.22 um 15:22 schrieb Javier Martinez Canillas:
Commit d258d00fb9c7 ("fbdev: efifb: Cleanup fb_info in .fb_destroy rather
than .remove") attempted to fix a use-after-free error due driver freeing
the fb_info in the .remove handler instead of doing it in .fb_destroy.
But ironically that
>> >> Our internal power grid documents list the regulators as
>> >> VDD_A_*_1P2 and VDD_A_*_0P9 for all the platforms.
>> >
>> >Do your internal power grid documents indicate what these supplies
>> >are powering? The question is if these supplies power any of the
>> >logic inside the eDP
Commit d258d00fb9c7 ("fbdev: efifb: Cleanup fb_info in .fb_destroy rather
than .remove") attempted to fix a use-after-free error due driver freeing
the fb_info in the .remove handler instead of doing it in .fb_destroy.
But ironically that change introduced yet another use-after-free since the
Hello Andrzej,
On 5/6/22 15:07, Andrzej Hajda wrote:
> On 06.05.2022 00:05, Javier Martinez Canillas wrote:
[snip]
>> +
>> +framebuffer_release(info);
>> +
>> if (request_mem_succeeded)
>> release_mem_region(info->apertures->ranges[0].base,
>>
+ some display folks
On Fri, May 6, 2022 at 6:19 AM Jörg Rödel wrote:
>
> Hi,
>
> since recently I started to experience warnings and NULL-ptr
> dereferences in the amdgpu driver with kernel 5.18-rc5+. Earlier
> 5.18-based kernels might be affected as well, but I havn't seen this
> with 5.17.
>
On 06.05.2022 00:05, Javier Martinez Canillas wrote:
The driver is calling framebuffer_release() in its .remove callback, but
this will cause the struct fb_info to be freed too early. Since it could
be that a reference is still hold to it if user-space opened the fbdev.
This would lead to a
On 06/05/2022 15:32, YueHaibing wrote:
While CONFIG_OF is n but COMPILE_TEST is y, we got this:
WARNING: unmet direct dependencies detected for DRM_DP_AUX_BUS
Depends on [n]: HAS_IOMEM [=y] && DRM [=y] && OF [=n]
Selected by [y]:
- DRM_MSM [=y] && HAS_IOMEM [=y] && DRM [=y] &&
On Fri, May 06, 2022 at 01:55:57AM +0200, Marek Vasut wrote:
> On 5/5/22 23:08, Mark Brown wrote:
> > I did go through it and didn't spot
> > any issues so it seemed like the testing coverage would be useful here.
> > Are there specific things you're worried about that you'd like feedback
> > on?
On Fri, May 06, 2022 at 01:58:18PM +0300, Jani Nikula wrote:
> Hey Mark, sorry for hijacking the thread a bit. regmap.h seems to have
> comprehensive API documentation, but there's very little in terms of
> higher level documentation that I could find. Is there any?
Not outside of the source. I
On Wed, 4 May 2022 at 17:06, Rob Herring wrote:
>
> On Wed, 04 May 2022 03:26:01 +0200, Marek Vasut wrote:
> > Add missing reg and reg-names properties for both 'LDB_CTRL'
> > and 'LVDS_CTRL' registers.
> >
> > Fixes: 463db5c2ed4ae ("drm: bridge: ldb: Implement simple Freescale i.MX8MP
> > LDB
Add DRM panel driver for EBBG FT8719 6.18" 2246x1080 DSI video mode
panel, which can be found on some Xiaomi Poco F1 phones. The panel's
backlight is managed through QCOM WLED driver.
Signed-off-by: Joel Selvaraj
---
MAINTAINERS | 7 +
Add bindings for the EBBG FT8719 6.18" 2246x1080 DSI video mode panel,
which can be found on some Xiaomi Poco F1 phones. The backlight is
managed through the QCOM WLED driver.
Signed-off-by: Joel Selvaraj
---
.../bindings/display/panel/ebbg,ft8719.yaml | 78 +++
1 file
Add a prefix for EBBG. They manufacture displays which are used in some
Xiaomi phones, but I could not find much details about the company.
Signed-off-by: Joel Selvaraj
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
Add bindings and DRM panel driver for EBBG FT8719 6.18" 2246x1080 DSI
video mode panel, which can be found on some Xiaomi Poco F1 phones.
The panel's backlight is managed through QCOM WLED driver.
The driver is built using linux-mdss-dsi-panel-driver-generator[1], and
additionally support for
On Sat, 19 Mar 2022, Andi Shyti wrote:
> +#define INTEL_GT_RPS_SYSFS_ATTR(_name, _mode, _show, _store) \
> + struct device_attribute dev_attr_gt_##_name = __ATTR(gt_##_name, _mode,
> _show, _store); \
> + struct device_attribute dev_attr_rps_##_name = __ATTR(rps_##_name,
> _mode, _show,
Hey, do you ever run sparse on your driver? Whenever our CI ends up
recompiling amdgpu, there's quite the spew. See below.
You're not alone, but, sorry to say, the _Static_assert() from
amdgv_sriovmsg.h has been pretty obnoxious for quite some time now.
First, I don't think you should be using
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