On Fri, Feb 16, 2018 at 02:20:10PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
Reviewed-by: Leif Lindholm
> ---
> Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 3
enakshi Aggarwal
If you send a new version, can you fix the indentation in the last few
DEBUG statements? If not, I can fix that up before committing.
Reviewed-by: Leif Lindholm
> ---
> .../NXP/LS1043aRdbPkg/Include/Library/FpgaLib.h| 79
> .../NXP/LS1043aRdbPkg/Libr
On Fri, Feb 16, 2018 at 02:20:08PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Add support of IfcLib, it will be used to perform
> any operation on IFC controller.
Again, please describe what an IFC is.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Mee
On Fri, Feb 16, 2018 at 02:20:07PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> BoardLib will contain functions specific for LS1043aRdb board.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
Reviewed
On Fri, Feb 16, 2018 at 02:20:06PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> This header file contain IFC controller timing structure,
> chip select enum and other IFC macros.
Could you just add a comment as to what an IFC is?
(I'm guessing it's some sort of flash controller, but...
On Wed, Apr 18, 2018 at 04:38:22PM +, Meenakshi Aggarwal wrote:
> > > +
> > > +/*
> > > + * Returns the bit mask for a bit index from 0 to 31
> > > + */
> > > +#define BIT(_BitIndex) (0x1u << (_BitIndex))
> >
> > I don't see these being used for anything other than setting up BIT1
> >
On Fri, Feb 16, 2018 at 02:20:04PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> The firmware device, description and declaration files.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
I am generally happy with this patch, but am expecti
On Fri, Feb 16, 2018 at 02:20:03PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
Reviewed-by: Leif Lindholm
> ---
> .../Library/PlatformLib/ArmPlatformLib
ture can you try to follow
Laszlo's guide when generating patches:
https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-23
?
For this patch:
Reviewed-by: Leif Lindholm
> 4 files changed, 459 insertions(+)
&g
On Fri, Feb 16, 2018 at 02:20:00PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
Reviewed-by: Leif Lindholm
> ---
> Silicon/NXP/Library/DUartPortLib/DUar
On Fri, Feb 16, 2018 at 02:19:59PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> Add SocInit function that initializes peripherals
> and print board and soc information.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
> Silicon/NXP
Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Heyi Guo
> Cc: Ard Biesheuvel
> Cc: Leif Lindholm
Reviewed-by: Leif Lindholm
As requested on other thread, pushed separately as 06866930dc.
> ---
> Platform/Hisilicon/D03/D03.dsc | 5 -
> Platform/
don't need copyright or attribution, it's just a more
structured way to provide this particular bit of feedback.)
/
Leif
>From 7da6ca87177153532811f8ecd9ad6847b480161e Mon Sep 17 00:00:00 2001
From: Leif Lindholm
Date: Tue, 17 Apr 2018 16:22:00 +0100
Subject: [PATCH edk2-platfor
On Fri, Feb 16, 2018 at 02:20:01PM +0530, Meenakshi wrote:
> From: Meenakshi Aggarwal
>
> I2C driver produces gEfiI2cMasterProtocolGuid which can be
> used by other modules.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Meenakshi Aggarwal
> ---
> Silicon/NXP/Driv
(Responding somewhat out of sequence, as I'm going through to build
this port and encountering issues.)
This patch will require something similar to
edk2-platforms 79c9dd55a32752b7ae11d5f1a50fa3ae27d6d126 in order to
work with recent upstream edk2. (gVariableRuntimeDxeFileGuid has gone
away with e
On Mon, Apr 16, 2018 at 09:32:44PM +0200, Laszlo Ersek wrote:
> (4) Please consider adopting
>
>
> https://github.com/tianocore/tianocore.github.io/wiki/Laszlo's-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-10
>
> https://github.com/tianocore/tianocore.github.io/wi
On Mon, Apr 16, 2018 at 10:42:26PM +0200, Laszlo Ersek wrote:
> On 04/16/18 16:34, Michael Brown wrote:
> > On 16/04/18 15:10, Kinney, Michael D wrote:
> >> I agree that the opposite use case is a BE CPU
> >> needing a LE operation.
> >>
> >> I think we only need a single lib class and lib
> >> Ins
yu wrote:
> > > On 3/20/2018 8:15 PM, Guo Heyi wrote:
> > > >I've no idea about how to use Driver; let me spend some time to
> > > >learn first
> > > >:)
> > >
> > > Heyi,
> > > you could use "load xxxDriver.ef
ation depending on the base address value.
>
> Cc: Leif Lindholm
> Cc: Ard Biesheuvel
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Christopher Co
> ---
> ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 2 +-
> 1 file changed, 1 insertion(+),
these static inline helper
functions (even with the code duplication).
/
Leif
> Mike
>
>
> > -Original Message-
> > From: edk2-devel [mailto:edk2-devel-
> > boun...@lists.01.org] On Behalf Of Leif Lindholm
> > Sent: Friday, April 13, 2018 12:32 PM
>
nd doing it this way lets me follow that rule.
---
Clearly this is open for discussion, but the above is my opinion and
the code intentionally reflects that.
Regards,
Leif
> Mike
>
> > -----Original Message-
> > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> &g
Cc: Andrew Fish
Cc: Laszlo Ersek
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm
---
Maintainers.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Maintainers.txt b/Maintainers.txt
index 256133810f..7295cd6b83 100644
--- a
When performing MMIO to a destination of the opposite endianness to the
executing processor, this library provides automatic byte order reversal
on inputs and outputs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm
---
Udit, many apologies for this dragging
Since you already have my r-b on the set, I'll pick up the style
topic, partly because I'm not sure if I've ever explained my
thinking publicly in words that anyone other than Ard understands.
On Thu, Apr 12, 2018 at 07:45:19PM +0200, Laszlo Ersek wrote:
> > Well, there are a couple of places wher
gt; > :)
> >
> > Some of these patches will have to be ported to edk2-platforms, I think.
> >
> > Cc: Ard Biesheuvel
> > Cc: Leif Lindholm
> > Cc: Steve Capper
> > Cc: Supreeth Venkatesh
> >
> > Thanks,
> > Laszlo
> >
> > La
Note: the branch name (for the subject line) is
platforms/devel-dynamictables, not platforms/dynamictables.
With Evan's reviewed-by, series pushed as
345b8b2992..e28edfba42.
On Mon, Mar 19, 2018 at 03:21:51PM +, Sami Mujawar wrote:
> The Dynamic Tables Framework is a prototyped as a sol
Pushed with Evan's R-b as 1ff9bc214c..c47bc46170.
On Mon, Mar 19, 2018 at 03:18:39PM +, Sami Mujawar wrote:
> The Dynamic Tables Framework is a prototyped as a solution for
> automatically generating the firmware tables based on hardware
> description.
>
> This patchset is the Dynamic Tables
Reviewed-by: Leif Lindholm
Pushed as 2b85beae0b.
Please start bringing the code in via regular mailing list review by
belowmentioned maintainerers/reviewer.
On Thu, Feb 15, 2018 at 01:31:50PM +, achin.gu...@arm.com wrote:
> From: Achin Gupta
>
> This patch adds maintainers, rev
so that we can download something in
> > > EFI Shell.
> > >
> > > Contributed-under: TianoCore Contribution Agreement 1.1
> > > Signed-off-by: Heyi Guo
> > > Cc: Ard Biesheuvel
> > > Cc: Leif Lindholm
> >
> > The first patch lo
On Fri, Mar 16, 2018 at 04:13:20PM +, Ard Biesheuvel wrote:
> Allow the lowest supported firmware version to be configured by PCD
> so that each platform can set it individually.
Is there a case for adding this PCD to MdeModulePkg?
/
Leif
> Contributed-under: TianoCore Contribution Agree
nney
>
> Mike
>
> > -Original Message-
> > From: Leif Lindholm [mailto:leif.lindh...@linaro.org]
> > Sent: Thursday, March 15, 2018 12:31 PM
> > To: Sami Mujawar
> > Cc: edk2-devel@lists.01.org; evan.ll...@arm.com;
> > matteo.carl...@arm.com; stephanie
to be
> more robust.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Tested-by: Leif Lindholm
Reviewed-by: Leif Lindholm
> ---
> Platform/Socionext/DeveloperBox/README | 2 +-
> Platform/Socionext/DeveloperBox/fip_al
On Fri, Mar 16, 2018 at 11:28:21AM +, Ard Biesheuvel wrote:
> On 15 March 2018 at 19:01, Leif Lindholm wrote:
> > On Thu, Mar 15, 2018 at 10:28:26AM +, Ard Biesheuvel wrote:
> >> When we first ported EDK2 to KVM/arm, we implemented a workaround for
> >> the q
On Thu, Mar 15, 2018 at 06:43:11PM +, Ard Biesheuvel wrote:
> On 15 March 2018 at 18:37, Leif Lindholm wrote:
> > On Sat, Mar 03, 2018 at 11:29:23AM +, Ard Biesheuvel wrote:
> >> This adds SMBIOS tables to the DeveloperBox platform describing the
> >> BIOS, syst
Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar
> Signed-off-by: Evan Lloyd
>From my view,
Reviewed-by: Leif Lindholm
Adding Mike to cc. Can create branch tomorrow if he has no objections.
/
Leif
> ---
> Readme.md | 150 +++
nder: TianoCore Contribution Agreement 1.1
> Signed-off-by: Sami Mujawar
> Signed-off-by: Evan Lloyd
Reviewed-by: Leif Lindholm
But, adding Andrew and Mike to cc.
If they have no comments, I can create this branch tomorrow.
/
Leif
> ---
>
> Apologies for sending the patch
On Thu, Mar 08, 2018 at 05:03:16PM +, Ard Biesheuvel wrote:
> Add a ACPI PPTT table describing the cache topology of the Seattle SoC.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Looks plausible:
Reviewed-by: Leif Lindholm
>
On Thu, Mar 08, 2018 at 03:21:41PM +, Ard Biesheuvel wrote:
> Add a DT description of the size and geometry of the various levels
> of caches that are present in the SynQuacer SoC.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Re
Agreement 1.1
> Signed-off-by: Ard Biesheuvel
I'm happy with this, with Marc's Ack.
Reviewed-by: Leif Lindholm
However, if this can affect old kernels running in vms, could you ping
cross-dis...@lists.linaro.org as well, so it doesn't catch anyone by
su
On Wed, Mar 14, 2018 at 06:51:45PM +, Sami Mujawar wrote:
> This patch introduces a branch for implementing Dynamic Tables
> Framework. The description is in the Readme.md file.
>
> Please create a branch called 'devel-dynamictables' in edk2-platforms.
>
> Contributed-under: TianoCore Contrib
On Wed, Mar 14, 2018 at 06:35:09PM +, Sami Mujawar wrote:
> This patch introduces a branch for implementing Dynamic Tables
> Framework. The description is in the Readme.md file.
>
> Please create a branch called 'dynamictables' in edk2-staging.
>
> Contributed-under: TianoCore Contribution Ag
On Sat, Mar 03, 2018 at 11:29:23AM +, Ard Biesheuvel wrote:
> This adds SMBIOS tables to the DeveloperBox platform describing the
> BIOS, system, enclosure, CPUs, caches, PCIe slots and system memory,
> which almost amounts to the mandatory minimum as given by the SMBIOS
> spec. Only the type 1
On Thu, Mar 01, 2018 at 06:11:42PM +, Ard Biesheuvel wrote:
> Implement the new runtime debug output protocol on top of a PL011 UART.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
LGTM
Reviewed-by: Leif Lindholm
> ---
>
tialization (PI)
> Specification, Volume 4: Management Mode Core Interface.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Achin Gupta
Reviewed-by: Leif Lindholm
> ---
> Maintainers.txt | 5 +
> StandaloneMmPkg | 0
> 2 files cha
On Wed, Mar 14, 2018 at 12:35:03PM +, Ard Biesheuvel wrote:
> >> I guess Leif and I are in disagreement here. In particular, I think
> >> his comment
> >>
> >> """
> >> ASSERT (FALSE)? (You already know Status is an EFI_ERROR, and a
> >> console message saying ASSERT (Status) is not getting yo
On Thu, Jan 04, 2018 at 07:24:20PM +, Ard Biesheuvel wrote:
> On 4 January 2018 at 18:55, Girish Pathak wrote:
> > Hi Ard,
> >
> >> -Original Message-
> >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> >> Ard Biesheuvel
> >> Sent: 23 December 2017 14:12
> >>
Hi Arvind,
On Sat, Mar 10, 2018 at 11:11:58AM -0500, Arvind Prasanna wrote:
> It is possible to source edksetup.sh from another script. If the
> calling/sourcing script has any positional parameters set, those are
> incorrectly accounted for in edksetup.sh while sourcing it resulting in
> the the
eviewed-by: Leif Lindholm
On Wed, Feb 28, 2018 at 07:24:14PM +, Ard Biesheuvel wrote:
> This implements ACPI support for the SynQuacer platforms.
>
> Changes since v1:
> - improve commit log (#1, #2)
> - replace bare numbers with symbolic constants (#2)
> - add Leif's R
On Wed, Feb 28, 2018 at 04:30:50PM +, Ard Biesheuvel wrote:
> On 28 February 2018 at 16:26, Leif Lindholm wrote:
> > On Tue, Feb 27, 2018 at 09:20:14AM +, Ard Biesheuvel wrote:
> >> ACPI is not able to describe PCI resource windows that involve both type
> >> a
On Wed, Feb 28, 2018 at 04:18:50PM +, Ard Biesheuvel wrote:
> On 28 February 2018 at 16:17, Leif Lindholm wrote:
> > On Tue, Feb 27, 2018 at 09:20:13AM +, Ard Biesheuvel wrote:
> >> Fix the static B/D/F specifiers that refer to the pair of x1 PCIe slots
> >&
On Tue, Feb 27, 2018 at 09:20:16AM +, Ard Biesheuvel wrote:
> Create a HII menu option to choose between device tree and ACPI platform
> descriptions.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindholm
&
On Tue, Feb 27, 2018 at 09:20:14AM +, Ard Biesheuvel wrote:
> ACPI is not able to describe PCI resource windows that involve both type
> and address translation (i.e., for I/O windows on architectures that do
> not support port I/O natively), and so the ACPI/Linux code has a hard
> time perform
On Tue, Feb 27, 2018 at 09:20:13AM +, Ard Biesheuvel wrote:
> Fix the static B/D/F specifiers that refer to the pair of x1 PCIe slots
> on the DeveloperBox PCB.
What is the user-observable problem that is addressed by this patch?
> Contributed-under: TianoCore Contribution Agreement 1.1
> Sig
offset and size, and so we
> still need to iterate over the descriptors and split them up.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Thanks for the rework - for the series:
Reviewed-by: Leif Lindholm
> ---
> ArmPlat
On Tue, Jan 02, 2018 at 03:50:34PM +, Ard Biesheuvel wrote:
> Commit 8ae5fc182941 ("ArmPlatformPkg/MemoryInitPeiLib: don't reserve
> primary FV in memory") deleted the code that removes the memory covering
> the primary firmware volume from the memory map. The assumption was that
> this is no l
On Wed, Feb 28, 2018 at 01:03:07AM +, Haojian Zhuang wrote:
> >> diff --git a/EmbeddedPkg/Drivers/VirtualKeyboardDxe/ComponentName.c
> >> b/EmbeddedPkg/Drivers/VirtualKeyboardDxe/ComponentName.c
> >> new file mode 100644
> >> index 000..2935307
> >> --- /dev/null
> >> +++ b/EmbeddedPkg/Dri
On Fri, Feb 23, 2018 at 11:47:28AM +0100, Laszlo Ersek wrote:
> >> I think the solution that saves the most on the *source* code size
> >> is:
> >> - introduce the BeIoLib class
> >> - duplicate the MMIO functions from BaseIoLibIntrinsic to the one
> >> BeIoLib instance that we introduce
> >> - m
; the device tree compiler, and so adding the /plugin/ directive is not
> only unnecessary, it is harmful because it is only understood by those
> same recent compiler versions. So remove it.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
On Tue, Feb 27, 2018 at 07:02:06PM +, Ard Biesheuvel wrote:
> On 27 February 2018 at 18:58, Leif Lindholm wrote:
> > On Tue, Feb 27, 2018 at 06:36:08PM +, Ard Biesheuvel wrote:
> >> On 27 February 2018 at 18:33, Leif Lindholm
> >> wrote:
> >> > O
On Tue, Feb 27, 2018 at 06:36:08PM +, Ard Biesheuvel wrote:
> On 27 February 2018 at 18:33, Leif Lindholm wrote:
> > On Tue, Feb 27, 2018 at 05:51:32PM +, Ard Biesheuvel wrote:
> >> Clang's preprocessor behaves differently from GCC's, and produces
> >>
On Tue, Feb 27, 2018 at 05:51:32PM +, Ard Biesheuvel wrote:
> Clang's preprocessor behaves differently from GCC's, and produces
> intermediate device tree source that still contains #pragma pack()
> and other directives that the device tree compiler chokes on.
>
> For assembling device tree so
t; > I can confirm this resolves the CLANG issue.
> >
> > Could we do this with a CLANG_ALL_ASM_FLAGS, rather than listing each
> > new toolchain profile as they get added?
>
> No, not really. CLANG3x is not a separate toolcha
On Tue, Feb 27, 2018 at 05:19:59PM +, Ard Biesheuvel wrote:
> On 27 February 2018 at 13:47, Ard Biesheuvel
> wrote:
> > The Designware PCIe IP in the SynQuacer SoC needs a little help to
> > appear sane to the OS. Not only does it lack a true root port, and
> > therefore does not perform any
On Mon, Feb 26, 2018 at 04:52:36PM +0800, Haojian Zhuang wrote:
> The virtual keyboard could simulate a keyboard. User could simulate
> a key value when pattern is matched.
How? This is over 2000 lines of new code, please give a little bit
more description of what it does and how it is intended to
series (pending DxeRuntimeDebugLibSerialPort hitting edk2):
Reviewed-by: Leif Lindholm
> ---
> Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 3 +++
> Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc | 3 +++
> Platform/LeMaker/CelloBoard/CelloBoard.dsc
On Fri, Feb 23, 2018 at 01:28:58PM +, Ard Biesheuvel wrote:
> Now that the secure firmware image BL31 has been moved back into secure
> memory where it belongs, we can no longer keep the stage2 translation
> tables in the same image, given that EL2 is non-secure.
>
> So instead, let's put thos
hat has the MultiPhase.h VFR changes.
All of my feedback has been addressed, so for the series:
Reviewed-by: Leif Lindholm
If we get enum support in VfrCompile in the future, a minor cleanup to
the code introduced by 5/6 will be possible, but this is an excellent
start t
On Fri, Feb 23, 2018 at 10:25:32AM +, Gao, Liming wrote:
> I agree the change in MdePkg. Reviewed-by: Liming Gao
Thanks all!
Series pushed as d624deb7ab..aae5def8bb.
___
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https://lists.01.org/mailman/li
On Fri, Feb 23, 2018 at 10:33:46AM +0800, Zeng, Star wrote:
> Leif,
>
> On 2018/2/23 4:09, Leif Lindholm wrote:
> > Hi Star,
> >
> > I lost track of this one during my sabbatical until Ard's patch
> > earlier today jogged my memory.
> >
> > On
On Thu, Feb 22, 2018 at 07:10:52PM +, Ard Biesheuvel wrote:
> >>> +#define MEZZANINE_NONE0x0
> >>> +#define MEZZANINE_SECURE960x1
> >>> +#define MEZZANINE_MAX 0x1
> >>
> >> Would this be simpler as an enum with a pe
VfrCompile is extended to support the original format.
---
to the end of the commit message?
Regards,
Leif
>
>
>
> Thanks,
> Star
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Leif
> Lindholm
> Sent: Saturday, De
So, the ones I haven't commented on in this series, I'm happy with,
but since there may be non-trivial refactoring I'm not posting R-b on yet.
On Tue, Feb 20, 2018 at 05:49:37PM +, Ard Biesheuvel wrote:
> Almost a complete rewrite of the v1. I omitted the patches that add SPI
> and I2C DT node
On Tue, Feb 20, 2018 at 05:49:43PM +, Ard Biesheuvel wrote:
> This adds a driver that manages the 96boards LS connector, i.e, it
> installs a HII page to configure the type of mezzanine that is installed
> in the slot, and it exposes this information via the LS connector protocol.
> It is also
On Tue, Feb 20, 2018 at 05:49:42PM +, Ard Biesheuvel wrote:
> Add a driver that describes the Secure96 mezzanine board, and exposes
> both the information required to describe it to the OS using a DT overlay,
> and to describe it to UEFI itself.
>
> Contributed-under: TianoCore Contribution Ag
On Tue, Feb 20, 2018 at 05:49:41PM +, Ard Biesheuvel wrote:
> Introduce a protocol describing the presence of a 96boards LS connector,
Can you expand the LS here?
(It's used as a proper name, so I don't consider it needing expansion
below, but useful for introduction.)
> and identifying the t
On Thu, Feb 22, 2018 at 01:21:37PM +, Ard Biesheuvel wrote:
> On 22 February 2018 at 13:15, Leif Lindholm wrote:
> > On Tue, Feb 20, 2018 at 05:49:39PM +, Ard Biesheuvel wrote:
> >> Introduce the mezzanine protocol and the 96boards package defining
> >> the PCDs
On Tue, Feb 20, 2018 at 05:49:39PM +, Ard Biesheuvel wrote:
> Introduce the mezzanine protocol and the 96boards package defining
> the PCDs and GUIDs that may be used by implementations of the
> protocol.
This looks really good. Comments below are all style related.
> Contributed-under: Tiano
my feedback from v1 has been addressed, so:
Reviewed-by: Leif Lindholm
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On Thu, Feb 22, 2018 at 09:34:05AM +0100, Laszlo Ersek wrote:
> >> - As long as the specs are LE-only, "endianness opposite to the
> >> executing processor" is needless complication / speculative generality
> >> in my eyes.
> >
> > HTON/NTOH?
>
> I don't understand this reference; host-to-net and
On Thu, Feb 22, 2018 at 11:56:22AM +0100, Laszlo Ersek wrote:
> Sorry, I don't understand how this follows. Again: why is it only a
> temporary solution to implement a PlatformBootManagerLib instance for HiKey?
>
> The library class says "Platform" in the name. Platforms are supposed to
> provide
On Thu, Feb 22, 2018 at 05:26:58PM +0800, Ming Huang wrote:
> These two patchs are missed for 18.02. They are recommended for 18.02.
These look simple enough that I might consider cherry-picking them
into the 18.02 build, but I would also like to see some response to
https://bugs.linaro.org/show_b
On Wed, Feb 21, 2018 at 05:06:02PM +0100, Laszlo Ersek wrote:
> On 02/21/18 16:46, Leif Lindholm wrote:
> > Apologies for dropping the ball on this series during my sabbatical.
> >
> > For this particular patch, I would still like to see a core library
> > provide the n
We need to have a tree where we can build all of the platforms in a
predictable manner, so I am not inclined to take any platform-specific
build helper scripts.
(If a platform that needs some special scripts to post-process the
built image before writing it to a target, that is a different thing.)
Apologies for dropping the ball on this series during my sabbatical.
For this particular patch, I would still like to see a core library
provide the needed functionality. I just sent out an RFC of a possible
implementation.
Regardless, a key point is that this isn't about "big-endian", it is
abou
When performing MMIO to a destination of the opposite endianness to the
executing processor, this library provides automatic byte order reversal
on inputs and outputs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm
---
As promised in the dark and distant
l bits to be de-asserted in
> case of a failure to send the START condition, which is an appropriate
> cleanup action to take after SynQuacerI2cMasterStart() fails.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
Reviewed-by: Leif Lindhol
On Wed, Feb 21, 2018 at 10:44:05AM +, Ard Biesheuvel wrote:
> On 21 February 2018 at 10:24, Leif Lindholm wrote:
> > On Wed, Feb 21, 2018 at 10:19:18AM +, Ard Biesheuvel wrote:
> >> Currently, SynQuacerI2cStartRequest() increases the TPL to TPL_HIGH_LEVEL
> >&
On Wed, Feb 21, 2018 at 10:19:18AM +, Ard Biesheuvel wrote:
> Currently, SynQuacerI2cStartRequest() increases the TPL to TPL_HIGH_LEVEL
> while accessing the I2C controller hardware, but fails to restore the TPL
> to the original level if the call to SynQuacerI2cMasterStart() fails, and
> retur
On Tue, Feb 20, 2018 at 08:20:48AM -0800, Andrew Fish wrote:
> > On Feb 20, 2018, at 6:16 AM, Leif Lindholm wrote:
> >
> > On Tue, Feb 20, 2018 at 11:05:22AM +, Ard Biesheuvel wrote:
> >> +/**
> >> + Prints an assert message containing a filename
On Tue, Feb 20, 2018 at 11:05:24AM +, Ard Biesheuvel wrote:
> BaseDebugLibSerialPort is not suitable for use by DXE_RUNTIME_DRIVER
> modules, so blacklist it for use by such modules.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel
> ---
> MdePkg/Li
On Tue, Feb 20, 2018 at 11:05:22AM +, Ard Biesheuvel wrote:
> +/**
> + Prints an assert message containing a filename, line number, and
> description.
> + This may be followed by a breakpoint or a dead loop.
> +
> + Print a message of the form "ASSERT ():
> \n"
> + to the debug output dev
On Mon, Feb 19, 2018 at 06:19:53PM +, Ard Biesheuvel wrote:
> >> +/**
> >> + Produces and returns an RNG value using either the default or specified
> >> RNG
> >> + algorithm.
> >> +
> >> + @param[in] ThisA pointer to the EFI_RNG_PROTOCOL
> >> instance.
> >> + @param[in]
On Mon, Feb 19, 2018 at 09:43:32AM +, Ard Biesheuvel wrote:
> This adds support for using the random number generator in the Atmel
> AtSha204a over I2C. Other functionality of the chip is currently
> unsupported.
>
> Note that the the I2C support in this device essentially violates the
> proto
On Fri, Feb 16, 2018 at 05:35:27PM +0100, Marcin Wojtas wrote:
> From: Evan Wang
>
> PCIE clock direction (input/output) has implications on comphy settings.
> There are 2 PCIe clocks in CP110:
> - Ref clock 0 for lanes 1,2 and 3
> - Ref clock 1 for lanes 4 and 5
> A proper handling of above
ed-off-by: Haojian Zhuang
For the series:
Reviewed-by: Leif Lindholm
Pushed as 1aaec67..fe7ce8b.
/
Leif
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> But, fair enough.
> >
> > If you change SynQuaver -> SynQuacer in 1-2 subject lines, for the series:
> > Reviewed-by: Leif Lindholm
> >
>
> Excellent, thanks. However, I am going to respin this and make it much
> more generic:
>
> - create a separate,
On Fri, Feb 16, 2018 at 05:35:26PM +0100, Marcin Wojtas wrote:
> From: Igal Liberman
>
> The sample at reset library adds the following functionalities:
> - MvSARGetCpuFreq - Get the CPU frequency
> - MvSARGetDramFreq - Get the DRAM frequency
> - MvSARGetPcieClkDirection - Determine the PCIe cloc
On Fri, Feb 16, 2018 at 06:34:30PM +, Ard Biesheuvel wrote:
> On 16 February 2018 at 17:00, Leif Lindholm wrote:
> > On Thu, Feb 15, 2018 at 05:20:50PM +, Ard Biesheuvel wrote:
> >> Add a node for the SPI controller to the device tree so the OS may
> >> at
On Thu, Feb 15, 2018 at 05:20:49PM +, Ard Biesheuvel wrote:
> This series adds preliminary support for the Secure96 mezzanine board,
> an expansion board that can be plugged into the low speed connector on
> the Socionext SynQuacer based Developer Box platform.
>
> I have attempted to implemen
On Thu, Feb 15, 2018 at 05:20:50PM +, Ard Biesheuvel wrote:
> Add a node for the SPI controller to the device tree so the OS may
> attach to it. This is the SPI controller that is attached to the
> 96boards mezzanine connector on Developer Box.
Just a generic question (which also applies to th
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