[gem5-dev] Change in public/gem5[master]: kvm, arm: Switch to the device EQ when accessing ISA devices

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4288 ) Change subject: kvm, arm: Switch to the device EQ when accessing ISA devices .. kvm, arm: Switch to the device EQ

[gem5-dev] Change in public/gem5[master]: cpu, kvm: Fix deadlock issue when resuming a drained system

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4286 ) Change subject: cpu, kvm: Fix deadlock issue when resuming a drained system .. cpu, kvm: Fix deadlock issue when

[gem5-dev] Change in public/gem5[master]: kvm: Add a helper method to access device event queues

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4287 ) Change subject: kvm: Add a helper method to access device event queues .. kvm: Add a helper method to access device

[gem5-dev] Change in public/gem5[master]: arch-arm: Switch to DTOnly as the default machine type

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4260 ) Change subject: arch-arm: Switch to DTOnly as the default machine type .. arch-arm: Switch to DTOnly as the default

Re: [gem5-dev] gem5 workshop on the 11th September -- Full program now available

Hi Everyone, I accidentally included an incorrect URL to the workshop in the previous email. The correct one is: http://gem5.org/ARM_Research_Summit_2017_Workshop Sorry about the noise. Cheers, Andreas On 01/08/2017 14:30, Andreas Sandberg wrote: Hi Everyone, TLDR; There will be a gem5

[gem5-dev] gem5 workshop on the 11th September -- Full program now available

Hi Everyone, TLDR; There will be a gem5 workshop in Cambridge (UK) on the 11th September. The workshop workshop program is now on the wiki [1]. There is still time to register, see the workshop page [1] for details. We are happy to invite you all to the gem5 workshop [1] at the ARM Research

[gem5-dev] Change in public/gem5[master]: dev: Add a dummy serial device

device Add a dummy serial device that discards any output and doesn't provide any input. This device can be used to terminate UARTs that don't have a default device (e.g., a terminal) attached. Change-Id: I4a6b0b5037ce360f59bfb5c566e1698d113a1d26 Signed-off-by: Andreas Sandberg <andreas.sa

[gem5-dev] Change in public/gem5[master]: dev: Refactor UART->Terminal interface

class that implements this interface. Change-Id: I74fefafbbaf5ac1ec0d4ec0b5a0f4b246fdad305 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> --- M src/dev/SConscript A src/dev/Serial.py M src/dev/Terminal.py M src/dev/Uart.py M sr

[gem5-dev] Change in public/gem5[master]: dev: Move generic serial devices to src/dev/serial

: Move generic serial devices to src/dev/serial Change-Id: I104227fc460f8b561e7375b329a541c1fce881b2 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> --- M src/dev/SConscript M src/dev/alpha/backdoor.cc M src/dev/alpha/tsunami.

[gem5-dev] Change in public/gem5[master]: kvm, arm: Switch to the device EQ when accessing ISA devices

. Switch to doing migrations in the KVM CPU instead to make the behavior consistent. Change-Id: I33b74480fb2126b0786dbdbfdcfa86083384250c Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M src/arch/arm/kvm/armv8_cpu.cc M

[gem5-dev] Change in public/gem5[master]: kvm: Add a helper method to access device event queues

: Ifb10f553a6d7445c8d562f658cf9d0b1f4c577ff Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M src/cpu/kvm/base.cc M src/cpu/kvm/base.hh M src/cpu/kvm/x86_cpu.cc 3 files changed, 16 insertions(+), 8 deletions(-) diff --git a

[gem5-dev] Change in public/gem5[master]: cpu, kvm: Fix deadlock issue when resuming a drained system

. Change-Id: Ibdcc2e034e916a929124f297e72aae306cf66728 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> --- M src/cpu/kvm/base.cc 1 file changed, 7 insertions(+), 0 de

[gem5-dev] Change in public/gem5[master]: arch-arm: Only increment SW PMU counters on writes to PMSWINC

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/4285 Change subject: arch-arm: Only increment SW PMU counters on writes to PMSWINC .. arch-arm: Only increment SW PMU counters

[gem5-dev] Change in public/gem5[master]: arch-x86: Add missing override in the X86 TLB

: Add missing override in the X86 TLB Change-Id: Ie5ef1aaaef46cf8ef8fa4b0fc8f7efb8cde9b489 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M src/arch/x86/tlb.hh 1 file changed, 1 insertion(+), 1 deletion(-) diff --gi

[gem5-dev] Change in public/gem5[master]: python: Make GlobalExitEvent.getCode() return an int

conversion to a Python integer in the wrapper code. Change-Id: I73d6b881025064afa2b2e6eb4512fa2a4b0a87da Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Jose Marinho <jose.mari...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> --- M src/python/p

[gem5-dev] Change in public/gem5[master]: arch-arm: Add missing override keywords in fault.hh

-arm: Add missing override keywords in fault.hh Change-Id: I94a4bf4a633aeed550f8c01ccae824add3b85eb0 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M src/arch/arm/faults.hh 1 file changed, 67 insertions(+),

[gem5-dev] Change in public/gem5[master]: arch-alpha: Add missing overrides

nge-Id: I3a52fcdb449c7df1612466270aa2c9b0a0f3afef Gerrit-Change-Number: 4281 Gerrit-PatchSet: 1 Gerrit-Owner: Andreas Sandberg <andreas.sandb...@arm.com> Gerrit-Reviewer: Nikos Nikoleris <nikos.nikole...@arm.com> ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mai

[gem5-dev] Change in public/gem5[master]: arch-sparc: Add a FaultVals instantiation for VecDisabled

.. arch-sparc: Add a FaultVals instantiation for VecDisabled Recent gcc versions complain about a missing VecDisabled not having an explicit FaultVals instantiation. Change-Id: I439e7b3a7d5cad20590f52b3f374ead3f3f070a6 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by:

Re: [gem5-dev] Python Execution Error

Hi Guys, Thanks for the thorough analysis! I have a patch that fixes the issue by adding an explicit type conversion to the wrapper. I'll post the patch as soon as the CI system has determined that it is worthy. However, I agree with Jason, calling sys.exit(exit_event.getCode()) should be

[gem5-dev] Change in public/gem5[master]: util: Move m5op.h to the shared include directory

to call m5ops still need to link with libm5.a or implement their own trampolines. Change-Id: I36a3f459ed71593e38b869dc2b1302c810f92276 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Jose Marinho <jose.mari...@arm.com> --- A include/gem5/asm/generic/m5op_flags.h M

[gem5-dev] Change in public/gem5[master]: config: Discover CPU timing models based on target ISA

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3947 ) Change subject: config: Discover CPU timing models based on target ISA .. config: Discover CPU timing models based

[gem5-dev] Change in public/gem5[master]: util: Move m5op.h to the shared include directory

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/4265 Change subject: util: Move m5op.h to the shared include directory .. util: Move m5op.h to the shared include directory

[gem5-dev] Change in public/gem5[master]: arch-arm: Use named constants for m5op instructions

-arm: Use named constants for m5op instructions Change-Id: I544519c4f87e50cc02af29cbb3edc31ecf726e8e Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M src/arch/arm/isa/formats/aarch64.isa M src/arch/arm/isa/formats

[gem5-dev] Change in public/gem5[master]: sim: Use named constants for pseudo ops

constants for pseudo ops Use named constants from a shared header instead of magic values when handling pseudo ops. Change-Id: If157060bbcd772ce7e8556482b44ca714f4319b1 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> ---

[gem5-dev] Change in public/gem5[master]: util, m5: Use consistent naming for m5op C symbols

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/4264 Change subject: util, m5: Use consistent naming for m5op C symbols .. util, m5: Use consistent naming for m5op C symbols

[gem5-dev] Change in public/gem5[master]: util: Move the m5ops.h file to a shared directory

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/4261 Change subject: util: Move the m5ops.h file to a shared directory .. util: Move the m5ops.h file to a shared directory

[gem5-dev] Change in public/gem5[master]: arch-arm: Switch to DTOnly as the default machine type

will require this behavior. Change-Id: Icfd085e4862863b4ef495566bfddbd11591866c3 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M configs/example/arm/fs_bigLITTLE.py M configs/example/arm/starter_fs.py M src/arch/arm/

[gem5-dev] Change in public/gem5[master]: config, arm: FS configuration for the ARM starter kit

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4202 ) Change subject: config, arm: FS configuration for the ARM starter kit .. config, arm: FS configuration for the ARM

[gem5-dev] Change in public/gem5[master]: config, arm: SE configuration for the ARM starter kit

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4203 ) Change subject: config, arm: SE configuration for the ARM starter kit .. config, arm: SE configuration for the ARM

[gem5-dev] Change in public/gem5[master]: config, arm: Add a high-performance in order timing model

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4201 ) Change subject: config, arm: Add a high-performance in order timing model .. config, arm: Add a high-performance

[gem5-dev] Change in public/gem5[master]: config: Change mem_range attribute naming in ARM SimpleSystem

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4200 ) Change subject: config: Change mem_range attribute naming in ARM SimpleSystem .. config: Change mem_range

[gem5-dev] Change in public/gem5[master]: config, arm: FS configuration for the ARM starter kit

: Ifa40419d21923a32bb383d58466e421fe4260ddd Signed-off-by: Gabor Dozsa <gabor.do...@arm.com> [ Minor cleanups and more documentation ] Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- A configs/example/arm/starter_fs.py 1 file changed, 242 insertions(+), 0 deletions(-) -- To view, visit

[gem5-dev] Change in public/gem5[master]: config, arm: FS configuration for the ARM starter kit

: Ifa40419d21923a32bb383d58466e421fe4260ddd Signed-off-by: Gabor Dozsa <gabor.do...@arm.com> [ Minor cleanups and more documentation ] Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- A configs/example/arm/starter_fs.py 1 file changed, 237 insertions(+), 0 deletions(-) -- To view, visit

[gem5-dev] Change in public/gem5[master]: config, arm: SE configuration for the ARM starter kit

: Ia32a28eb713ba7050d790327ba6dbb73ec33b53a Signed-off-by: Gabor Dozsa <gabor.do...@arm.com> [ Minor cleanups and more documentation ] Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- A configs/example/arm/starter_se.py 1 file changed, 233 insertions(+), 0 deletions(-) -- To view, visit

[gem5-dev] Change in public/gem5[master]: tests: Fix path for module imports in ARM system configs

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4220 ) Change subject: tests: Fix path for module imports in ARM system configs .. tests: Fix path for module imports in ARM

[gem5-dev] Change in public/gem5[master]: config, arm: Add a high-performance in order timing model

/arm/) are part of the ARM Research Starter Kit on System Modeling. More information can be found at: http://www.arm.com/ResearchEnablement/SystemModeling Change-Id: I124bd06ba42d20abff09d447542b031d17eabe22 Signed-off-by: Ashkan Tousi <ashkan.tousimoja...@arm.com> Signed-off-by: Andreas Sa

[gem5-dev] Change in public/gem5[master]: config, arm: SE configuration for the ARM starter kit

-by: Gabor Dozsa <gabor.do...@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- A configs/example/arm/starter_se.py 1 file changed, 201 insertions(+), 0 deletions(-) diff --git a/configs/example/arm/starter_se.py b/configs/example/arm/starter_se.py new file mode

[gem5-dev] Change in public/gem5[master]: config: Change mem_range attribute naming in ARM SimpleSystem

: I4964c136e53a99c69ff5e086cacb929aa435168d Signed-off-by: Gabor Dozsa <gabor.do...@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- M configs/example/arm/devices.py 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/example/arm/devices.py b/configs/example/ar

[gem5-dev] Change in public/gem5[master]: config, arm: FS configuration for the ARM starter kit

-by: Gabor Dozsa <gabor.do...@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- A configs/example/arm/starter_fs.py 1 file changed, 212 insertions(+), 0 deletions(-) diff --git a/configs/example/arm/starter_fs.py b/configs/example/arm/starter_fs.py new file mode

[gem5-dev] Change in public/gem5[master]: sim: Prevent segfault in the wakeCpu m5op if id is invalid

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3965 ) Change subject: sim: Prevent segfault in the wakeCpu m5op if id is invalid .. sim: Prevent segfault in the wakeCpu

[gem5-dev] Change in public/gem5[master]: cpu: Add missing rename of vector registers in the O3 CPU

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4140 ) Change subject: cpu: Add missing rename of vector registers in the O3 CPU .. cpu: Add missing rename of vector

[gem5-dev] Change in public/gem5[master]: cpu: Add missing rename of vector registers in the O3 CPU

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/4140 Change subject: cpu: Add missing rename of vector registers in the O3 CPU .. cpu: Add missing rename of vector registers

[gem5-dev] Change in public/gem5[master]: tests: Don't treat new stats as a cause for failures

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3962 ) Change subject: tests: Don't treat new stats as a cause for failures .. tests: Don't treat new stats as a cause

[gem5-dev] Change in public/gem5[master]: sim: Prevent segfault in the wakeCpu m5op if id is invalid

.. sim: Prevent segfault in the wakeCpu m5op if id is invalid Change-Id: I86229cedb206e10326cdee3f09a5c871e49c8d48 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- M src/sim/pseudo_inst.cc 1 file changed, 8 insertions(+), 1 deletion(-) -- To view, visit https:

[gem5-dev] Change in public/gem5[master]: cpu, sim: Add param to force CPUs to wait for GDB

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3963 ) Change subject: cpu, sim: Add param to force CPUs to wait for GDB .. cpu, sim: Add param to force CPUs to wait

[gem5-dev] Change in public/gem5[master]: dev-arm: Add ID registers to the GIC model

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3961 ) Change subject: dev-arm: Add ID registers to the GIC model .. dev-arm: Add ID registers to the GIC model Implement

[gem5-dev] Change in public/gem5[master]: cpu, sim: Add param to force CPUs to wait for GDB

: I4d62c68ce9adf69344bccbb44f66e30b33715a1c [ Update info message to include remote GDB port, rename param. ] Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- M src/base/remote_gdb.cc M src/base/remote_gdb.hh M src/cpu/BaseCPU.py M src/cpu/base.cc M src/cpu/base.hh M src/sim/system.cc 6 files chang

[gem5-dev] Change in public/gem5[master]: arch-arm: Support PMU evens in the 0x4000-0x4040 range

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3960 ) Change subject: arch-arm: Support PMU evens in the 0x4000-0x4040 range .. arch-arm: Support PMU evens in the 0x4000

[gem5-dev] Change in public/gem5[master]: dev-arm: Don't unconditionally overwrite bootloader params

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3967 ) Change subject: dev-arm: Don't unconditionally overwrite bootloader params .. dev-arm: Don't unconditionally

[gem5-dev] Change in public/gem5[master]: dev: Fix OnIdle test in DmaReadFifo

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3966 ) Change subject: dev: Fix OnIdle test in DmaReadFifo .. dev: Fix OnIdle test in DmaReadFifo OnIdle() is never called

[gem5-dev] Change in public/gem5[master]: dev: Fix address type promotion issues in VirtIO devices

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3968 ) Change subject: dev: Fix address type promotion issues in VirtIO devices .. dev: Fix address type promotion issues

[gem5-dev] Change in public/gem5[master]: sim: Fix clashing stat names in TickedObject and Ticked

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3964 ) Change subject: sim: Fix clashing stat names in TickedObject and Ticked .. sim: Fix clashing stat names

[gem5-dev] Change in public/gem5[master]: kvm, arm: don't create interrupt events while saving GIC state

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3661 ) Change subject: kvm, arm: don't create interrupt events while saving GIC state .. kvm, arm: don't create interrupt

[gem5-dev] Change in public/gem5[master]: kvm, arm: don't create interrupt events while saving GIC state

Andreas Sandberg has uploaded a new patch set (#2) to the change originally created by Curtis Dunham. ( https://gem5-review.googlesource.com/3661 ) Change subject: kvm, arm: don't create interrupt events while saving GIC state

[gem5-dev] Change in public/gem5[master]: cpu, sim: Add param to force CPUs to wait for GDB

: I4d62c68ce9adf69344bccbb44f66e30b33715a1c [ Update info message to include remote GDB port, rename param. ] Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> --- M src/base/remote_gdb.cc M src/base/remote_gdb.hh M src/cpu/BaseCPU.py M src/cpu/base.cc M src/cpu/base.hh M src/sim/system.cc 6 files chang

[gem5-dev] Change in public/gem5[master]: kvm, arm: Don't forward IRQ/FIQ when using the kernel's GIC

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3660 ) Change subject: kvm, arm: Don't forward IRQ/FIQ when using the kernel's GIC .. kvm, arm: Don't forward IRQ/FIQ when

[gem5-dev] Change in public/gem5[master]: dev: Fix address type promotion issues in VirtIO devices

Andreas Sandberg has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/3968 ) Change subject: dev: Fix address type promotion issues in VirtIO devices .. dev: Fix address type promotion issues in VirtIO

[gem5-dev] Change in public/gem5[master]: dev: Fix OnIdle test in DmaReadFifo

Andreas Sandberg has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/3966 ) Change subject: dev: Fix OnIdle test in DmaReadFifo .. dev: Fix OnIdle test in DmaReadFifo OnIdle() is never called since DMA

[gem5-dev] Change in public/gem5[master]: dev-arm: Don't unconditionally overwrite bootloader params

Andreas Sandberg has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/3967 ) Change subject: dev-arm: Don't unconditionally overwrite bootloader params .. dev-arm: Don't unconditionally overwrite

[gem5-dev] Change in public/gem5[master]: sim: Prevent seqfault in the wakeCpu m5op if id is invalid

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3965 Change subject: sim: Prevent seqfault in the wakeCpu m5op if id is invalid .. sim: Prevent seqfault in the wakeCpu m5op if id

[gem5-dev] Change in public/gem5[master]: sim: Fix clashing stat names in TickedObject and Ticked

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3964 Change subject: sim: Fix clashing stat names in TickedObject and Ticked .. sim: Fix clashing stat names in TickedObject

[gem5-dev] Change in public/gem5[master]: dev-arm: Don't unconditionally overwrite bootloader params

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3967 Change subject: dev-arm: Don't unconditionally overwrite bootloader params .. dev-arm: Don't unconditionally overwrite

[gem5-dev] Change in public/gem5[master]: dev: Fix OnIdle test in DmaReadFifo

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3966 Change subject: dev: Fix OnIdle test in DmaReadFifo .. dev: Fix OnIdle test in DmaReadFifo OnIdle() is never called since DMA

[gem5-dev] Change in public/gem5[master]: dev: Fix address type promotion issues in VirtIO devices

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3968 Change subject: dev: Fix address type promotion issues in VirtIO devices .. dev: Fix address type promotion issues in VirtIO

[gem5-dev] Change in public/gem5[master]: cpu, sim: Add param to force CPUs to wait for GDB

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3963 Change subject: cpu, sim: Add param to force CPUs to wait for GDB .. cpu, sim: Add param to force CPUs to wait for GDB

[gem5-dev] Change in public/gem5[master]: tests: Don't treat new stats as a cause for failures

-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M tests/diff-out M tests/testing/units.py 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/tests/diff-out b/tests/diff-out index c00d4f3..1eeac81 100755 --- a/te

[gem5-dev] Change in public/gem5[master]: dev-arm: Add ID registers to the GIC model

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3961 Change subject: dev-arm: Add ID registers to the GIC model .. dev-arm: Add ID registers to the GIC model Implement GICD_IIDR

[gem5-dev] Change in public/gem5[master]: arch-arm: Support PMU evens in the 0x4000-0x4040 range

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3960 Change subject: arch-arm: Support PMU evens in the 0x4000-0x4040 range .. arch-arm: Support PMU evens in the 0x4000-0x4040

[gem5-dev] Change in public/gem5[master]: arch: added generic vector register

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/2704 ) Change subject: arch: added generic vector register .. arch: added generic vector register This commit adds a new

[gem5-dev] Change in public/gem5[master]: cpu: Physical register structural + flat indexing

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/2701 ) Change subject: cpu: Physical register structural + flat indexing .. cpu: Physical register structural + flat

[gem5-dev] Change in public/gem5[master]: arch: ISA parser additions of vector registers

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/2706 ) Change subject: arch: ISA parser additions of vector registers .. arch: ISA parser additions of vector registers

[gem5-dev] Change in public/gem5[master]: cpu: Result refactoring

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/2703 ) Change subject: cpu: Result refactoring .. cpu: Result refactoring The Result union used to collect the result

[gem5-dev] Change in public/gem5[master]: cpu: Added interface for vector reg file

Andreas Sandberg has uploaded a new patch set (#4) to the change originally created by Curtis Dunham. ( https://gem5-review.googlesource.com/2705 ) Change subject: cpu: Added interface for vector reg file .. cpu: Added

[gem5-dev] Change in public/gem5[master]: arm, kvm: update CP15 timer model when exiting Kvm

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3543 ) Change subject: arm,kvm: update CP15 timer model when exiting Kvm .. arm,kvm: update CP15 timer model when exiting

[gem5-dev] Change in public/gem5[master]: dev, arm: add Kvm mode of operation for CP15 timer

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3542 ) Change subject: dev,arm: add Kvm mode of operation for CP15 timer .. dev,arm: add Kvm mode of operation for CP15

[gem5-dev] Change in public/gem5[master]: kvm: move Kvm check from ARM Kvm GIC to System

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3540 ) Change subject: kvm: move Kvm check from ARM Kvm GIC to System .. kvm: move Kvm check from ARM Kvm GIC to System

[gem5-dev] Change in public/gem5[master]: dev, arm: remove and recreate timer events around drains

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3541 ) Change subject: dev,arm: remove and recreate timer events around drains .. dev,arm: remove and recreate timer events

[gem5-dev] Change in public/gem5[master]: config, arm: Don't import timing models for missing CPUs

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3946 ) Change subject: config, arm: Don't import timing models for missing CPUs .. config, arm: Don't import timing models

[gem5-dev] Change in public/gem5[master]: config, arm: Don't import timing models for missing CPUs

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3946 Change subject: config, arm: Don't import timing models for missing CPUs .. config, arm: Don't import timing models

[gem5-dev] Change in public/gem5[master]: config: Discover CPU timing models based on target ISA

Andreas Sandberg has uploaded this change for review. ( https://gem5-review.googlesource.com/3947 Change subject: config: Discover CPU timing models based on target ISA .. config: Discover CPU timing models based on target

[gem5-dev] Change in public/gem5[master]: config: Move core timing models to config/common/cores

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3943 ) Change subject: config: Move core timing models to config/common/cores .. config: Move core timing models to config

[gem5-dev] Change in public/gem5[master]: config: Make ex5_*.py independent of old configs

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3942 ) Change subject: config: Make ex5_*.py independent of old configs .. config: Make ex5_*.py independent of old configs

[gem5-dev] Change in public/gem5[master]: config: Clean up core timing model discovery

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3944 ) Change subject: config: Clean up core timing model discovery .. config: Clean up core timing model discovery Instead

[gem5-dev] Change in public/gem5[master]: config: Make ex5_*.py independent of old configs

to derive from the base SimObjects instead. Change-Id: I999e73bb9cc21ad96865c1bc0dd5973faa48ab61 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <gabor.do...@arm.com> --- M configs/common/ex5_LITTLE.py M configs/common/ex5_big.py 2 files changed, 34 inser

[gem5-dev] Change in public/gem5[master]: config: Move core timing models to config/common/cores

.. config: Move core timing models to config/common/cores Change-Id: I189b6462cc64f7cc6c1b7a6c2af1abb60e1854de Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <gabor.do...@arm.com> --- M configs/common/CacheConfig.py M configs/common/

[gem5-dev] Change in public/gem5[master]: config: Clean up core timing model discovery

: Clean up core timing model discovery Instead of hard-coding timing models in CpuConfig.py, use introspection to find them in the cores.arm model package. Change-Id: I6642dc9cbc3f5bc748e716c9426c233d51ea Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <

[gem5-dev] Change in public/gem5[master]: config: Add missing import of 'fatal' in CpuConfig

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3941 ) Change subject: config: Add missing import of 'fatal' in CpuConfig .. config: Add missing import of 'fatal

[gem5-dev] Change in public/gem5[master]: config: Make some MemConfig options optional

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3940 ) Change subject: config: Make some MemConfig options optional .. config: Make some MemConfig options optional

[gem5-dev] Change in public/gem5[master]: config: Make some MemConfig options optional

: I2d73be2454427b00db16716edcfd96a47133c888 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <gabor.do...@arm.com> --- M configs/common/MemConfig.py 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/configs/common/MemConfig.py b/configs/common/MemCon

[gem5-dev] Change in public/gem5[master]: config: Move core timing models to config/common/cores

.. config: Move core timing models to config/common/cores Change-Id: I189b6462cc64f7cc6c1b7a6c2af1abb60e1854de Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <gabor.do...@arm.com> --- M configs/common/CacheConfig.py M configs/common/CpuConfig.py A configs/

[gem5-dev] Change in public/gem5[master]: config: Clean up core timing model discovery

up core timing model discovery Instead of hard-coding timing models in CpuConfig.py, use introspection to find them in the cores.arm model package. Change-Id: I6642dc9cbc3f5bc748e716c9426c233d51ea Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <

[gem5-dev] Change in public/gem5[master]: config: Add missing import of 'fatal' in CpuConfig

: Add missing import of 'fatal' in CpuConfig Change-Id: I7762d344cb964c3e010135ff928c6ea12538912c Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <gabor.do...@arm.com> --- M configs/common/CpuConfig.py 1 file changed, 1 insertion(+), 0 deletions(-)

Re: [gem5-dev] Vector registers patch series

Hi Everyone, First of all, a big thank you to everyone who has taken the time to review this patch set! I know how big this patch set is and how long it takes to grasp it all. Curtis is currently on vacation, so I took the liberty to rebase the patch set in preparation to submit it. While doing

[gem5-dev] Change in public/gem5[master]: cpu: Added interface for vector reg file

Andreas Sandberg has uploaded a new patch set (#3) to the change originally created by Curtis Dunham. ( https://gem5-review.googlesource.com/2705 ) Change subject: cpu: Added interface for vector reg file .. cpu: Added

[gem5-dev] Change in public/gem5[master]: arch, cpu: Architectural Register structural indexing

Andreas Sandberg has uploaded a new patch set (#3) to the change originally created by Curtis Dunham. ( https://gem5-review.googlesource.com/2700 ) Change subject: arch, cpu: Architectural Register structural indexing .. arch

[gem5-dev] Change in public/gem5[master]: cpu: Simplify the rename interface and use RegId

Andreas Sandberg has uploaded a new patch set (#3) to the change originally created by Curtis Dunham. ( https://gem5-review.googlesource.com/2702 ) Change subject: cpu: Simplify the rename interface and use RegId .. cpu

[gem5-dev] gem5 workshop at the ARM Research Summit

veloper.arm.com/research/summit> [2]. Early registration end on the 7th July and standard registration ends on the 13th August. = Can I contribute? = Yes! We can still accommodate a shorter talks (15 min including questions). Let Andreas Sandberg (andreas.sandb...@arm.com<mailto:andreas.sandb.

[gem5-dev] Broken RISCV regressions

Hi Everyone, It seems like 'arch-riscv: Fix bad stack initialization' (76692f3) broke RISCV regressions. When I run RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing, I get: fatal: readBlob(0x0, ...) failed Could someone who skilled in the arts of RISCV SE mode have a look? Thanks,

[gem5-dev] Change in public/gem5[master]: mem-cache: Add missing overrides to BaseCache

Andreas Sandberg has submitted this change and it was merged. ( https://gem5-review.googlesource.com/3880 ) Change subject: mem-cache: Add missing overrides to BaseCache .. mem-cache: Add missing overrides to BaseCache

[gem5-dev] Change in public/gem5[master]: mem-cache: Add missing overrides to BaseCache

: Add missing overrides to BaseCache Change-Id: I6a3a57e3067c247bd6ce6f01ac9459883f4aae2c Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> --- M src/mem/cache/base.hh 1 file changed, 6 insertions(+), 6 deletions(-) diff

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