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Diff: http://reviews.gem5.org/r/3701/diff/
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src/arch/arm/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/arch/generic/types.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/arch/arm/linux/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
Diff: http://reviews.gem5.org/r/3696/diff/
Testing
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c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/arch/x86/linux/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/sim/Process.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
Diff: http://reviews.gem5.org/r/3681/diff/
Testing
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> On Nov. 8, 2016, 4:56 p.m., Jason Lowe-Power wrote:
> > src/sim/system.hh, line 543
> > <http://reviews.gem5.org/r/3681/diff/1/?file=63244#file63244line543>
> >
> > Can this just be an std::set? This is only used to make sure there
> > are no dupli
c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/sim/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/sim/system.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
Diff: http://reviews.gem5.org/r/3681/diff/
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c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/sim/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
src/sim/syscall_emul.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
Diff: http://reviews.gem5.org/r/3681/diff/
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-------
On Nov. 7, 2016, 9:56 p.m., Brandon Potter wrote:
>
> ---
> This is an automatically generated e-mail. T
On Nov. 10, 2016, 10:52 p.m., Brandon Potter wrote:
> > Minor issue, otherwise it LGTM, assuming you address Jason's comments as
> > well.
I'm going to create a separate patch that does this after all of my other
patches are applied. I don't want to have to go through each one
/se_signal.hh PRE-CREATION
src/sim/SConscript c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4
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needs to be implemented for the other architectures too.)
- Brandon Potter
On Oct. 27, 2016, 7:45 a.m., Andreas Hansson wrote:
>
> ---
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/arch/arm/faults.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
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syscall_emul: [PATCH 22/22] ignore system calls that are unimplemented.
Diffs
-
src/arch/x86/linux/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3703/diff/
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/arch/x86/linux/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/syscall_emul.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/syscall_emul.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3699/diff/
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/linux.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/syscall_emul.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3698/diff/
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: http://reviews.gem5.org/r/3697/diff/
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4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/x86/types.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/cpu/checker/thread_context.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3696/diff/
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src/sim/syscall_emul.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3681/diff/
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>
> ---
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f multiple types of Process classes, but there could have been a good
> reason. I haven't run into any problems with this code before. I was just
> suggesting a little more housekeeping while you were here.
>
> Brandon Potter wrote:
> Really, I'd rather not alter how this is curr
PRE-CREATION
src/sim/syscall_emul.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/syscall_emul.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3671/diff/
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> On Oct. 17, 2016, 10:17 p.m., Michael LeBeane wrote:
> > src/sim/fd_entry.hh, line 140
> > <http://reviews.gem5.org/r/3676/diff/1/?file=61681#file61681line140>
> >
> > Can you rename this to something more descriptive, like
> > HostMappedFDEntry?
&g
4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3676/diff/
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>
> ---
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> http://reviews.gem5.org/r/3676/
> ---
>
be inferred by the context. Many of the fields were left
uninitialized so it was bug prone.)
Anyways, this is pertinent. Thanks for highlighting it. (I might end up going
this route.)
- Brandon
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n
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t feedback on
how to handle them.
- Brandon
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ss.
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-----------
On Oct. 17, 2016, 3:17 p.m., Brandon Potter wrote:
>
> ---
> This is
Why this change?
"size" puts the end of the line past our restriction
- Brandon
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>
> ---
/arch/alpha/tru64/tru64.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3682/diff/
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/syscall_desc.cc PRE-CREATION
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4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/alpha/linux/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3677/diff/
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src/arch/arm/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3674/diff/
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)
-
src/arch/sparc/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/x86/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3675/diff/
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/tru64/tru64.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/alpha/tru64/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3673/diff/
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code.
Diffs
-
src/sim/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/process.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3672/diff/
Testing
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4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/sparc/process.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3671/diff/
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4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/sparc/faults.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/arch/alpha/process.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3670/diff/
Testing
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4a86763c0b30cccba0f56c7f48637a46a4663b06
src/sim/syscallreturn.hh 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3662/diff/
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4a86763c0b30cccba0f56c7f48637a46a4663b06
src/cpu/simple/timing.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/cpu/simple_thread.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3660/diff/
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://reviews.gem5.org/r/3643/diff/
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/vtophys.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/base/atomicio.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
src/base/bigint.cc 4a86763c0b30cccba0f56c7f48637a46a4663b06
Diff: http://reviews.gem5.org/r/3660/diff/
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ons of the same
thing to make it work.
- Brandon
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Diff: http://reviews.gem5.org/r/3675/diff/
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On Oct. 11, 2016, 9:06 p.m., Brandon Potter wrote:
>
> ---
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> http://reviews.gem5.org/r/3662/
> -
/syscall_debug_macros.hh PRE-CREATION
src/sim/syscall_desc.hh PRE-CREATION
Diff: http://reviews.gem5.org/r/3662/diff/
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220fa4099b9a91526b8a1828f27cf1a9f3c15837
src/base/bitfield.hh 220fa4099b9a91526b8a1828f27cf1a9f3c15837
src/base/bitunion.hh 220fa4099b9a91526b8a1828f27cf1a9f3c15837
src/base/time.cc 220fa4099b9a91526b8a1828f27cf1a9f3c15837
Diff: http://reviews.gem5.org/r/3661/diff/
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220fa4099b9a91526b8a1828f27cf1a9f3c15837
src/arch/x86/system.cc 220fa4099b9a91526b8a1828f27cf1a9f3c15837
src/arch/x86/tlb.cc 220fa4099b9a91526b8a1828f27cf1a9f3c15837
Diff: http://reviews.gem5.org/r/3660/diff/
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> On Oct. 7, 2016, 10:24 p.m., Brandon Potter wrote:
> > Do you think it's worthwhile to adopt a more detailed organization for
> > headers?
> >
> > Currently, we have this:
> > 1) primary header (foo.hh for foo.cc)
> > 2) mix of C/C++ headers alphab
like panic and
fatal). This reordering may cause further issues for poorly named macros so
we should discuss this more generally.
Diffs
-
src/base/loader/dtb_object.cc 220fa4099b9a91526b8a1828f27cf1a9f3c15837
Diff: http://reviews.gem5.org/r/3650/diff/
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easier to identify an include if you happen to glance
up at the header sections, but that seems minor and probably isn't their
justification. Does anyone else have thoughts on the topic?
- Brandon Potter
On Oct. 7, 2016, 3:11 p.m., Andreas Sandberg wrote
gem5-public-process/src/python/m5/SimObject.py",
line 1105, in __getattr__
raise AttributeError, err_string
AttributeError: object 'SimpleIntLink' has no attribute 'dst_node'
(C++ object is not yet constructed, so wrapped C++ methods are unavailable.)
- Brandon Potter
On Oct. 7, 2016,
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-----------
On Oct. 5, 2016, 4:27 p.m., Brandon Potter wrote:
>
> ---
&g
fixed, I can try to see
if I can pursue this for the remaining directories in "src".
Anyways, the patch is going through regressions now. I'll post the update when
it finishes.
- Brandon
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/
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Ship it!
Ship It!
- Brandon Potter
On Sept. 27, 2016, 10:08 p.m
em5.org/r/3583/#comment7523>
remove whitespace on lines 305, 307, 311, and 313
src/sim/syscall_emul.cc (line 363)
<http://reviews.gem5.org/r/3583/#comment7521>
space around '='
src/sim/syscall_emul.cc (line 383)
<http://reviews.gem5.org/r/3583/#comment7522>
spac
d the
code.
Otherwise, the errno value might get clobbered before you return it.
src/sim/syscall_emul.cc (line 380)
<http://reviews.gem5.org/r/3583/#comment7474>
space
- Brandon Potter
On Aug. 8, 2016, 9:18 a.m., Nicolas Derumigny wrote:
>
> ---
not personally familiar enough with why the shadow memory is needed
> to be able to say how much effort it would take to remove, but I believe so.
>
> Brandon Potter wrote:
> Providing background since some might not be familiar with the problem.
>
> __The following lin
> On Aug. 5, 2016, 7:15 a.m., Andreas Hansson wrote:
> > I see how this works as a stop gap, but ultimately I would like to push for
> > the removal of the shadow memory as the first option. Is it really that
> > much effort?
>
> David Hashe wrote:
> I'm not personally familiar enough
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- Brandon Potter
On July 23, 2016, 1:16 p.m
and testing it. We've talked about
it here at AMD and it will be solved at some point in the future.
- Brandon
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of
the clock period used by the ruby system) when issuing requests through
the ruby port object to attached objects.
Diffs (updated)
-
src/mem/ruby/system/RubyPort.cc cfad34a15729e1d5e096245f5a80ded6e2c379ca
Diff: http://reviews.gem5.org/r/3451/diff/
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/mem/ruby/system/Sequencer.cc cfad34a15729e1d5e096245f5a80ded6e2c379ca
src/mem/ruby/system/Sequencer.py cfad34a15729e1d5e096245f5a80ded6e2c379ca
Diff: http://reviews.gem5.org/r/3442/diff/
Testing
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eview8203
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> -
issuing requests through
the ruby port object to attached objects.
Diffs
-
src/mem/ruby/system/RubyPort.cc cfad34a15729e1d5e096245f5a80ded6e2c379ca
Diff: http://reviews.gem5.org/r/3451/diff/
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and everything correctly).
- Brandon
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>
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3433/
> -
h that needs to be applied before this?
>
> Brandon Potter wrote:
> This change fixes the L0Cache enumeration problem mentioned above:
> http://reviews.gem5.org/r/3440/
>
> All of the patches are posted to ReviewBoard. This review request has a
> description of th
st functions.
> >
> > Maybe I'm wrong, and maybe it's actually worse this way. What do you
> > think?
>
> Brandon Potter wrote:
> If you make these functions members of the RubySystem object, you run
> into the issue where you need to pass the RubySystem
e bigger picture here?
>
> Brandon Potter wrote:
> __TL;DR: Never uses global variables, static class members, or static
> variable declarations in function bodies. If you do, someone will come
> knocking on your office door in the future; it might be me.__
>
> The bigge
nnecting them directly to the L1 caches. Since both are private to the
> > connected core, it seems superfluous to run their activity through the
> > network; They only communicate with each other through these MessageBuffers.
> >
> > Is there a bigger need for this t
do not think that my other changes
affect it (although I am not %100 sure; were quite a few changes in my patches).
- Brandon
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--
> On April 13, 2016, 6:17 p.m., Jason Lowe-Power wrote:
> > Before this patch this protocol was broken? From the changes, it doesn't
> > even look like it would have compiled. Is this true? In one way I'm shocked
> > this happend. In another I'm not surprised at all... :
upported protocols.
- Brandon
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http://reviews.gem5.org/r/3441/#review8209
---
On April 4, 2016, 1
.
- Brandon
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This is an automatically generated e-mail. To reply, visit:
http://reviews.gem5.org/r/3421/#review8175
---
On April 4, 2016, 11:40 p.m., Brandon Potter wrote:
>
y patches, I'm having a hard time following.
>
> I really don't like the idea of passing around this parameter everywhere.
> I'd like to understand better the problem so I can try my hand at a cleaner
> solution.
>
> Brandon Potter wrote:
> Right, I broke t
lly generated e-mail. To reply, visit:
http://reviews.gem5.org/r/3422/#review8178
-----------
On April 4, 2016, 11:40 p.m., Brandon Potter wrote:
>
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.or
st functions.
> >
> > Maybe I'm wrong, and maybe it's actually worse this way. What do you
> > think?
>
> Brandon Potter wrote:
> If you make these functions members of the RubySystem object, you run
> into the issue where you need to pass the RubySystem
lable.
Let me know if you disagree; I'm open to further suggestions.
- Brandon
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http://reviews.gem5.org/r/3424/#review8180
-----------
On April 4, 2016, 11:40 p.m., Brandon Potter wrote:
>
>
> On April 6, 2016, 9:39 p.m., Andreas Hansson wrote:
> > Could you explain why?
> >
> > In general, for all of these patches, could you please add a brief
> > description of the "why"?
>
> Brandon Potter wrote:
> The diatribe that I just po
h the XBar) already has support for
> > interleaving and hashing.
>
> Brandon Potter wrote:
> With these patches that handle routing based on certain ranges of the
> address, it seems that this is well aligned for that adoption. I'm not too
> familiar with how classic does it's
cfad34a15729e1d5e096245f5a80ded6e2c379ca
> src/mem/ruby/system/VIPERCoalescer.cc
> cfad34a15729e1d5e096245f5a80ded6e2c379ca
>
> Diff: http://reviews.gem5.org/r/3419/diff/
>
>
> Testing
> ---
>
>
> Thanks,
>
> Brandon Potter
>
>
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ng depending on how
the reader interprets it; one might just glance at this code and think that the
mandatory queue gets blocked when in reality it's all of the other message
buffers.
- Brandon Potter
On Oct. 16, 2015, 1:55 p.m., Joel He
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