[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Added flexibility to RISC-V FS config

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/43625 ) Change subject: arch-riscv: Added flexibility to RISC-V FS config .. arch-riscv: Added flexibility to RISC-V FS config Made

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-riscv: Added flexibility to RISC-V FS config

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/43625 ) Change subject: arch-riscv: Added flexibility to RISC-V FS config .. arch-riscv: Added flexibility to RISC-V FS

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-riscv: Fix Clint and SATP write side effects

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/43244 ) Change subject: arch-riscv: Fix Clint and SATP write side effects .. arch-riscv: Fix Clint and SATP write side effects

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-riscv: Added DTB Generation Functionality to RISC-V FS

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/42053 ) Change subject: arch-riscv: Added DTB Generation Functionality to RISC-V FS .. arch-riscv: Added DTB Generation

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch,cpu: Stop using << and to_number for VecReg serialization.

Attention is currently required from: Giacomo Travaglini. Hello kokoro, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43243 to review the following change. Change subject: arch,cpu: Stop using << and to_number for

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-riscv: Fix Clint and SATP write side effects

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/43244 ) Change subject: arch-riscv: Fix Clint and SATP write side effects .. arch-riscv: Fix Clint and SATP write side

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: cpu: Eliminate the unused "lane" interface from the ThreadContext.

Attention is currently required from: Gabe Black. Hello kokoro, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43240 to review the following change. Change subject: cpu: Eliminate the unused "lane" interface from the

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch: Eliminate the "Lane" view of vector registers.

Attention is currently required from: Giacomo Travaglini. Hello kokoro, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43241 to review the following change. Change subject: arch: Eliminate the "Lane" view of vector

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch: Simplify and correct style of VecReg types.

Attention is currently required from: Giacomo Travaglini. Hello kokoro, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43242 to review the following change. Change subject: arch: Simplify and correct style of VecReg

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Add a szext function for true sign extension.

Attention is currently required from: Daniel Carvalho. Hello kokoro, Daniel Carvalho, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43236 to review the following change. Change subject: base: Add a szext function for true sign

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Remove "inline" from bitfield.hh.

Attention is currently required from: Daniel Carvalho. Hello kokoro, Daniel Carvalho, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43237 to review the following change. Change subject: base: Remove "inline" from bitfield.hh.

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-arm,base,dev: Eliminate the power() function from intmath.hh.

Attention is currently required from: Gabe Black. Hello kokoro, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43238 to review the following change. Change subject: arch-arm,base,dev: Eliminate the power() function from

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Adding static constexpr keywords to log2i

Attention is currently required from: Giacomo Travaglini, Gabe Black. Hello kokoro, Giacomo Travaglini, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43239 to review the following change. Change subject: base: Adding

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Add log2i to calculate log2 for integers

Attention is currently required from: Daniel Carvalho, Giacomo Travaglini. Hello kokoro, Daniel Carvalho, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43234 to review the following change. Change subject: base:

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Make the functions in intmath.hh constexpr.

Attention is currently required from: Daniel Carvalho. Hello kokoro, Daniel Carvalho, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43233 to review the following change. Change subject: base: Make the functions in intmath.hh

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: mem: Fix some transitive includes.

Attention is currently required from: Daniel Carvalho. Hello kokoro, Daniel Carvalho, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43235 to review the following change. Change subject: mem: Fix some transitive includes.

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: cpu: Remove "lane" accessors from the ExecContext classes.

Attention is currently required from: Gabe Black. Hello kokoro, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43230 to review the following change. Change subject: cpu: Remove "lane" accessors from the ExecContext classes.

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch,arch-arm: Eliminate the "zeroing" field of vec reg elements.

Attention is currently required from: Giacomo Travaglini. Hello kokoro, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43224 to review the following change. Change subject: arch,arch-arm: Eliminate the "zeroing"

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: sim: Simplify some code in the guest ABI mechanism.

Attention is currently required from: Gabe Black. Hello kokoro, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43228 to review the following change. Change subject: sim: Simplify some code in the guest ABI mechanism.

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-arm: Consolidate defintions of vectorReg operands.

Attention is currently required from: Giacomo Travaglini. Hello kokoro, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43225 to review the following change. Change subject: arch-arm: Consolidate defintions of

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: cpu: Style fixes in the base and O3 dynamic inst classes.

Attention is currently required from: Daniel Carvalho. Hello kokoro, Daniel Carvalho, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43226 to review the following change. Change subject: cpu: Style fixes in the base and O3 dynamic inst

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-arm: Switch the AAPCS ABIs to .as<>() instead of .laneView<>().

Attention is currently required from: Giacomo Travaglini. Hello kokoro, Giacomo Travaglini, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43229 to review the following change. Change subject: arch-arm: Switch the AAPCS ABIs to .as<>()

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-mips: Fix a bug in the MIPS yield instruction.

Attention is currently required from: Boris Shingarov. Hello kokoro, Boris Shingarov, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43231 to review the following change. Change subject: arch-mips: Fix a bug in the MIPS yield

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Add a macro to expand parameter pack expressions in order.

Attention is currently required from: Gabe Black. Hello kokoro, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43227 to review the following change. Change subject: base: Add a macro to expand parameter pack expressions in

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-sparc: Fix an operator precedence bug in the iob device.

Attention is currently required from: Boris Shingarov. Hello kokoro, Boris Shingarov, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43232 to review the following change. Change subject: arch-sparc: Fix an operator precedence bug in

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: base: Remove DDUMPN

Attention is currently required from: Daniel Carvalho, Gabe Black. Hello kokoro, Daniel Carvalho, Gabe Black, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/43223 to review the following change. Change subject: base: Remove DDUMPN

[gem5-dev] Change in gem5/gem5[release-staging-v21-0]: arch-riscv: Fixing RISC-V remote GDB MIP and MIE accesses.

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/39816 ) Change subject: arch-riscv: Fixing RISC-V remote GDB MIP and MIE accesses. .. arch-riscv: Fixing RISC-V remote GDB MIP and

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Added DTB Generation Functionality to RISC-V FS

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/42053 ) Change subject: arch-riscv: Added DTB Generation Functionality to RISC-V FS .. arch-riscv: Added DTB Generation

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Fixed CPU switching and PLIC issue with MinorCPU

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/41933 ) Change subject: arch-riscv: Fixed CPU switching and PLIC issue with MinorCPU .. arch-riscv: Fixed CPU switching

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Implementation of CLINT

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/40597 ) Change subject: arch-riscv: Implementation of CLINT .. arch-riscv: Implementation of CLINT This patch implements the CLINT

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: RISC-V HiFive Platform implementation

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/40599 ) Change subject: arch-riscv: RISC-V HiFive Platform implementation .. arch-riscv: RISC-V HiFive Platform implementation This

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: PLIC Implementation

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/40598 ) Change subject: arch-riscv: PLIC Implementation .. arch-riscv: PLIC Implementation This patch contains the implementation

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Added PMA support for RiscvTLB

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/40596 ) Change subject: arch-riscv: Added PMA support for RiscvTLB .. arch-riscv: Added PMA support for RiscvTLB Since the RISC-V

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: FS Linux config file for RISC-V

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/41033 ) Change subject: arch-riscv: FS Linux config file for RISC-V .. arch-riscv: FS Linux config file for RISC-V This file is

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Fixing interrupt handling order and effect of mideleg

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/40076 ) Change subject: arch-riscv: Fixing interrupt handling order and effect of mideleg .. arch-riscv: Fixing interrupt

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: FS Linux config file for RISC-V

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/41033 ) Change subject: arch-riscv: FS Linux config file for RISC-V .. arch-riscv: FS Linux config file for RISC-V This

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: RISC-V HiFive Platform implementation

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40599 ) Change subject: arch-riscv: RISC-V HiFive Platform implementation .. arch-riscv: RISC-V HiFive Platform

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: PLIC Implementation

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40598 ) Change subject: arch-riscv: PLIC Implementation .. arch-riscv: PLIC Implementation This patch contains the

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Implementation of CLINT

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40597 ) Change subject: arch-riscv: Implementation of CLINT .. arch-riscv: Implementation of CLINT This patch implements

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv,dev: Extended Register class to contain property

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40595 ) Change subject: arch-riscv,dev: Extended Register class to contain property .. arch-riscv,dev: Extended Register

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Modifications to Riscv FS Configuration

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40600 ) Change subject: arch-riscv: Modifications to Riscv FS Configuration .. arch-riscv: Modifications to Riscv FS

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Added PMA support for RiscvTLB

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40596 ) Change subject: arch-riscv: Added PMA support for RiscvTLB .. arch-riscv: Added PMA support for RiscvTLB Since

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Fixing interrupt handling order and effect of mideleg

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/40076 ) Change subject: arch-riscv: Fixing interrupt handling order and effect of mideleg .. arch-riscv: Fixing

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Moving ExceptionCode to registers.hh for reusability

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/39955 ) Change subject: arch-riscv: Moving ExceptionCode to registers.hh for reusability .. arch-riscv: Moving

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Fixing RISC-V remote GDB MIP and MIE accesses.

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/39816 ) Change subject: arch-riscv: Fixing RISC-V remote GDB MIP and MIE accesses. .. arch-riscv: Fixing RISC-V remote

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: CSR registers support in RISC-V remote GDB.

Peter Yuen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/38955 ) Change subject: arch-riscv: CSR registers support in RISC-V remote GDB. .. arch-riscv: CSR registers support in RISC-V

[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: CSR registers support in RISC-V remote GDB.

Peter Yuen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/38955 ) Change subject: arch-riscv: CSR registers support in RISC-V remote GDB. .. arch-riscv: CSR registers support in