scons: *** Source
`tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt' not found,
needed by target
`build/ALPHA_SE/tests/fast/quick/50.memtest/alpha/linux/memtest-ruby/status'.
* build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-timing
passed.
*
changeset b36af60dcb91 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b36af60dcb91
description:
RefCount: Add a unit test for reference counting pointers.
This test exercises each of the functions in the reference counting
pointer
implementation
Since you guys seemed to be basically ok with this I went ahead and
committed it to avoid it rotting in my patch queue. I'll go back and add
a header file with PASS/FAIL printing macros/functions later and
retrofit this test and maybe some others (if it makes sense to) to use
them in a later
changeset e49c7db3ac53 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e49c7db3ac53
description:
Curtick: Fix mysql.cc build needing curTick.
diffstat:
src/base/stats/mysql.cc | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diffs (11 lines):
diff -r
changeset c06505ff551e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c06505ff551e
description:
Root: Get rid of unnecessary includes in root.cc.
diffstat:
src/sim/root.cc | 6 --
1 files changed, 0 insertions(+), 6 deletions(-)
diffs (16 lines):
diff -r
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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan
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(Updated 2011-01-10 08:52:22.568922)
Review request for Default, Ali Saidi, Gabe
On 2011-01-09 18:35:49, Ali Saidi wrote:
Wasn't the alpha name for this load locked? That name or the ARM name (load
exclusive) seems to make more sense to me than load linked.
I choosed load linked because I think that is the more generally accepted
computer science term for this type
Brad, this patch also did not apply cleanly. I think the patches that you
are trying to upload do not follow git's style.
On Mon, January 10, 2011 10:52 am, Brad Beckmann wrote:
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diff -r e49c7db3ac53 -r c06505ff551e src/sim/root.cc
--- a/src/sim/root.cc Mon Jan 10 04:53:20 2011 -0800
+++ b/src/sim/root.cc Mon Jan 10 04:53:34 2011 -0800
@@ -29,12 +29,6 @@
* Steve Reinhardt
*/
-#include cstring
-#include fstream
-#include list
-#include string
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(Updated 2011-01-10 10:48:23.882162)
Review request for Default, Ali Saidi, Gabe
On 2011-01-07 08:50:27, Steve Reinhardt wrote:
If these are adapted from Rick's patches, what was the license on those
patches?
There was no license with Rick's initial patches. I have sent him an email
making sure that he is ok with us checking them in under the BSD license. I'm
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src/sim/system.hh
http://reviews.m5sim.org/r/380/#comment944
I
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(Updated 2011-01-10 11:09:50.845297)
Review request for Default, Ali Saidi, Gabe
Oops...I forgot to include the -o option when updating it. I just uploaded a
new patch...try it again.
Brad
-Original Message-
From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] On Behalf Of
Nilay
Sent: Monday, January 10, 2011 9:01 AM
To: M5 Developer List
Subject: Re:
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(Updated 2011-01-10 11:16:40.872812)
Review request for Default, Ali Saidi, Gabe
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(Updated 2011-01-10 11:26:26.575789)
Review request for Default, Ali Saidi, Gabe
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src/sim/System.py
http://reviews.m5sim.org/r/380/#comment945
Where
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src/cpu/o3/cpu.cc
http://reviews.m5sim.org/r/380/#comment946
Is
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(Updated 2011-01-10 11:38:53.251076)
Review request for Default, Ali Saidi, Gabe
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(Updated 2011-01-10 11:42:35.953935)
Review request for Default, Ali Saidi, Gabe
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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan
On 2011-01-09 18:39:35, Ali Saidi wrote:
src/sim/pseudo_inst.cc, line 329
http://reviews.m5sim.org/r/418/diff/1/?file=9397#file9397line329
There needs to be a good comment about why you would use this here and
the wiki page needs to be updated
I'm confused. These work completed
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SConstruct
http://reviews.m5sim.org/r/419/#comment948
What happens
changeset 49b7d40ee88a in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=49b7d40ee88a
description:
style: clean up style hook code a bit
I've renamed the check_whitespace operation to check_style. You're
going to
need to change your .hg/hgrc file. While
changeset 817c662677d1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=817c662677d1
description:
style: prevent the style hook from aborting uncleanly because of an
exception
diffstat:
util/style.py | 16 ++--
1 files changed, 14 insertions(+), 2
changeset 9069448c4fbc in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=9069448c4fbc
description:
stats: fix the distribution stat
diffstat:
src/base/statistics.hh | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diffs (15 lines):
diff -r 817c662677d1 -r
changeset 8bdcec97b36b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8bdcec97b36b
description:
stats: fix stat test from curTick change
diffstat:
src/unittest/stattest.cc | 37 +++--
1 files changed, 19 insertions(+), 18 deletions(-)
changeset c1e158414648 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c1e158414648
description:
stats: Add a histogram statistic type
diffstat:
src/base/statistics.cc | 83 +++
src/base/statistics.hh | 163
changeset de7601e6e19d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=de7601e6e19d
description:
ruby: get rid of ruby's Debug.hh
Get rid of the Debug class
Get rid of ASSERT and use assert
Use DPRINTFR for ProtocolTrace
diffstat:
Is there a way to print statistics in an order other than the alphabetical
one in which they get printed currently?
Not currently, but I'm very close to getting a set of stat changes
into the tree that moves the printing of stats into python. Then it
would be relatively easy for you to change
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Ship it!
Looks reasonable to me.
src/mem/packet.hh
On 2011-01-10 12:24:35, Nathan Binkert wrote:
SConstruct, line 707
http://reviews.m5sim.org/r/419/diff/1/?file=9416#file9416line707
What happens if this fails?
I'm fine with just not having the sync functionality if librt is unavailable,
if there are platforms that don't support
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Sorry I haven't plowed through all the other review requests, but where
This patch tracks work items for those benchmarks that have had their work
items annotated.
I'd personally like more of a description than this. It sounds a lot like
the ivlb and ivle pseudo ops which were never effectively used. (Or perhaps
these can be combined and ivlb/ivle can be
nathan binkert wrote:
diff -r e49c7db3ac53 -r c06505ff551e src/sim/root.cc
--- a/src/sim/root.cc Mon Jan 10 04:53:20 2011 -0800
+++ b/src/sim/root.cc Mon Jan 10 04:53:34 2011 -0800
@@ -29,12 +29,6 @@
* Steve Reinhardt
*/
-#include cstring
-#include fstream
-#include list
None of those were being used at all in the file. I'm guessing there
used to be a lot more in there which was removed at some point.
Thanks for figuring that out!
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src/cpu/base.cc
http://reviews.m5sim.org/r/380/#comment961
Don't
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src/mem/packet.hh
http://reviews.m5sim.org/r/399/#comment971
You
/** All counters are of 64-bit values. */
typedef double Counter;
This line is from src/base/stats/types.hh. It seems intentional. But this
will not work correctly for all arithmetic operations on variables of type
Counter. Can't we use int64_t instead?
What exactly won't work? At one
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(Updated 2011-01-10 14:34:10.502846)
Review request for Default, Ali Saidi, Gabe
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(Updated 2011-01-10 14:36:47.534994)
Review request for Default, Ali Saidi, Gabe
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(Updated 2011-01-10 14:42:03.604256)
Review request for Default, Ali Saidi, Gabe
On 2011-01-10 15:41:41, Ali Saidi wrote:
src/sim/root.cc, line 200
http://reviews.m5sim.org/r/419/diff/1/?file=9421#file9421line200
Thanks for taking the time to do this!
Ditto... I meant to say something in my review but forgot... despite the
nitpicking, thanks for whipping up a
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src/mem/packet.hh
http://reviews.m5sim.org/r/399/#comment976
I'd
On 2011-01-09 18:39:35, Ali Saidi wrote:
src/sim/pseudo_inst.cc, line 329
http://reviews.m5sim.org/r/418/diff/1/?file=9397#file9397line329
There needs to be a good comment about why you would use this here and
the wiki page needs to be updated
Brad Beckmann wrote:
I'm
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(Updated 2011-01-10 15:59:13.160265)
Review request for Default, Ali Saidi, Gabe
On 2011-01-10 13:54:18, Gabe Black wrote:
src/mem/packet.hh, line 775
http://reviews.m5sim.org/r/399/diff/3/?file=9462#file9462line775
You need spaces around |.
I can add a space around |, but hat is inconsistent with the rest of the file.
- Brad
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src/mem/ruby/system/RubyPort.cc
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Ship it!
Obviates the need for a different patch I had in my own queue,
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(Updated 2011-01-10 16:21:58.793805)
Review request for Default, Ali Saidi, Gabe
On 2011-01-09 18:39:35, Ali Saidi wrote:
src/sim/pseudo_inst.cc, line 329
http://reviews.m5sim.org/r/418/diff/1/?file=9397#file9397line329
There needs to be a good comment about why you would use this here and
the wiki page needs to be updated
Brad Beckmann wrote:
I'm
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src/cpu/o3/fetch_impl.hh
http://reviews.m5sim.org/r/343/#comment981
On 2011-01-09 18:39:35, Ali Saidi wrote:
src/sim/pseudo_inst.cc, line 329
http://reviews.m5sim.org/r/418/diff/1/?file=9397#file9397line329
There needs to be a good comment about why you would use this here and
the wiki page needs to be updated
Brad Beckmann wrote:
I'm
On 2011-01-10 13:54:18, Gabe Black wrote:
src/mem/packet.hh, line 775
http://reviews.m5sim.org/r/399/diff/3/?file=9462#file9462line775
You need spaces around |.
Brad Beckmann wrote:
I can add a space around |, but hat is inconsistent with the rest of the
file.
Ah, yeah, I
I can affirm that the ConfigParser package is super easy to use, and I've
used it to aggregate both ALPHA and X86 checkpoints together arbitrarily to
make new checkpoints. An updater shouldn't be too hard, I've done a fair
amount of fixup along the way in that regard.
I also want to point out I
No problem, I'd been meaning to do it for a while anyway.
As far as librt, I agree it has its drawbacks and I have no problem
with alternatives. An alternative for clock_nanosleep is nanosleep,
the big difference I think being that you can't tell it to wait until
an absolute time, and you
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src/cpu/o3/commit_impl.hh
http://reviews.m5sim.org/r/338/#comment984
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