Re: Is GICv3 supported?

On Thu, Aug 31, 2017 at 10:25:23PM -0700, lokesh vutla wrote: >Hi Peng, > >On Friday, 1 September 2017 07:37:14 UTC+5:30, Peng Fan wrote: >> Hi, >> >> Is GICv3 supported now? I am trying jailhouse on NXP ARM64 boards with GICv3, >> but met some build error when enable CONFIG_ARM_GIC_V3. > >Not

Re: [PATCH v4 0/7] arm: gic: Add affinity based routing

On 9/5/2017 9:08 PM, Jan Kiszka wrote: > On 2017-09-05 16:44, Lokesh Vutla wrote: >> >> >> On Tuesday 05 September 2017 08:02 PM, Lokesh Vutla wrote: >>> This series is based on branch "next". It has couple of bug >>> fixes and adds affinity based routing for arm gic. This should >>> be able to

Re: [PATCH 05/12] arm: split psci header

On 2017-09-05 19:04, Ralf Ramsauer wrote: > On 09/05/2017 06:33 PM, Jan Kiszka wrote: >> On 2017-09-05 16:49, Ralf Ramsauer wrote: >>> This commit splits psci.h in two parts: register definitions and >>> hypervisor specific interface exports. >>> >>> psci_defs.h might be included by inmates as

Re: [PATCH 05/12] arm: split psci header

On 09/05/2017 06:33 PM, Jan Kiszka wrote: > On 2017-09-05 16:49, Ralf Ramsauer wrote: >> This commit splits psci.h in two parts: register definitions and >> hypervisor specific interface exports. >> >> psci_defs.h might be included by inmates as well, which is the reason >> for the split up. This

Re: Request for relicensing your contribution to Jailhouse

On 2017-07-20 16:24, Claudio Scordino wrote: > Dear developer, > > your name is listed among the authors of some file within the inmates/lib/ > directory of Jailhouse, and therefore you are among the copyright holders of a > part of such library. > > The library is currently licensed under GPL,

Re: [PATCH 05/12] arm: split psci header

On 2017-09-05 16:49, Ralf Ramsauer wrote: > This commit splits psci.h in two parts: register definitions and > hypervisor specific interface exports. > > psci_defs.h might be included by inmates as well, which is the reason > for the split up. This prevents that function might be referenced from

Re: [PATCH 00/12] PSCI support for ARM inmates

On 09/05/2017 06:29 PM, Jan Kiszka wrote: > On 2017-09-05 16:43, Ralf Ramsauer wrote: >> Hi, >> >> this RFC series adds PSCI support for ARM inmates. >> >> A new psci-demo inmate boots a secondary CPU and issues SGIs back and forth. >> After some rounds, it shuts down the secondary CPU again. >>

Re: [PATCH v4 0/7] arm: gic: Add affinity based routing

On 2017-09-05 16:44, Lokesh Vutla wrote: > > > On Tuesday 05 September 2017 08:02 PM, Lokesh Vutla wrote: >> This series is based on branch "next". It has couple of bug >> fixes and adds affinity based routing for arm gic. This should >> be able to go independently from gicv3 movement to common

Re: [PATCH v4 4/7] arm-common: Use cluster_id instead of affinity levels

On Tuesday 05 September 2017 09:02 PM, Jan Kiszka wrote: > On 2017-09-05 16:32, Lokesh Vutla wrote: >> For simplicity pass cluster id derived from mpidr instead of >> passing affinity levels separately. >> >> Signed-off-by: Lokesh Vutla >> --- >>

Re: [PATCH v4 4/7] arm-common: Use cluster_id instead of affinity levels

On 2017-09-05 16:32, Lokesh Vutla wrote: > For simplicity pass cluster id derived from mpidr instead of > passing affinity levels separately. > > Signed-off-by: Lokesh Vutla > --- > hypervisor/arch/arm-common/include/asm/irqchip.h | 7 ++- >

Re: [PATCH v4 3/7] arm: gicv3: Add support for affinity based irq routing

On 2017-09-05 16:32, Lokesh Vutla wrote: > Populate affinity values in GICD_IROUTER. > > Signed-off-by: Lokesh Vutla > --- > hypervisor/arch/arm/gic-v3.c | 8 +--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/hypervisor/arch/arm/gic-v3.c

[PATCH 11/12] configs: Jetson family: assign two CPUs to demo cells

We have PSCI support! Unless we don't assign at least two CPU to some inmates, there is no demo case. Signed-off-by: Ralf Ramsauer --- configs/jetson-tk1-demo.c | 4 ++-- configs/jetson-tx1-demo.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff

[PATCH 09/12] inmates: arm: Add cpu_id routine

This helps to find out on which CPU we are currently running on. Signed-off-by: Ralf Ramsauer --- inmates/lib/arm-common/include/inmate.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/inmates/lib/arm-common/include/inmate.h

[PATCH 07/12] inmates: arm: add CPU_ON support for PSCI

This allows us to boot secondary CPUs. There some difference between armv7 and armv8 systems: v7 uses a separate IRQ stack, while v8 shares stacks by exception level. No need to set up an IRQ stack for armv8. Signed-off-by: Ralf Ramsauer ---

[PATCH 08/12] inmates: arm: add support for CPU offlining

Signed-off-by: Ralf Ramsauer --- inmates/lib/arm-common/include/psci.h | 1 + inmates/lib/arm-common/psci.c | 8 2 files changed, 9 insertions(+) diff --git a/inmates/lib/arm-common/include/psci.h b/inmates/lib/arm-common/include/psci.h index

[PATCH 10/12] inmates: arm-common: add support for issuing SGIs

Signed-off-by: Ralf Ramsauer --- inmates/lib/arm-common/gic-v2.c | 7 +++ inmates/lib/arm-common/include/gic.h | 1 + 2 files changed, 8 insertions(+) diff --git a/inmates/lib/arm-common/gic-v2.c b/inmates/lib/arm-common/gic-v2.c index

[PATCH 06/12] inmates: arm-common: add simple PSCI interface for inmates

and add a psci_version() routine. Signed-off-by: Ralf Ramsauer --- inmates/lib/arm-common/Makefile.lib| 2 +- inmates/lib/arm-common/include/psci.h | 39 + inmates/lib/arm-common/psci.c | 46

[PATCH 05/12] arm: split psci header

This commit splits psci.h in two parts: register definitions and hypervisor specific interface exports. psci_defs.h might be included by inmates as well, which is the reason for the split up. This prevents that function might be referenced from inmates, while their actual definition is mission.

[PATCH 02/12] arm64: allow more than 32 bit for entry points

ARM64 supports more than 32 bit. Change datatypes for the program counter accordingly. Signed-off-by: Ralf Ramsauer --- hypervisor/arch/arm64/control.c | 2 +- hypervisor/arch/arm64/include/asm/control.h | 2 +-

[PATCH 04/12] arm: remove superfluous include guards

We don't need include guards here. Signed-off-by: Ralf Ramsauer --- hypervisor/arch/arm-common/include/asm/psci.h | 5 - 1 file changed, 5 deletions(-) diff --git a/hypervisor/arch/arm-common/include/asm/psci.h

[PATCH 01/12] inmates: arm: correct decoding of SGIs

If an IRQ is a SGI, bits 10-12 in the IAR of a GICv2 encode the requesting CPU. So far, Jailhouse doesn't set those bits (while it should, refer GICv2 spec!) so we didn't get hurt. Nevertheless, this hits us when issuing SGIs on bare-metal applications without jailhouse. This patch properly

[PATCH v4 7/7] arm-common: control: Explicitly specify routing mode for arm_cpu_kick()

Instead of relying on initial value, specify the routing mode of sgi for arm_cpu_kick(). Signed-off-by: Lokesh Vutla --- hypervisor/arch/arm-common/control.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hypervisor/arch/arm-common/control.c

[PATCH v4 1/7] arm: gicv3: Fix the GICD_IROUTER offset

Commit 61e30277199e5 ("GICv3: Fix the GICD_IROUTER offset") in ATF[1] specifies that GICv3 documention mentions the wrong offset about GICD_IROUTER and gives proper calculation for interrupt id. Importing the same here. [1] https://github.com/ARM-software/arm-trusted-firmware Signed-off-by:

[PATCH v4 4/7] arm-common: Use cluster_id instead of affinity levels

For simplicity pass cluster id derived from mpidr instead of passing affinity levels separately. Signed-off-by: Lokesh Vutla --- hypervisor/arch/arm-common/include/asm/irqchip.h | 7 ++- hypervisor/arch/arm-common/irqchip.c | 4 +---

[PATCH v4 2/7] arm: gicv3: Fix detection of redistributor

MPIDR can be used to compare the GICR_TYPER register for redistributor base calculation. Logic is imported from kernel. Signed-off-by: Lokesh Vutla --- hypervisor/arch/arm/gic-v3.c| 13 ++--- hypervisor/arch/arm/include/asm/sysregs.h | 7 +++

[PATCH v4 6/7] arm-common: control: Populate cluster_id in sgi for arm_cpu_kick

Get cluster_id from mpidr and populate it in sgi before sending sgi in arm_cpu_kick(). Signed-off-by: Lokesh Vutla --- hypervisor/arch/arm-common/control.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hypervisor/arch/arm-common/control.c

[PATCH v4 0/7] arm: gic: Add affinity based routing

This series is based on branch "next". It has couple of bug fixes and adds affinity based routing for arm gic. This should be able to go independently from giv3 movement to common place. Changes since v3: - Rebased on top of next branch - Add affinity based irq routing - Add cluster_id and remove

[PATCH v4 5/7] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

Even though 'struct sgi' already supports for passing cluster_id, gic_handle_sgir_write() looks only for target fields and triggers sgis to its respective targets. This will fail in case of armv8 with affinity routing enabled. So parse all the affinity levels in sgi before sending sgi.

Re: [PATCH 00/10] arm: Remove MPIDR virtualization and related cleanups

On 09/05/2017 03:06 PM, Jan Kiszka wrote: > On 2017-09-05 14:59, Ralf Ramsauer wrote: >> >> >> On 09/05/2017 08:18 AM, Jan Kiszka wrote: >>> On 2017-09-04 20:54, Jan Kiszka wrote: This should help to enable GICv3 for ARM64: Remove the virtualization of MPIDR on 32-bit ARM and clean up

[siemens/jailhouse] 3d72cc: hypervisor: Move GIC v3 to arm-common

Branch: refs/heads/wip/gicv3-rework Home: https://github.com/siemens/jailhouse Commit: 3d72cc7c9c5c8bb28af659fb458657d86b89d1cb https://github.com/siemens/jailhouse/commit/3d72cc7c9c5c8bb28af659fb458657d86b89d1cb Author: Nikhil Devshatwar Date: 2017-09-05

[siemens/jailhouse] a934d6: arm-common: Remove redundant statement for SGI rou...

Branch: refs/heads/next Home: https://github.com/siemens/jailhouse Commit: a934d651e94f06acfd5bcce096ca673592f7e505 https://github.com/siemens/jailhouse/commit/a934d651e94f06acfd5bcce096ca673592f7e505 Author: Jan Kiszka Date: 2017-09-05 (Tue, 05 Sep

[PATCH v2 02/10] arm-common: Remove redundant statement for SGI routing mode 2

From: Jan Kiszka In case of mode 2, the targets field won't be evaluated. So we can save one statement, initialized targets to 0 unconditionally, and instead invest in explaining when we need to tune it further. Signed-off-by: Jan Kiszka ---

Re: [PATCH 00/10] arm: Remove MPIDR virtualization and related cleanups

On 2017-09-05 14:59, Ralf Ramsauer wrote: > > > On 09/05/2017 08:18 AM, Jan Kiszka wrote: >> On 2017-09-04 20:54, Jan Kiszka wrote: >>> This should help to enable GICv3 for ARM64: Remove the virtualization >>> of MPIDR on 32-bit ARM and clean up the code around it. >>> >>> Unfortunately, I

Re: [PATCH 00/10] arm: Remove MPIDR virtualization and related cleanups

On 09/05/2017 08:18 AM, Jan Kiszka wrote: > On 2017-09-04 20:54, Jan Kiszka wrote: >> This should help to enable GICv3 for ARM64: Remove the virtualization >> of MPIDR on 32-bit ARM and clean up the code around it. >> >> Unfortunately, I didn't manage to test this on ARM with GICv3, only with >>

Re: [PATCH 02/10] arm-common: Remove redundant statement for SGI routing mode 2

On 2017-09-05 13:49, Ralf Ramsauer wrote: > > > On 09/04/2017 08:54 PM, Jan Kiszka wrote: >> From: Jan Kiszka >> >> In case of mode 2, the targets field won't be evaluated. So we can safe >> one statement and rather invest in explaining when we need to adjust >>

Re: [PATCH 02/10] arm-common: Remove redundant statement for SGI routing mode 2

On 09/04/2017 08:54 PM, Jan Kiszka wrote: > From: Jan Kiszka > > In case of mode 2, the targets field won't be evaluated. So we can safe > one statement and rather invest in explaining when we need to adjust > targets.> > Signed-off-by: Jan Kiszka

Re: [PATCH v2 3/4] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

On Tuesday 05 September 2017 03:54 PM, Jan Kiszka wrote: > On 2017-09-05 11:43, Lokesh Vutla wrote: >> >> >> On Tuesday 05 September 2017 02:55 PM, Jan Kiszka wrote: >>> On 2017-09-05 10:59, Lokesh Vutla wrote: On Tuesday 05 September 2017 11:56 AM, Jan Kiszka wrote: > On

Re: [PATCH v2 3/4] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

On 2017-09-05 11:43, Lokesh Vutla wrote: > > > On Tuesday 05 September 2017 02:55 PM, Jan Kiszka wrote: >> On 2017-09-05 10:59, Lokesh Vutla wrote: >>> >>> >>> On Tuesday 05 September 2017 11:56 AM, Jan Kiszka wrote: On 2017-08-30 12:34, 'Lokesh Vutla' via Jailhouse wrote: > Even though

Re: [PATCH v2 3/4] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

On Tuesday 05 September 2017 02:55 PM, Jan Kiszka wrote: > On 2017-09-05 10:59, Lokesh Vutla wrote: >> >> >> On Tuesday 05 September 2017 11:56 AM, Jan Kiszka wrote: >>> On 2017-08-30 12:34, 'Lokesh Vutla' via Jailhouse wrote: Even though 'struct sgi' already supports for passing affinity

Re: [PATCH v2 3/4] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

On 2017-09-05 10:59, Lokesh Vutla wrote: > > > On Tuesday 05 September 2017 11:56 AM, Jan Kiszka wrote: >> On 2017-08-30 12:34, 'Lokesh Vutla' via Jailhouse wrote: >>> Even though 'struct sgi' already supports for passing affinity levels, >>> gic_handle_sgir_write() looks only for target fields

Re: [PATCH v2 3/4] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

On Tuesday 05 September 2017 11:56 AM, Jan Kiszka wrote: > On 2017-08-30 12:34, 'Lokesh Vutla' via Jailhouse wrote: >> Even though 'struct sgi' already supports for passing affinity levels, >> gic_handle_sgir_write() looks only for target fields and triggers sgis >> to its respective targets.

Re: questions related to IVSHMEM/uio_ivshmem

Hi, I can now confirm that the patch 87fbf1f works and interrupts are received correctly, /dev/uiox is accessible and works as expected. Without it, I got a: "FATAL: forbidden access (exception class 0x24)" but I don't remember if this was triggered by Jailhouse or Linux. Best Regards,

Re: [PATCH 00/10] arm: Remove MPIDR virtualization and related cleanups

On 2017-09-05 08:29, Lokesh Vutla wrote: > > > On Tuesday 05 September 2017 11:48 AM, Jan Kiszka wrote: >> On 2017-09-04 20:54, Jan Kiszka wrote: >>> This should help to enable GICv3 for ARM64: Remove the virtualization >>> of MPIDR on 32-bit ARM and clean up the code around it. >>> >>>

Re: [PATCH 00/10] arm: Remove MPIDR virtualization and related cleanups

On Tuesday 05 September 2017 11:48 AM, Jan Kiszka wrote: > On 2017-09-04 20:54, Jan Kiszka wrote: >> This should help to enable GICv3 for ARM64: Remove the virtualization >> of MPIDR on 32-bit ARM and clean up the code around it. >> >> Unfortunately, I didn't manage to test this on ARM with

Re: [PATCH v2 3/4] arm-common: irq-chip: Handle affinity based sgis for gic_handle_sgir_write()

On 2017-08-30 12:34, 'Lokesh Vutla' via Jailhouse wrote: > Even though 'struct sgi' already supports for passing affinity levels, > gic_handle_sgir_write() looks only for target fields and triggers sgis > to its respective targets. This will fail in case of armv8 with affinity > routing enabled.

Re: [RFC 3/7] hypervisor: Fix sysreg macro definitions

On 2017-07-20 11:19, 'Nikhil Devshatwar' via Jailhouse wrote: > Getting compiler issues when using GIC V3 in 64bit mode > Update the sysreg macros to solve these compiler issues > > Signed-off-by: Nikhil Devshatwar > --- > hypervisor/arch/arm-common/include/asm/gic_v3.h | 2

Re: [PATCH 00/10] arm: Remove MPIDR virtualization and related cleanups

On 2017-09-04 20:54, Jan Kiszka wrote: > This should help to enable GICv3 for ARM64: Remove the virtualization > of MPIDR on 32-bit ARM and clean up the code around it. > > Unfortunately, I didn't manage to test this on ARM with GICv3, only with > GICv2. So I will definitely hold this series back

[PATCH v2 07/10] arm, arm64: Move gicr per-cpu parameter into struct

From: Jan Kiszka This prepares for adding another GICv3 parameter later on. ARM64 is not using the field yet, but it already carries it. So update this side as well. Signed-off-by: Jan Kiszka --- Changes in v2: - also adjust per_cpu struct of

[PATCH v2 08/10] arm, arm64: Track physical address of redistributors for each CPU

From: Jan Kiszka We will need this once we start to identity-map the redistributors. And while we could currently still calculate the addresses, better prepare for multiple redist regions and store the address along the mapping. Again, the update on ARM64 is just to

[siemens/jailhouse] d990e2: hypervisor: Move GIC v3 to arm-common

Branch: refs/heads/wip/gicv3-rework Home: https://github.com/siemens/jailhouse Commit: d990e244bb5e91fa4e592905fc67290371deabc1 https://github.com/siemens/jailhouse/commit/d990e244bb5e91fa4e592905fc67290371deabc1 Author: Nikhil Devshatwar Date: 2017-09-05

[siemens/jailhouse]

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