On 18/05/17 13:11, Timothy Arceri wrote:
On 17/05/17 22:50, Nicolai Hähnle wrote:
On 17.05.2017 14:26, Timothy Arceri wrote:
On 17/05/17 22:03, Nicolai Hähnle wrote:
On 17.05.2017 01:49, Timothy Arceri wrote:
This might work for gallium based drivers but I'm pretty sure this
will
cause
On 18/05/17 15:22, Timothy Arceri wrote:
When we fallback currently the gl_program objects are re-allocated.
This is likely to change when the i965 cache lands, but for now
this fixes a crash when using MESA_GLSL=cache_fb. This env var
simulates the fallback path taken when a tgsi cache item
On 05/18/2017 07:10 AM, Chih-Wei Huang wrote:
2017-05-18 12:01 GMT+08:00 Xu, Randy :
-Original Message-
From: Palli, Tapani
It's just applied. Isn't it?
Yesterday without this patch
the color format is mismatch apparently.
Yeah we do need this. TBH I don't quite
This will explicitly state that we are following the fallback
path when we find invalid/corrupt cache items. It will also
output the fallback message when the fallback path is forced
via an environment variable, the following patches will allow
this.
---
src/mesa/state_tracker/st_shader_cache.c |
For the gallium state tracker a tgsi binary may have been evicted
from the cache to make space. In this case we would take the
fallback path and recompile/link the shader.
On i965 there are a number of reasons we can get to the program
upload stage and have neither IR nor a valid cached binary.
When we fallback currently the gl_program objects are re-allocated.
This is likely to change when the i965 cache lands, but for now
this fixes a crash when using MESA_GLSL=cache_fb. This env var
simulates the fallback path taken when a tgsi cache item doesn't
exist due to being evicted previously
2017-05-18 12:01 GMT+08:00 Xu, Randy :
>
>> -Original Message-
>> From: Palli, Tapani
>> >
>> > It's just applied. Isn't it?
>> > Yesterday without this patch
>> > the color format is mismatch apparently.
>>
>> Yeah we do need this. TBH I don't quite understand why but
> -Original Message-
> From: Palli, Tapani
> Sent: Thursday, May 18, 2017 11:51 AM
> To: Chih-Wei Huang ; Xu, Randy
>
> Cc: ML mesa-dev ; Emil Velikov
>
> Subject: Re: [Mesa-dev]
On 05/18/2017 06:41 AM, Chih-Wei Huang wrote:
2017-05-18 11:26 GMT+08:00 Xu, Randy :
-Original Message-
From: Chih-Wei Huang [mailto:cwhu...@android-x86.org]
Sent: Thursday, May 18, 2017 11:04 AM
To: Xu, Randy
Cc: Emil Velikov
2017-05-18 11:26 GMT+08:00 Xu, Randy :
>
>> -Original Message-
>> From: Chih-Wei Huang [mailto:cwhu...@android-x86.org]
>> Sent: Thursday, May 18, 2017 11:04 AM
>> To: Xu, Randy
>> Cc: Emil Velikov ; ML mesa-dev >
> -Original Message-
> From: Chih-Wei Huang [mailto:cwhu...@android-x86.org]
> Sent: Thursday, May 18, 2017 11:04 AM
> To: Xu, Randy
> Cc: Emil Velikov ; ML mesa-dev d...@lists.freedesktop.org>
> Subject: Re: [Mesa-dev] [PATCH] i965: Add
On 17/05/17 22:50, Nicolai Hähnle wrote:
On 17.05.2017 14:26, Timothy Arceri wrote:
On 17/05/17 22:03, Nicolai Hähnle wrote:
On 17.05.2017 01:49, Timothy Arceri wrote:
This might work for gallium based drivers but I'm pretty sure this will
cause problems for the i965 fallback path.
What do
2017-05-12 12:04 GMT+08:00 Xu, Randy :
> Thanks, Emil
>
> dEQP has patch to exclude 565 blend cases (commit named "Exclude RGB565
> blending cases from the must-pass"), so we don’t need any patches now.
Hi Randy, Tapani,
I think we still need a patch. Right?
I see the similar
2017-05-17 21:11 GMT+08:00 Emil Velikov :
> On 17 May 2017 at 13:45, Rob Herring wrote:
>> On Wed, May 17, 2017 at 12:10 AM, Chih-Wei Huang
>> wrote:
>>> Commit 6facb0c0 ("android: fix libz dynamic library dependencies")
>>>
Hi,
On 17-05-17 14:57, Emil Velikov wrote:
On 16 May 2017 at 22:42, Hans de Goede wrote:
Hi,
On 05/16/2017 07:51 PM, Emil Velikov wrote:
Hi Hans
Please poke if patches fall through the cracks.
On 20 March 2017 at 11:05, Hans de Goede wrote:
From: Tvrtko Ursulin
Building on top of the previous patch which exported the concept
of engine classes and instances, we can also use this instead of
the current awkward engine selection uAPI.
This is primarily interesting for the VCS engine selection which
is a)
On Mon, May 15, 2017 at 03:07:54PM +0300, Topi Pohjolainen wrote:
> Nothing prevents arrayed stencil surfaces even though hardware
> doesn't support mipmapping.
>
> Signed-off-by: Topi Pohjolainen
> ---
> src/intel/isl/isl.c | 1 -
> 1 file changed, 1 deletion(-)
>
On Wed, May 17, 2017 at 5:13 PM, Timothy Arceri wrote:
> On 18/05/17 04:23, Marek Olšák wrote:
>>
>> On Wed, May 17, 2017 at 7:36 PM, Ilia Mirkin wrote:
>>>
>>> On Wed, May 17, 2017 at 1:26 PM, Ian Romanick
>>> wrote:
On 18/05/17 07:34, Marek Olšák wrote:
On May 17, 2017 11:13 PM, "Timothy Arceri" > wrote:
On 18/05/17 04:23, Marek Olšák wrote:
On Wed, May 17, 2017 at 7:36 PM, Ilia Mirkin
On May 17, 2017 11:13 PM, "Timothy Arceri" wrote:
On 18/05/17 04:23, Marek Olšák wrote:
> On Wed, May 17, 2017 at 7:36 PM, Ilia Mirkin wrote:
>
>> On Wed, May 17, 2017 at 1:26 PM, Ian Romanick
>> wrote:
>>
>>> On 05/16/2017
Hi,
On Tue, May 16, 2017 at 11:35 PM, Tapani Pälli wrote:
>
>
> On 05/16/2017 08:10 PM, Chad Versace wrote:
>>
>> On Tue 16 May 2017, Tapani Pälli wrote:
>>>
>>>
>>>
>>> On 05/16/2017 02:04 AM, Chad Versace wrote:
Fixes regressions in Android CtsVerifier.apk on
On 18/05/17 04:23, Marek Olšák wrote:
On Wed, May 17, 2017 at 7:36 PM, Ilia Mirkin wrote:
On Wed, May 17, 2017 at 1:26 PM, Ian Romanick wrote:
On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
On May 16, 2017 18:30:00 Timothy Arceri
On Wed, May 03, 2017 at 12:22:15PM +0300, Topi Pohjolainen wrote:
> In intel_hiz_miptree_buf_create() the miptree is unconditionally
> created with MIPTREE_LAYOUT_FORCE_ALL_SLICE_AT_LOD.
>
> Reviewed-by: Jason Ekstrand
> Signed-off-by: Topi Pohjolainen
On 05/17/2017 10:45 PM, Marek Olšák wrote:
On Wed, May 17, 2017 at 9:19 PM, Samuel Pitoiset
wrote:
On 05/17/2017 09:15 PM, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_query.c | 8 ++--
On Wed, May 17, 2017 at 9:19 PM, Samuel Pitoiset
wrote:
>
>
> On 05/17/2017 09:15 PM, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> ---
>> src/gallium/drivers/radeon/r600_query.c | 8 ++--
>>
Use of uninitialized variable I guess? I would suggest to move this at
the beginning of the function, as well as 'info.index_size = 0', but
your call.
Except a little comment on patch 1, series is:
Reviewed-by: Samuel Pitoiset
On 05/17/2017 09:14 PM, Marek Olšák
On 05/17/2017 09:14 PM, Marek Olšák wrote:
From: Marek Olšák
Only the first array element was declared, so tgsi_shader_info::
shader_buffers_declared didn't match what the shader was using.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 25 +
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_hw_context.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c
b/src/gallium/drivers/radeonsi/si_hw_context.c
index 5e97d56..3c59f1b 100644
From: Marek Olšák
Sampler slots: slot[8], .. slot[39] (ascending)
Image slots: slot[7], .. slot[0] (descending)
Each image occupies 1/2 of each slot, so there are 16 images in total,
therefore the layout is: slot[15], .. slot[0]. (in 1/2 slot increments)
Updating image
From: Marek Olšák
This was only needed by LOAD_CONST_RAM, which is now only used to load
whole CE.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
From: Marek Olšák
This decreases the size of CE RAM dumps to L2, or the size of descriptor
uploads without CE.
---
src/gallium/drivers/radeonsi/si_compute.c | 28 ++--
src/gallium/drivers/radeonsi/si_descriptors.c | 85 -
From: Marek Olšák
A later commit will only upload descriptors used by shaders, so we won't do
full dumps anymore, so the only way to have a complete mirror of CE RAM
in memory is to do a separate dump after the last draw call.
---
From: Marek Olšák
On GFX9 with only 4K CE RAM, define the range of slots that will be
allocated in CE RAM. All other slots will be uploaded directly. This will
switch dynamically according to which slots are used by current shaders.
GFX9 CE usage should now be similar to VI
From: Marek Olšák
Constant buffers: slot[16], .. slot[31] (ascending)
Shader buffers: slot[15], .. slot[0] (descending)
The idea is that if we have 4 constant buffers and 2 shader buffers, we only
have to upload 6 slots. That optimization is left for a later commit.
---
From: Marek Olšák
All updates of descriptors_dirty also set dirty_mask, so the return is
unnecessary. The next commit will want this function to be executed
even if dirty_mask == 0.
---
src/gallium/drivers/radeonsi/si_descriptors.c | 3 ---
1 file changed, 3 deletions(-)
From: Marek Olšák
We'll do partial uploads of descriptor arrays, so we need to clamp
against what shaders declare.
---
src/gallium/drivers/radeonsi/si_shader.c| 2 +-
src/gallium/drivers/radeonsi/si_shader_internal.h | 6 ++
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_compute.c | 3 +++
src/gallium/drivers/radeonsi/si_compute.h | 4
src/gallium/drivers/radeonsi/si_shader.h| 4
src/gallium/drivers/radeonsi/si_state.h | 3 +++
Hi,
This is unlikely to have any performance benefit except for maybe Vega
and Raven.
The goals of this series are:
- Remove 4 user SGPRs by merging per-shader descriptor arrays. Shader
buffers and constant buffers share one array. Samplers and images
share the other one.
- Only upload (or
On 05/17/2017 09:15 PM, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_query.c | 8 ++--
src/gallium/drivers/radeon/r600_query.h | 1 +
src/gallium/drivers/radeon/radeon_winsys.h| 1 +
And that would be your's truly, butchering the in-reply-to.
Sorry about that. The two updated patches can be found on:
https://lists.freedesktop.org/archives/mesa-dev/2017-May/155996.html
https://lists.freedesktop.org/archives/mesa-dev/2017-May/155995.html
Don't descend into assignments. This is the same optimization
that is already done in opt_if_simplification.
---
src/compiler/glsl/opt_conditional_discard.cpp | 11 +++
1 file changed, 11 insertions(+)
diff --git a/src/compiler/glsl/opt_conditional_discard.cpp
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_query.c | 8 ++--
src/gallium/drivers/radeon/r600_query.h | 1 +
src/gallium/drivers/radeon/radeon_winsys.h| 1 +
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 7 +++
The conditional discard pass is really just a form of if-simplification.
So there is no reason why we can not just merge the two, and avoid
running the visitor two times.
V2: Add back in the wrongly removed optimization
---
src/compiler/Makefile.sources | 1 -
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_query.c | 12
src/gallium/drivers/radeon/r600_query.h | 1 +
2 files changed, 13 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_query.c
b/src/gallium/drivers/radeon/r600_query.c
index
From: Marek Olšák
---
src/gallium/auxiliary/util/u_threaded_context.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_threaded_context.c
b/src/gallium/auxiliary/util/u_threaded_context.c
index
From: Marek Olšák
Only the first array element was declared, so tgsi_shader_info::
shader_buffers_declared didn't match what the shader was using.
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 25 +
1 file changed, 13 insertions(+), 12
From: Marek Olšák
---
src/gallium/auxiliary/util/u_threaded_context.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_threaded_context.c
b/src/gallium/auxiliary/util/u_threaded_context.c
index e33c846..8ea7f8a
From: Marek Olšák
---
src/mesa/state_tracker/st_draw.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index 019001f..fe03a4a 100644
--- a/src/mesa/state_tracker/st_draw.c
+++
On 17 May 2017 at 18:53, Eric Anholt wrote:
> Emil Velikov writes:
>
>> Hi Eric,
>>
>> On 11 May 2017 at 00:06, Eric Anholt wrote:
>>> This follows the model of imx (display) and etnaviv (render): pl111 is a
>>> display-only device, so
On 05/17/2017 12:50 PM, Emil Velikov wrote:
On 17 May 2017 at 17:05, Kyle Brenneman wrote:
The patch assumes that glXGetDriverConfig will only ever be implemented by
Mesa. As long as that's a safe assumption, the change looks right to me.
Can you elaborate a bit
2017-05-16 18:42 GMT+02:00 Ian Romanick :
> On 05/16/2017 05:35 AM, Thomas Helland wrote:
>> 2017-05-16 3:31 GMT+02:00 Matt Turner :
>>> On Mon, Apr 24, 2017 at 4:50 PM, Matt Turner wrote:
On Thu, Apr 6, 2017 at 12:49 PM, Thomas
On 17 May 2017 at 17:05, Kyle Brenneman wrote:
> The patch assumes that glXGetDriverConfig will only ever be implemented by
> Mesa. As long as that's a safe assumption, the change looks right to me.
Can you elaborate a bit more here? Both the AMDGPU-PRO stack and the
On 05/17/2017 08:03 PM, Marek Olšák wrote:
mesa_to_tgsi is for the old Mesa IR. The return type is always FLOAT.
Same for atifs_to_tgsi.
Ah okay, I will change this.
Marek
On Wed, May 17, 2017 at 7:06 PM, Samuel Pitoiset
wrote:
RadeonSI needs to do a special
On 05/17/2017 08:06 PM, Ilia Mirkin wrote:
On Wed, May 17, 2017 at 5:17 AM, Samuel Pitoiset
wrote:
@@ -695,6 +696,7 @@ struct tgsi_instruction_texture
unsigned Texture : 8;/* TGSI_TEXTURE_ */
unsigned NumOffsets : 4;
unsigned Padding : 20;
+
On Wed, May 17, 2017 at 10:51 AM, Matt Turner wrote:
> On Wed, May 17, 2017 at 9:29 AM, Anuj Phogat wrote:
>> On Mon, May 1, 2017 at 1:54 PM, Matt Turner wrote:
>>> ---
>>> src/intel/Makefile.tools.am | 6 +-
>>>
On Wed, May 17, 2017 at 7:36 PM, Ilia Mirkin wrote:
> On Wed, May 17, 2017 at 1:26 PM, Ian Romanick wrote:
>> On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
>>> On May 16, 2017 18:30:00 Timothy Arceri wrote:
>>>
On 17/05/17
2017-05-17 20:03 GMT+02:00 Rob Clark :
> On Wed, May 17, 2017 at 1:36 PM, Ilia Mirkin wrote:
>> On Wed, May 17, 2017 at 1:26 PM, Ian Romanick wrote:
>>> On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
On May 16, 2017 18:30:00
On Wed, May 17, 2017 at 02:40:55AM -0700, Kenneth Graunke wrote:
> On Tuesday, May 16, 2017 11:29:32 PM PDT Pohjolainen, Topi wrote:
> > On Tue, May 16, 2017 at 03:45:01PM -0700, Jason Ekstrand wrote:
> > > Gen4 cube maps are a 2-D surface with ISL_DIM_LAYOUT_GEN4_3D which is a
> > > bit weird but
On Wed, May 17, 2017 at 5:17 AM, Samuel Pitoiset
wrote:
> @@ -695,6 +696,7 @@ struct tgsi_instruction_texture
> unsigned Texture : 8;/* TGSI_TEXTURE_ */
> unsigned NumOffsets : 4;
> unsigned Padding : 20;
> + unsigned ReturnType : 3; /*
On Wed, May 17, 2017 at 11:17 AM, Samuel Pitoiset
wrote:
> This will also magically fix this special lowering for
> bindless samplers.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 7 +++
>
mesa_to_tgsi is for the old Mesa IR. The return type is always FLOAT.
Same for atifs_to_tgsi.
Marek
On Wed, May 17, 2017 at 7:06 PM, Samuel Pitoiset
wrote:
> RadeonSI needs to do a special lowering for Gather4 with integer
> formats, but with bindless samplers we just
On Wed, May 17, 2017 at 1:36 PM, Ilia Mirkin wrote:
> On Wed, May 17, 2017 at 1:26 PM, Ian Romanick wrote:
>> On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
>>> On May 16, 2017 18:30:00 Timothy Arceri wrote:
>>>
On 17/05/17
Emil Velikov writes:
> Hi Eric,
>
> On 11 May 2017 at 00:06, Eric Anholt wrote:
>> This follows the model of imx (display) and etnaviv (render): pl111 is a
>> display-only device, so when asked to do GL for it, we see if we have a
>> vc4 renderer, make
On Wed, May 17, 2017 at 9:29 AM, Anuj Phogat wrote:
> On Mon, May 1, 2017 at 1:54 PM, Matt Turner wrote:
>> ---
>> src/intel/Makefile.tools.am | 6 +-
>> src/intel/tools/aubinator_error_decode.c | 178
>> ++-
On Wed, May 17, 2017 at 10:36 AM, Ilia Mirkin wrote:
> On Wed, May 17, 2017 at 1:26 PM, Ian Romanick wrote:
> > On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
> >> On May 16, 2017 18:30:00 Timothy Arceri wrote:
> >>
> >>> On
On Wed, May 17, 2017 at 1:26 PM, Ian Romanick wrote:
> On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
>> On May 16, 2017 18:30:00 Timothy Arceri wrote:
>>
>>> On 17/05/17 02:38, Ian Romanick wrote:
What *actual* problem are you trying to solve?
On 05/16/2017 09:04 PM, Jason Ekstrand wrote:
> On May 16, 2017 18:30:00 Timothy Arceri wrote:
>
>> On 17/05/17 02:38, Ian Romanick wrote:
>>> What *actual* problem are you trying to solve? Honestly, it seems like
>>> you're just trying to find stuff to do. We have a
It looks like we don't use them internally neither, so
Reviewed-by: Roland Scheidegger
Am 17.05.2017 um 11:17 schrieb Samuel Pitoiset:
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h | 42 ---
>
On 10 May 2017 at 03:51, Chuck Atkins wrote:
> I just tried to build 17.0.4-rc4 from the tarball with swr enabled and got
> errors about my python not having mako:
>
> make[5]: Entering directory
>
RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.
Instead, store the return type in the instruction like the target.
v2: - fix padding
- initialize default value of ReturnType
- replace debug_assert() by
On 05/17/2017 06:02 PM, Roland Scheidegger wrote:
Am 17.05.2017 um 11:17 schrieb Samuel Pitoiset:
RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.
Instead, store the return type in the instruction like the
On 05/17/2017 02:21 PM, Samuel Pitoiset wrote:
On 05/17/2017 02:02 PM, Nicolai Hähnle wrote:
On 17.05.2017 11:17, Samuel Pitoiset wrote:
RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.
Instead, store the
On Wed, May 17, 2017 at 04:40:57PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Building on top of the previous patch which exported the concept
> of engine classes and instances, we can also use this instead of
> the current awkward engine selection uAPI.
>
On Mon, May 1, 2017 at 1:54 PM, Matt Turner wrote:
> ---
> src/intel/Makefile.tools.am | 6 +-
> src/intel/tools/aubinator_error_decode.c | 178
> ++-
> 2 files changed, 180 insertions(+), 4 deletions(-)
>
> diff --git
On Wed, May 17, 2017 at 5:53 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, May 16, 2017 at 03:45:20PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/blorp/blorp_genX_exec.h | 56 ++
> -
> > 1 file changed, 31 insertions(+), 25
On Wed, May 17, 2017 at 5:42 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, May 16, 2017 at 03:45:19PM -0700, Jason Ekstrand wrote:
> > Gen5 and earlier can't do non-normalized coordinates so we need to
> > compensate in the shader. Fortunately, it's pretty easy plumb
On Tue, May 16, 2017 at 11:40 PM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, May 16, 2017 at 03:45:03PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/isl/isl.c | 3 +--
> > src/intel/isl/isl_gen4.c | 51 ++
> ++
> >
On Wed, May 17, 2017 at 2:10 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, May 16, 2017 at 03:45:08PM -0700, Jason Ekstrand wrote:
> > Somehow this got missed.
>
> This is identical to gen4, right?
>
I copied+pasted from gen4.xml. I just diff'd gen4 and gen5 and the only
Samuel Iglesias Gonsálvez writes:
> Kind reminder that patches 1 and 3 are still unreviewed.
>
Seems terrible, this makes me feel like deleting the vec4 back-end
instead. But okay, series is:
Acked-by: Francisco Jerez
> Sam
>
> On Fri, 2017-05-05
On Wed, May 17, 2017 at 2:08 AM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, May 16, 2017 at 03:45:06PM -0700, Jason Ekstrand wrote:
> > ---
> > src/intel/genxml/gen4.xml | 6 +++---
> > src/intel/genxml/gen45.xml| 6 +++---
> >
Reviewed-by: Marek Olšák
Marek
On Wed, May 17, 2017 at 3:18 PM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> There is really no reason why the current DrawBuffer needs to be complete
> at this point. In particularly, the
On 05/17/2017 06:57 AM, Emil Velikov wrote:
On 16 May 2017 at 22:42, Hans de Goede wrote:
Hi,
On 05/16/2017 07:51 PM, Emil Velikov wrote:
Hi Hans
Please poke if patches fall through the cracks.
On 20 March 2017 at 11:05, Hans de Goede wrote:
Am 17.05.2017 um 11:17 schrieb Samuel Pitoiset:
> RadeonSI needs to do a special lowering for Gather4 with integer
> formats, but with bindless samplers we just can't access the index.
>
> Instead, store the return type in the instruction like the target.
>
> Signed-off-by: Samuel Pitoiset
On Tue, May 16, 2017 at 11:16 PM, Pohjolainen, Topi <
topi.pohjolai...@gmail.com> wrote:
> On Tue, May 16, 2017 at 03:44:59PM -0700, Jason Ekstrand wrote:
> > The guts of blorp and ISL don't understand i965's partial miptrees.
> > Instead, we need to subtract off first_level before we hand
On Wed, May 17, 2017 at 3:39 AM, Emil Velikov
wrote:
> On 17 May 2017 at 05:04, Jason Ekstrand wrote:
>
> > If we are genuinely making things more maintainable, then maybe
> deprecation
> > is reasonable. However, of it's just churn, then it may
On Wed, May 17, 2017 at 09:48:40AM +0300, Pohjolainen, Topi wrote:
> On Tue, May 16, 2017 at 03:44:54PM -0700, Jason Ekstrand wrote:
> > When Sandy Bridge came out, surface state management suddenly became
> > significantly more complicated because of HiZ, MSAA, and separate stencil.
> > In order
https://bugs.freedesktop.org/show_bug.cgi?id=101071
--- Comment #2 from war...@o2.pl ---
Emil,
For custom DSO:
[piotro@minimyth-dev ~]$ export
LD_LIBRARY_PATH=/home/piotro/minimyth-dev/images/build/usr/lib/
[piotro@minimyth-dev ~]$ env
XDG_SESSION_ID=c7
TERM=xterm
SHELL=/bin/bash
From: Nicolai Hähnle
There is really no reason why the current DrawBuffer needs to be complete
at this point. In particularly, the assertion gets hit on the X server side
in libglx when running .../piglit/bin/glx-get-current-display-ext -auto
(which uses indirect GLX
On 17 May 2017 at 13:45, Rob Herring wrote:
> On Wed, May 17, 2017 at 12:10 AM, Chih-Wei Huang
> wrote:
>> Commit 6facb0c0 ("android: fix libz dynamic library dependencies")
>> unconditionally adds libz as a dependency to all shared libraries.
>> That is
On 16 May 2017 at 22:42, Hans de Goede wrote:
> Hi,
>
>
> On 05/16/2017 07:51 PM, Emil Velikov wrote:
>>
>> Hi Hans
>>
>> Please poke if patches fall through the cracks.
>>
>> On 20 March 2017 at 11:05, Hans de Goede wrote:
>>>
>>> Together with some
On Tue, May 16, 2017 at 03:45:20PM -0700, Jason Ekstrand wrote:
> ---
> src/intel/blorp/blorp_genX_exec.h | 56
> ++-
> 1 file changed, 31 insertions(+), 25 deletions(-)
>
> diff --git a/src/intel/blorp/blorp_genX_exec.h
> b/src/intel/blorp/blorp_genX_exec.h
On 17.05.2017 14:26, Timothy Arceri wrote:
On 17/05/17 22:03, Nicolai Hähnle wrote:
On 17.05.2017 01:49, Timothy Arceri wrote:
This might work for gallium based drivers but I'm pretty sure this will
cause problems for the i965 fallback path.
What do those problems look like?
Sorry, I meant
On Wed, May 17, 2017 at 12:10 AM, Chih-Wei Huang
wrote:
> Commit 6facb0c0 ("android: fix libz dynamic library dependencies")
> unconditionally adds libz as a dependency to all shared libraries.
> That is unnecessary.
>
> Commit 85a9b1b5 introduced libz as a dependency to
On Tue, May 16, 2017 at 03:45:19PM -0700, Jason Ekstrand wrote:
> Gen5 and earlier can't do non-normalized coordinates so we need to
> compensate in the shader. Fortunately, it's pretty easy plumb through.
> ---
> src/intel/blorp/blorp_blit.c | 27 ++-
>
On 17/05/17 22:03, Nicolai Hähnle wrote:
On 17.05.2017 01:49, Timothy Arceri wrote:
This might work for gallium based drivers but I'm pretty sure this will
cause problems for the i965 fallback path.
What do those problems look like?
Sorry, I meant to add more details. The problem is that
https://bugs.freedesktop.org/show_bug.cgi?id=101071
--- Comment #1 from Emil Velikov ---
Seems like the cross-compiled libstdc++.so is missing the pthread symbol.
Something like the following will help you check if that's the case.
1) setup your platforms so the custom
On 05/17/2017 02:02 PM, Nicolai Hähnle wrote:
On 17.05.2017 11:17, Samuel Pitoiset wrote:
RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.
Instead, store the return type in the instruction like the target.
On 17.05.2017 01:49, Timothy Arceri wrote:
This might work for gallium based drivers but I'm pretty sure this will
cause problems for the i965 fallback path.
What do those problems look like? And any ideas on how to address the
issue then? There are a number of places that assume
On 17.05.2017 11:17, Samuel Pitoiset wrote:
RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.
Instead, store the return type in the instruction like the target.
Signed-off-by: Samuel Pitoiset
On 05/17/2017 12:05 PM, Tapani Pälli wrote:
On 05/17/2017 11:49 AM, Gao, Chun wrote:
Thanks for your comments. Are we working on GL_EXT_sRGB, or is there
any plan for that?
There has been work done to enable it:
https://patchwork.freedesktop.org/patch/148975/
I believe Harish has been
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