Re: [Mesa-dev] [PATCH] mesa: readpixels add support for GL_HALF_FLOAT

On 03/22/2018 04:43 AM, Lin, Johnson wrote: Hi, Thanks for the comments. I just noticed it does not check the extension support for EXT_color_buffer_float neither? That is probably because it is enabled as 'dummy_true' (see extensions_table.h) so it's always enabled on any driver. I

Re: [Mesa-dev] [PATCH] gallium: Do not add -Wframe-address option for gcc <= 4.4.

Hi Vinson, Thanks for the patch. I was considering moving the gcc stuff out into its own function e.g get_gcc_frame_pointer() which could then be wrapped with #pragma GCC diagnostic which gcc 4.4 should be able to handle. However I'm not too worried about GCC 4.4 and lower so this patch is

Re: [Mesa-dev] [PATCH 2/3] st/glsl_to_nir: fix driver location for packed doubles

The subject line should have read: "st/glsl_to_nir: fix driver location for dual-slot packed doubles" This should also partially fix packed arrays although more is needed to make sure those work since an array can be packed across multiple other arrays so we need to make sure everything is

Re: [Mesa-dev] [PATCH] mesa: readpixels add support for GL_HALF_FLOAT

Hi, Thanks for the comments. I just noticed it does not check the extension support for EXT_color_buffer_float neither? -Original Message- From: Palli, Tapani Sent: Wednesday, March 21, 2018 6:57 PM To: Alejandro Piñeiro ; Lin, Johnson ;

Re: [Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

Aaron Watry writes: > The opencl 1.0 langstandard was renamed in 5.0+ > > v2: Move preprocessor check into compat.hpp > > Cc: Mark Janes > Cc: Francisco Jerez Reviewed-by: Francisco Jerez > --- >

[Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

The opencl 1.0 langstandard was renamed in 5.0+ v2: Move preprocessor check into compat.hpp Cc: Mark Janes Cc: Francisco Jerez --- src/gallium/state_trackers/clover/llvm/compat.hpp | 2 ++ src/gallium/state_trackers/clover/llvm/invocation.cpp

Re: [Mesa-dev] [ANNOUNCE] mesa 18.0.0-rc5

Hi Emil, From radv perspective we seem to have one bug in CTS to debug, but all games I tested that are expected to work seemed to work ok. Per discussion with Dave I'd like to give the go ahead for releasing this wrt radv. Thanks, Bas On Wed, Mar 21, 2018 at 3:50 PM, Emil Velikov

Re: [Mesa-dev] [PATCH] radv: Unset ZRANGE_PRECISION when depth was zeroed

On Thu, Mar 8, 2018 at 12:59 PM, James Legg wrote: > This avoids bug 105396 somehow. I suspect it is a VI and GFX9 hardware > bug which PAL calls WaTcCompatZRange, but I don't know for sure. > > In the VK_FORMAT_D32_SFLOAT case, TILE_STENCIL_DISABLE is not set for > tc

[Mesa-dev] [PATCH 6/6] nir: Don't condition 'a-b < 0' -> 'a < b' on is_not_used_by_conditional

From: Ian Romanick Now that i965 recognizes that a-b generates the same conditions as 'a < b', there is no reason to condition this transformation on 'is not used by conditional.' Since this was the only user of the is_not_used_by_conditional function, delete it. All

[Mesa-dev] [PATCH 1/6] i965: Add negative_equals methods

From: Ian Romanick This method is similar to the existing ::equals methods. Instead of testing that two src_regs are equal to each other, it tests that one is the negation of the other. v2: Simplify various checks based on suggestions from Matt. Use src_reg::type

[Mesa-dev] [PATCH 4/6] i965/vec4: Allow cmod propagation when src0 is a uniform or shader input

From: Ian Romanick No shader-db changes. This source must have been written by a previous instruction, so it cannot be a uniform or a shader input. However, this change allows the next commit to help more shaders. Signed-off-by: Ian Romanick

[Mesa-dev] [PATCH 3/6] i965/fs: Propagate conditional modifiers from compares to adds

From: Ian Romanick The math inside the add and the cmp in this instruction sequence is the same. We can utilize this to eliminate the compare. add(8) g5<1>F g2<8,8,1>F g64.5<0,1,0>F { align1 1Q compacted }; cmp.z.f0(8) null<1>F

[Mesa-dev] [PATCH 5/6] i965/vec4: Propagate conditional modifiers from compares to adds

From: Ian Romanick No changes on Broadwell and later becuase those plaforms do not use the vec4 backend at all. Ivy Bridge and Haswell had similar results. (Ivy Bridge shown) total instructions in shared programs: 11682119 -> 11681056 (<.01%) instructions in affected

[Mesa-dev] [PATCH 2/6] i965/fs: Allow cmod propagation when src0 is a uniform or shader input

From: Ian Romanick No shader-db changes. This source must have been written by a previous instruction, so it cannot be a uniform or a shader input. However, this change allows the next commit to help about 900 more shaders. Signed-off-by: Ian Romanick

[Mesa-dev] [Bug 77449] Tracker bug for all bugs related to Steam titles

https://bugs.freedesktop.org/show_bug.cgi?id=77449 Bug 77449 depends on bug 105426, which changed state. Bug 105426 Summary: [regression] Mesa-18.0rc4 - black screen in some Valve games when run under Wine https://bugs.freedesktop.org/show_bug.cgi?id=105426 What|Removed

[Mesa-dev] 2018 Election voting OPEN

To all X.Org Foundation Members: The X.Org Foundation's annual election is now open and will remain open until 23:59 UTC on 5 April 2018. Four of the eight director seats are open during this election, with the four nominees receiving the highest vote totals serving as directors for two year

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

Just one bit of feedback, for the rest I either agree or have no opinion: On Wed, Mar 21, 2018 at 8:28 PM, Emil Velikov wrote: > * unfit and late nominations: > * any rejections that are unfit based on the existing criteria can > be merged as long as: >

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

Hi all, Having gone through the thread a few times, I believe it can be summarised as follows: * Greater transparency is needed. * Subsystem/team maintainers. * Unfit and late nominations. * Developers/everyone should be more involved. * Greater automation must be explored. NOTES: * Some

[Mesa-dev] [Bug 105670] [regression][hang] Trine1EE hangs GPU after loading screen on Mesa3D-17.3 and later

https://bugs.freedesktop.org/show_bug.cgi?id=105670 Bug ID: 105670 Summary: [regression][hang] Trine1EE hangs GPU after loading screen on Mesa3D-17.3 and later Product: Mesa Version: 17.3 Hardware: Other

Re: [Mesa-dev] [PATCH 2/4] gallium: add initial support for conservative rasterization

Am 22.03.2018 um 00:43 schrieb Ilia Mirkin: > On Wed, Mar 21, 2018 at 7:37 PM, Roland Scheidegger > wrote: >> Personally I'm not a big proponent on propagating single-vendor >> extensions (which are useless for anything but one specific driver) more >> or less directly

Re: [Mesa-dev] [PATCH 1/4] mesa: add support for nvidia conservative rasterization extensions

The indentation error shall be fixed. no_error="true" does mean there's a separate no-error variant of the function. I create such variants for consistency with other functions in viewport.c On Wed, Mar 21, 2018 at 11:40 PM, Ilia Mirkin wrote: > On Wed, Mar 21, 2018 at

Re: [Mesa-dev] [PATCH 4/4] nvc0: add conservative rasterization support

I haven't tested on Maxwell as I don't have easy access to one but I think I can do so sometime tomorrow. I'll gate on GM200 with the second revision of the patch-set. prec_bias should always fit in the max value of an immed, 2**12-1, as the maximum subpixel precision bias is 8 on GM200 and

Re: [Mesa-dev] [PATCH 2/4] gallium: add initial support for conservative rasterization

On Wed, Mar 21, 2018 at 7:37 PM, Roland Scheidegger wrote: > Personally I'm not a big proponent on propagating single-vendor > extensions (which are useless for anything but one specific driver) more > or less directly through to gallium. > There's an intel extension doing

Re: [Mesa-dev] Removing GRALLOC_MODULE_PERFORM_GET_DRM_FD

Hey Robert, On Wed, Mar 21, 2018 at 4:16 PM, Robert Foss wrote: > Hey, > > I've started looking into removing the gralloc method > GRALLOC_MODULE_PERFORM_GET_DRM_FD. > > The issues around this seems to be two parts: > 1) Finding the right device to open > 2) Sharing

Re: [Mesa-dev] [PATCH 1/4] mesa: add support for nvidia conservative rasterization extensions

On Wed, Mar 21, 2018 at 7:11 PM, pendingchaos wrote: > Although the specs write it against compatibility GL 4.3 and allows core > profile and GLES2+, it is exposed for GL 1.0+ and GLES1 and GLES2+. > --- > src/mapi/glapi/gen/gl_API.xml | 47 +++ >

Re: [Mesa-dev] [PATCH 2/4] gallium: add initial support for conservative rasterization

Personally I'm not a big proponent on propagating single-vendor extensions (which are useless for anything but one specific driver) more or less directly through to gallium. There's an intel extension doing similar things already too. Ideally we'd end up with some bits in gallium which can do

Re: [Mesa-dev] [PATCH 4/4] nvc0: add conservative rasterization support

On Wed, Mar 21, 2018 at 7:11 PM, pendingchaos wrote: > Subpixel precision bias, dilation and the post-snap mode are supported on > GM2xx and newer. The pre-snap mode is supported for triangle primitives on > GP1xx. > --- > src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h

[Mesa-dev] [PATCH 4/4] nvc0: add conservative rasterization support

Subpixel precision bias, dilation and the post-snap mode are supported on GM2xx and newer. The pre-snap mode is supported for triangle primitives on GP1xx. --- src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 5 + src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 18

[Mesa-dev] [PATCH 1/4] mesa: add support for nvidia conservative rasterization extensions

Although the specs write it against compatibility GL 4.3 and allows core profile and GLES2+, it is exposed for GL 1.0+ and GLES1 and GLES2+. --- src/mapi/glapi/gen/gl_API.xml | 47 +++ src/mapi/glapi/gen/gl_genexec.py| 1 + src/mesa/Makefile.sources |

[Mesa-dev] [PATCH 2/4] gallium: add initial support for conservative rasterization

--- src/gallium/docs/source/cso/rasterizer.rst | 18 ++ src/gallium/docs/source/screen.rst | 18 ++ src/gallium/drivers/etnaviv/etnaviv_screen.c | 10 ++ src/gallium/drivers/freedreno/freedreno_screen.c | 10 ++

[Mesa-dev] [PATCH 3/4] st/mesa: add support for nvidia conservative rasterization extensions

--- src/mesa/state_tracker/st_atom_rasterizer.c | 12 ++ src/mesa/state_tracker/st_atom_viewport.c | 4 src/mesa/state_tracker/st_context.c | 2 ++ src/mesa/state_tracker/st_extensions.c | 34 + 4 files changed, 52 insertions(+) diff

[Mesa-dev] [PATCH 0/4] Implement Various Conservative Rasterization Extensions

This patch-set adds support for GL_NV_conservative_raster and GL_NV_conservative_raster_dilate on GM2xx and newer. It also adds support for GL_NV_conservative_raster_pre_snap_triangles on GP1xx. In doing so, it implements various functions in mesa core, extends the Gallium API, connects the new

Re: [Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

Aaron Watry writes: > On Wed, Mar 21, 2018, 4:49 PM Francisco Jerez wrote: > >> Aaron Watry writes: >> >> > The opencl 1.0 langstandard was renamed in 5.0+ >> > >> > Cc: Mark Janes >> > --- >> >

Re: [Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

On Wed, Mar 21, 2018, 4:49 PM Francisco Jerez wrote: > Aaron Watry writes: > > > The opencl 1.0 langstandard was renamed in 5.0+ > > > > Cc: Mark Janes > > --- > > src/gallium/state_trackers/clover/llvm/invocation.cpp | 4 >

Re: [Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

Matt Turner writes: > On Wed, Mar 21, 2018 at 2:56 PM, Francisco Jerez > wrote: >> Matt Turner writes: >> >>> From Message Descriptor section in gfxspecs: >>> >>> "Memory fence messages without Commit Enable set do not return

Re: [Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

On Wed, Mar 21, 2018 at 2:56 PM, Francisco Jerez wrote: > Matt Turner writes: > >> From Message Descriptor section in gfxspecs: >> >> "Memory fence messages without Commit Enable set do not return >>anything to the thread (response length is 0 and

Re: [Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

Matt Turner writes: > From Message Descriptor section in gfxspecs: > > "Memory fence messages without Commit Enable set do not return >anything to the thread (response length is 0 and destination >register is null)." > > This fixes a GPU hang in simulation in the

[Mesa-dev] [PATCH] gallium: Do not add -Wframe-address option for gcc <= 4.4.

This patch fixes these build errors with GCC 4.4. Compiling src/gallium/auxiliary/util/u_debug_stack.c ... src/gallium/auxiliary/util/u_debug_stack.c: In function ‘debug_backtrace_capture’: src/gallium/auxiliary/util/u_debug_stack.c:268: error: #pragma GCC diagnostic not allowed inside

Re: [Mesa-dev] [PATCH 08/11] intel: Disable fast color clear on icl

On Wed, Mar 21, 2018 at 2:52 PM, Kenneth Graunke wrote: > On Wednesday, March 21, 2018 2:06:19 PM PDT Matt Turner wrote: >> From: Anuj Phogat >> >> Disabling fast color clear makes fbo-clearmipmap test render correct >> texture in base miplevel. Fast

Re: [Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

On Wednesday, March 21, 2018 2:06:16 PM PDT Matt Turner wrote: > From Message Descriptor section in gfxspecs: > > "Memory fence messages without Commit Enable set do not return >anything to the thread (response length is 0 and destination >register is null)." > > This fixes a GPU hang

Re: [Mesa-dev] [PATCH 10/11] intel/compiler: Skip 64-bit type tests when types not available

On Wednesday, March 21, 2018 2:06:21 PM PDT Matt Turner wrote: > --- > src/intel/compiler/test_eu_validate.cpp | 39 > + > 1 file changed, 39 insertions(+) I'd be tempted to write this as !devinfo.has_64bit_types && type_sz(inst[i].dst_type) == 8 &&

Re: [Mesa-dev] [PATCH 06/11] intel/compiler/icl: Clear "null render target" bit in extended message descriptor

On Wednesday, March 21, 2018 2:06:17 PM PDT Matt Turner wrote: > From: Jason Ekstrand > > Otherwise all our render target writes go no where. > --- > src/intel/compiler/brw_eu_emit.c | 3 +++ > src/intel/compiler/brw_inst.h| 3 +++ > 2 files changed, 6

Re: [Mesa-dev] [PATCH 07/11] intel/compiler/icl: Set the condition for dependency control on gen11+

On Wed, Mar 21, 2018 at 2:51 PM, Kenneth Graunke wrote: > On Wednesday, March 21, 2018 2:06:18 PM PDT Matt Turner wrote: >> From: Anuj Phogat >> >> When source or destination datatype is 64b or operation is integer >> DWord multiply, DepCtrl must not

Re: [Mesa-dev] [PATCH 08/11] intel: Disable fast color clear on icl

On Wednesday, March 21, 2018 2:06:19 PM PDT Matt Turner wrote: > From: Anuj Phogat > > Disabling fast color clear makes fbo-clearmipmap test render correct > texture in base miplevel. Fast color clear is anyways disabled for > non-base miplevels. > --- >

Re: [Mesa-dev] [PATCH 07/11] intel/compiler/icl: Set the condition for dependency control on gen11+

On Wednesday, March 21, 2018 2:06:18 PM PDT Matt Turner wrote: > From: Anuj Phogat > > When source or destination datatype is 64b or operation is integer > DWord multiply, DepCtrl must not be used. > We had this restriction on few previous intel platforms. It has been >

Re: [Mesa-dev] [PATCH 01/11] intel/tools/aubinator: Drop platform list from print_help()

On Wednesday, March 21, 2018 2:06:12 PM PDT Matt Turner wrote: > We all know the platform names, and I don't want to update this list > continually. > --- > src/intel/tools/aubinator.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/intel/tools/aubinator.c

Re: [Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

Aaron Watry writes: > The opencl 1.0 langstandard was renamed in 5.0+ > > Cc: Mark Janes > --- > src/gallium/state_trackers/clover/llvm/invocation.cpp | 4 > 1 file changed, 4 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

This patch fixes the clover build for Clang 4.0, which is what the Intel CI uses. Tested-by: Mark Janes Aaron Watry writes: > The opencl 1.0 langstandard was renamed in 5.0+ > > Cc: Mark Janes > --- >

Re: [Mesa-dev] [PATCH 09/11] intel: Add a Ice Lake PCI IDs

Matches the bspec. Reviewed-by: Rafael Antognolli On Wed, Mar 21, 2018 at 02:06:20PM -0700, Matt Turner wrote: > From: Anuj Phogat > > --- > include/pci_ids/i965_pci_ids.h | 9 + > 1 file changed, 9 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH 03/11] intel/common/icl: Disable hiz surface sampling

On Wed, Mar 21, 2018 at 02:06:14PM -0700, Matt Turner wrote: > From: Anuj Phogat > > On gen11+ AUX_HIZ is not a supported value for surfaces being > sampled by the 3D sampler. Reviewed-by: Rafael Antognolli > --- >

Re: [Mesa-dev] [PATCH 01/11] intel/tools/aubinator: Drop platform list from print_help()

On Wed, Mar 21, 2018 at 02:06:12PM -0700, Matt Turner wrote: > We all know the platform names, and I don't want to update this list > continually. Reviewed-by: Rafael Antognolli > --- > src/intel/tools/aubinator.c | 2 +- > 1 file changed, 1 insertion(+), 1

Re: [Mesa-dev] [PATCH 3/3] radv: enable TC-compat HTILE for 16-bit depth surfaces on GFX8

Reviewed-by: Bas Nieuwenhuizen for the series. On Wed, Mar 21, 2018 at 9:30 PM, Samuel Pitoiset wrote: > The hardware only supports 32-bit depth surfaces, but we can > enable TC-compat HTILE for 16-bit depth surfaces if no Z planes > are

[Mesa-dev] [PATCH] clover/llvm: Fix build against LLVM/Clang 4.0

The opencl 1.0 langstandard was renamed in 5.0+ Cc: Mark Janes --- src/gallium/state_trackers/clover/llvm/invocation.cpp | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp

[Mesa-dev] [PATCH 04/11] intel/compiler/icl: Update the assert in brw_stage_has_packed_dispatch()

From: Anuj Phogat Rafael ran piglit with the test code enabled and saw no additional GPU hangs. --- src/intel/compiler/brw_compiler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h

[Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

From Message Descriptor section in gfxspecs: "Memory fence messages without Commit Enable set do not return anything to the thread (response length is 0 and destination register is null)." This fixes a GPU hang in simulation in the piglit test

[Mesa-dev] [PATCH 11/11] intel/compiler: Readd ICL to test_eu_validate.cpp

Now that the PCI IDs are upstream, this can be readded. --- src/intel/compiler/test_eu_validate.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index e36f50a2d7e..79401222d78 100644 ---

[Mesa-dev] [PATCH 03/11] intel/common/icl: Disable hiz surface sampling

From: Anuj Phogat On gen11+ AUX_HIZ is not a supported value for surfaces being sampled by the 3D sampler. --- src/intel/dev/gen_device_info.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c index

[Mesa-dev] [PATCH 02/11] intel/common/icl: Add L3 config

From: Anuj Phogat ICL uses the same L3 configs as CNL, just leaving the SLM configs out. --- src/intel/common/gen_l3_config.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c index

[Mesa-dev] [PATCH 09/11] intel: Add a Ice Lake PCI IDs

From: Anuj Phogat --- include/pci_ids/i965_pci_ids.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index feb9c582b19..925655e9908 100644 --- a/include/pci_ids/i965_pci_ids.h +++

[Mesa-dev] [PATCH 10/11] intel/compiler: Skip 64-bit type tests when types not available

--- src/intel/compiler/test_eu_validate.cpp | 39 + 1 file changed, 39 insertions(+) diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index 8169f951b2d..e36f50a2d7e 100644 --- a/src/intel/compiler/test_eu_validate.cpp

[Mesa-dev] [PATCH 07/11] intel/compiler/icl: Set the condition for dependency control on gen11+

From: Anuj Phogat When source or destination datatype is 64b or operation is integer DWord multiply, DepCtrl must not be used. We had this restriction on few previous intel platforms. It has been brought back on Gen11+. --- src/intel/compiler/brw_vec4.cpp | 8 ++-- 1

[Mesa-dev] [PATCH 06/11] intel/compiler/icl: Clear "null render target" bit in extended message descriptor

From: Jason Ekstrand Otherwise all our render target writes go no where. --- src/intel/compiler/brw_eu_emit.c | 3 +++ src/intel/compiler/brw_inst.h| 3 +++ 2 files changed, 6 insertions(+) diff --git a/src/intel/compiler/brw_eu_emit.c

[Mesa-dev] [PATCH 08/11] intel: Disable fast color clear on icl

From: Anuj Phogat Disabling fast color clear makes fbo-clearmipmap test render correct texture in base miplevel. Fast color clear is anyways disabled for non-base miplevels. --- src/mesa/drivers/dri/i965/brw_blorp.c | 4 1 file changed, 4 insertions(+) diff --git

[Mesa-dev] [PATCH 01/11] intel/tools/aubinator: Drop platform list from print_help()

We all know the platform names, and I don't want to update this list continually. --- src/intel/tools/aubinator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c index 8029dc12155..2a72efa8a2c 100644 ---

[Mesa-dev] [PATCH] st: Allow accelerated CopyTexImage from RGBA to RGB.

There's nothing to worry about here -- the A channel just gets dropped by the blit. This avoids a segfault in the fallback path when copying from a RGBA16_SINT renderbuffer to a RGB16_SINT destination represented by an RGBA16_SINT texture (the fallback path tries to get/fetch to float buffers,

Re: [Mesa-dev] [PATCH 5/5] clover: Dynamically calculate __OPENCL_VERSION__ and CLC language version

On Wed, Mar 21, 2018 at 2:52 PM, Aaron Watry wrote: > On Wed, Mar 21, 2018 at 2:37 PM, Mark Janes wrote: >> Aaron, this patch breaks the meson build-test in our CI: >> >> ../src/gallium/state_trackers/clover/llvm/invocation.cpp:88:36: error: >>

Re: [Mesa-dev] [RFC] Mesa release improvements - Feature and Stable releases

On 14 March 2018 at 20:13, Andres Gomez wrote: > On Wed, 2018-03-14 at 16:02 +, Emil Velikov wrote: > > [...] >> >> Just double-checking: >> I would suspect you're not suggesting removing the existing email/poke >> scheme? > > Partially. The "announce" mail for the

[Mesa-dev] [PATCH 1/3] radv: add radv_image_is_tc_compat_htile() helper

Instead of that huge conditional that's going to be crazy. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 56 - 1 file changed, 45 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/radv_image.c

[Mesa-dev] [PATCH 2/3] radv: add radv_calc_decompress_on_z_planes() helper

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 51 1 file changed, 37 insertions(+), 14 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 36ba0c3833..22500bfc13

[Mesa-dev] [PATCH 3/3] radv: enable TC-compat HTILE for 16-bit depth surfaces on GFX8

The hardware only supports 32-bit depth surfaces, but we can enable TC-compat HTILE for 16-bit depth surfaces if no Z planes are compressed. The main benefit is to reduce the number of depth decompression passes. Also, we don't need to implement DB->CB copies which is fine. This improves Serious

Re: [Mesa-dev] [PATCH 5/5] clover: Dynamically calculate __OPENCL_VERSION__ and CLC language version

On Wed, Mar 21, 2018 at 2:37 PM, Mark Janes wrote: > Aaron, this patch breaks the meson build-test in our CI: > > ../src/gallium/state_trackers/clover/llvm/invocation.cpp:88:36: error: > ‘lang_opencl10’ is not a member of ‘clang::LangStandard’ > { 100,

Re: [Mesa-dev] [PATCH 5/5] clover: Dynamically calculate __OPENCL_VERSION__ and CLC language version

Aaron, this patch breaks the meson build-test in our CI: ../src/gallium/state_trackers/clover/llvm/invocation.cpp:88:36: error: ‘lang_opencl10’ is not a member of ‘clang::LangStandard’ { 100, clang::LangStandard::lang_opencl10}, configured with: meson -Dbuild-tests=true

[Mesa-dev] [PATCH v2 4/4] spirv: Accept doubles in FaceForward, Reflect and Refract

The SPIR-V spec doesn’t specify a size requirement for these and the equivalent functions in the GLSL spec have explicit alternatives for doubles. Refract is a little bit more complicated due to the fact that the final argument is always supposed to be a scalar 32- or 16- bit float regardless of

[Mesa-dev] [PATCH v2 3/4] spirv: Add a 64-bit implementation of OpIsInf

The only change neccessary is to change the type of the constant used to compare against. This has been tested against the arb_gpu_shader_fp64/execution/ fs-isinf-dvec tests using the ARB_gl_spirv branch. v2: Use nir_imm_floatN_t for the constant. --- src/compiler/spirv/vtn_alu.c | 7 --- 1

[Mesa-dev] [PATCH 2/4] spirv: Use nir_imm_floatN_t for constants for GLSL450 builtins

There is an existing macro that is used to choose between either a float or a double immediate constant based on the bit size of the first operand to the builtin. This is now changed to use the new nir_imm_floatN_t helper function to reduce the number of places that make this decision. ---

[Mesa-dev] [PATCH 1/4] nir/builder: Add a nir_imm_floatN_t helper

This lets you easily build float immediates just given the bit size. If we have this single place here to handle this then it will be easier to add support for 16-bit floats later. --- src/compiler/nir/nir_builder.h | 13 + 1 file changed, 13 insertions(+) diff --git

[Mesa-dev] [PATCH 0/4] spirv: Support doubles in some builtin functions

This adds support for doubles in some of the builtin functions. The last two patches have been posted already and are a v2 based on Jason’s feedback. These patches come out of testing using the ARB_gl_spirv branch of Mesa and Piglit. However they also affect Vulkan and can be tested with VkRunner

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

On March 21, 2018 6:47:48 PM UTC, Dylan Baker wrote: > Quoting Emil Velikov (2018-03-21 10:53:08) > > On 21 March 2018 at 17:09, Eric Engestrom > wrote: > > > Cc: Maxin B. John > > > Cc: Khem Raj > > >

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

Quoting Emil Velikov (2018-03-21 10:53:08) > On 21 March 2018 at 17:09, Eric Engestrom wrote: > > Cc: Maxin B. John > > Cc: Khem Raj > > Suggested-by: Jon Turney > > Signed-off-by: Eric Engestrom

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

Quoting Emil Velikov (2018-03-21 10:57:09) > On 21 March 2018 at 17:54, Eric Engestrom wrote: > > On Wednesday, 2018-03-21 10:45:35 -0700, Dylan Baker wrote: > >> Quoting Eric Engestrom (2018-03-21 10:09:17) > >> > Cc: Maxin B. John > >> > Cc:

[Mesa-dev] [PATCH 3/4] intel/genxml: Add SAMPLER_INSTDONE register.

--- src/intel/genxml/gen10.xml | 23 +++ src/intel/genxml/gen11.xml | 23 +++ src/intel/genxml/gen7.xml | 22 ++ src/intel/genxml/gen75.xml | 25 + src/intel/genxml/gen8.xml | 23 +++

[Mesa-dev] [PATCH 1/4] intel/genxml: Add SC_INSTDONE register.

--- src/intel/genxml/gen10.xml | 27 +++ src/intel/genxml/gen11.xml | 27 +++ src/intel/genxml/gen7.xml | 19 +++ src/intel/genxml/gen75.xml | 17 + src/intel/genxml/gen8.xml | 24

[Mesa-dev] [PATCH 2/4] intel/genxml: Add ROW_INSTDONE register.

--- src/intel/genxml/gen10.xml | 18 ++ src/intel/genxml/gen11.xml | 18 ++ src/intel/genxml/gen7.xml | 20 src/intel/genxml/gen75.xml | 22 ++ src/intel/genxml/gen8.xml | 18 ++ src/intel/genxml/gen9.xml

[Mesa-dev] [PATCH 4/4] intel/aubinator_error_decode: Decode more registers.

Decode SC_INSTDONE, ROW_INSTDONE and SAMPLER_INSTDONE. --- src/intel/tools/aubinator_error_decode.c | 12 1 file changed, 12 insertions(+) diff --git a/src/intel/tools/aubinator_error_decode.c b/src/intel/tools/aubinator_error_decode.c index db880d74a9e..9abd05fd75a 100644 ---

[Mesa-dev] [Bug 105240] GPU lock-up when running QT5 based celestia

https://bugs.freedesktop.org/show_bug.cgi?id=105240 --- Comment #1 from Hleb Valoshka <375...@gmail.com> --- Works on Devuan 2 (Debian 9) with Linux 4.9 and 4.15 and Mesa 13.0.6, so I assume that the problem is in Mesa. -- You are receiving this mail because: You are the assignee for the

[Mesa-dev] [Bug 105240] GPU lock-up when running QT5 based celestia

https://bugs.freedesktop.org/show_bug.cgi?id=105240 Hleb Valoshka <375...@gmail.com> changed: What|Removed |Added Assignee|dri-devel@lists.freedesktop

Re: [Mesa-dev] [PATCH] i965/tiled_memcpy: realign rgba8_copy_aligned_dst stack in 32-bit builds

On Wednesday, 2018-03-21 10:11:45 -0700, Matt Turner wrote: > On Wed, Mar 21, 2018 at 2:39 AM, Eric Engestrom > wrote: > > On Tuesday, 2018-03-20 13:39:25 -0700, Scott D Phillips wrote: > >> When building intel_tiled_memcpy for i686, the stack will only be > >> 4-byte

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

On Wednesday, 2018-03-21 17:53:08 +, Emil Velikov wrote: > On 21 March 2018 at 17:09, Eric Engestrom wrote: > > Cc: Maxin B. John > > Cc: Khem Raj > > Suggested-by: Jon Turney > >

Re: [Mesa-dev] [PATCH v6 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

On Tue, Mar 20, 2018 at 9:26 AM, Tomasz Figa wrote: > On Wed, Mar 21, 2018 at 12:58 AM, Emil Velikov > wrote: >> On 20 March 2018 at 14:24, Tomasz Figa wrote: >>> On Tue, Mar 20, 2018 at 10:44 PM, Emil Velikov

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

On 21 March 2018 at 17:54, Eric Engestrom wrote: > On Wednesday, 2018-03-21 10:45:35 -0700, Dylan Baker wrote: >> Quoting Eric Engestrom (2018-03-21 10:09:17) >> > Cc: Maxin B. John >> > Cc: Khem Raj >> > Suggested-by: Jon

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

On Wednesday, 2018-03-21 17:54:02 +, Eric Engestrom wrote: > On Wednesday, 2018-03-21 10:45:35 -0700, Dylan Baker wrote: > > Quoting Eric Engestrom (2018-03-21 10:09:17) > > > Cc: Maxin B. John > > > Cc: Khem Raj > > > Suggested-by: Jon Turney

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

On Wednesday, 2018-03-21 10:45:35 -0700, Dylan Baker wrote: > Quoting Eric Engestrom (2018-03-21 10:09:17) > > Cc: Maxin B. John > > Cc: Khem Raj > > Suggested-by: Jon Turney > > Signed-off-by: Eric Engestrom

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

On 21 March 2018 at 17:09, Eric Engestrom wrote: > Cc: Maxin B. John > Cc: Khem Raj > Suggested-by: Jon Turney > Signed-off-by: Eric Engestrom > --- > configure.ac

Re: [Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

Quoting Eric Engestrom (2018-03-21 10:09:17) > Cc: Maxin B. John > Cc: Khem Raj > Suggested-by: Jon Turney > Signed-off-by: Eric Engestrom > --- > configure.ac| 1 + > meson.build

[Mesa-dev] [PATCH] st/mesa: don't draw if the bound element array buffer is not allocated

From: Marek Olšák --- src/mesa/state_tracker/st_draw.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c index b95a2522b2e..73f936bb4a9 100644 --- a/src/mesa/state_tracker/st_draw.c +++

Re: [Mesa-dev] [PATCH] u_endian.h: make endianness check libc agnostic

On Wednesday, 2018-03-21 10:11:55 -0700, Dylan Baker wrote: > Quoting Jon Turney (2018-03-21 09:47:23) > > On 21/03/2018 15:09, Emil Velikov wrote: > > > Hi Maxin, > > > > > > Welcome back ;-) > > > > > > On 21 March 2018 at 14:52, wrote: > > >> From: Khem Raj

Re: [Mesa-dev] [PATCH] u_endian.h: make endianness check libc agnostic

Quoting Jon Turney (2018-03-21 09:47:23) > On 21/03/2018 15:09, Emil Velikov wrote: > > Hi Maxin, > > > > Welcome back ;-) > > > > On 21 March 2018 at 14:52, wrote: > >> From: Khem Raj > >> > >> endianness check is OS wide and not specific to libc. >

Re: [Mesa-dev] [PATCH] i965/tiled_memcpy: realign rgba8_copy_aligned_dst stack in 32-bit builds

On Wed, Mar 21, 2018 at 2:39 AM, Eric Engestrom wrote: > On Tuesday, 2018-03-20 13:39:25 -0700, Scott D Phillips wrote: >> When building intel_tiled_memcpy for i686, the stack will only be >> 4-byte aligned. This isn't sufficient for SSE temporaries which >> require

[Mesa-dev] [PATCH mesa] meson/configure: detect endian.h instead of trying to guess when it's available

Cc: Maxin B. John Cc: Khem Raj Suggested-by: Jon Turney Signed-off-by: Eric Engestrom --- configure.ac| 1 + meson.build | 2 +- src/util/u_endian.h | 2 +- 3 files changed, 3

[Mesa-dev] [PATCH] gallium/u_vbuf: Protect against overflow with large instance divisors.

GTF-GLES3.gtf.GL3Tests.instanced_arrays.instanced_arrays_divisor uses -1 as a divisor, so we would overflow to count=0 and upload no data, triggering the assert below. We want to upload 1 element in this case, fixing the test on VC5. --- src/gallium/auxiliary/util/u_vbuf.c | 7 ++- 1 file

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