Re: [Mesa-dev] [PATCH mesa 1/3] egl: rewire the build systems to use libwayland-egl

On Thu, May 31, 2018 at 10:22 AM, Emil Velikov wrote: > On 29 May 2018 at 15:41, Eric Engestrom wrote: >> Cc: Emil Velikov >> Cc: Daniel Stone >> Signed-off-by: Eric Engestrom >> --- >> A couple things worth mentioning: >> - I chose to add libwayland-egl as a separate dependency for EGL

Re: [Mesa-dev] [PATCH 2/2] i965: Implement ARB_compute_variable_group_size.

On Fri, Jun 1, 2018 at 3:21 PM, Plamena Manolova wrote: > This patch adds the implentation of ARB_compute_variable_group_size > for i965. We do this by storing the group size in a buffer surface, > similarly to the work group number. > > Signed-off-by: Plamena Manolova > --- > docs/features.txt

Re: [Mesa-dev] [PATCH 1/2] nir: optimize min(min(a, b), c) to min3(a, b, c) under an option

On Fri, Jun 1, 2018 at 9:50 AM, Samuel Pitoiset wrote: > On 06/01/2018 06:47 PM, Matt Turner wrote: >> On Wed, May 30, 2018 at 10:06 AM, Samuel Pitoiset >> wrote: >>> >>> Similar for max(). >>> >>> Signed-off-by: Samuel Pitoiset &

Re: [Mesa-dev] [PATCH 1/2] nir: optimize min(min(a, b), c) to min3(a, b, c) under an option

On Wed, May 30, 2018 at 10:06 AM, Samuel Pitoiset wrote: > Similar for max(). > > Signed-off-by: Samuel Pitoiset What are the shader-db results? That should be in the commit message. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 51/53] intel/fs: Remove support push constants in repclear shaders

On Thu, May 31, 2018 at 11:28 AM, Jason Ekstrand wrote: > On Thu, May 31, 2018 at 10:43 AM, Matt Turner wrote: >> >> On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand >> wrote: >> > --- >> > src/intel/compiler/brw_fs.cpp | 25 ++--- &g

Re: [Mesa-dev] [PATCH 51/53] intel/fs: Remove support push constants in repclear shaders

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > --- > src/intel/compiler/brw_fs.cpp | 25 ++--- > 1 file changed, 6 insertions(+), 19 deletions(-) > > diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp > index 1f87f06..7e532af 100644 > ---

Re: [Mesa-dev] [PATCH 00/53] intel/fs: SIMD32 support for fragment shaders

On Fri, May 25, 2018 at 3:28 PM, Matt Turner wrote: >> 1-6, 8-20 are >> >> Reviewed-by: Matt Turner > > 7, 22-31 are too. 34-49 are too. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 42/53] intel/fs: Fix sample id setup for SIMD32.

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > From: Francisco Jerez > > v2 (Jason Ekstrand): > - Disallow gl_SampleId in SIMD32 on gen7 > > Reviewed-by: Jason Ekstrand > --- > src/intel/compiler/brw_fs.cpp | 31 ++- > 1 file changed, 22 insertions(+), 9

Re: [Mesa-dev] [PATCH 41/53] intel/fs: Fix Gen7 compressed source region alignment restriction for SIMD32

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > From: Francisco Jerez > > Reviewed-by: Jason Ekstrand > --- > src/intel/compiler/brw_fs.cpp | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp >

Re: [Mesa-dev] [PATCH 36/53] intel/fs: Simplify fs_visitor::emit_samplepos_setup

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > From: Francisco Jerez > > Reviewed-by: Jason Ekstrand Some small explanation that this is possible since we're able to rely on lower_simd_width() to do the hard work for us might be nice. ___

Re: [Mesa-dev] [PATCH 32/53] intel/fs: Mark LINTERP opcode as writing accumulator implicitly on pre-Gen7.

On Fri, May 25, 2018 at 8:08 PM, Jason Ekstrand wrote: > On May 25, 2018 15:28:22 Matt Turner wrote: > >> On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand >> wrote: >>> >>> From: Francisco Jerez >>> >>> --- >>> src/intel/compile

Re: [Mesa-dev] [PATCH 1/8] nir: Add lowering for bitfieldInsert without using bfi.

Whole series is Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 7/8] nir: Add lowering for nir_op_bit_count.

On Tue, May 8, 2018 at 1:13 PM, Eric Anholt wrote: > This is basically the same as the GLSL lowering path. > --- > src/compiler/nir/nir.h | 2 ++ > src/compiler/nir/nir_lower_alu.c | 36 > 2 files changed, 38 insertions(+) > > diff --git

Re: [Mesa-dev] [PATCH 4/8] nir: Add lowering for find_lsb.

On Tue, May 8, 2018 at 1:13 PM, Eric Anholt wrote: > There is a fairly simple relation to turn this into ufind_msb. > --- > src/compiler/nir/nir.h| 2 ++ > src/compiler/nir/nir_opt_algebraic.py | 4 > 2 files changed, 6 insertions(+) > > diff --git a/src/compiler/nir/nir.h

Re: [Mesa-dev] [PATCH mesa 3/3] docs: add note about moving to libwayland-egl in 18.2.0

On Tue, May 29, 2018 at 7:41 AM, Eric Engestrom wrote: > Cc: Emil Velikov > Cc: Daniel Stone > Cc: Andres Gomez > Cc: Dylan Baker > Signed-off-by: Eric Engestrom > --- > docs/relnotes/18.2.0.html | 8 > 1 file changed, 8 insertions(+) > > diff --git a/docs/relnotes/18.2.0.html

Re: [Mesa-dev] Gitlab migration

On Sun, May 27, 2018 at 9:03 AM, Marek Olšák wrote: > On Sun, May 27, 2018 at 10:47 AM, Jason Ekstrand > wrote: >> >> On May 26, 2018 21:03:39 Marek Olšák wrote: >>> >>> On Sat, May 26, 2018 at 11:13 AM, Jason Ekstrand

Re: [Mesa-dev] [PATCH 00/53] intel/fs: SIMD32 support for fragment shaders

On Fri, May 25, 2018 at 11:50 AM, Matt Turner <matts...@gmail.com> wrote: > On Thu, May 24, 2018 at 2:55 PM, Jason Ekstrand <ja...@jlekstrand.net> wrote: >> This patch series adds back-end compiler support for SIMD32 fragment >> shaders. Support is added and everythi

Re: [Mesa-dev] [PATCH 32/53] intel/fs: Mark LINTERP opcode as writing accumulator implicitly on pre-Gen7.

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > From: Francisco Jerez > > --- > src/intel/compiler/brw_shader.cpp | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/src/intel/compiler/brw_shader.cpp >

Re: [Mesa-dev] [PATCH 30/53] intel/fs: Add the group to the flag subreg number on SNB and older

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > We want consistent behavior in the meaning of the flag_subreg field > between SNB and IVB+. > > v2 (Jason Ekstrand): > - Add some extra commentary > > Reviewed-by: Jason Ekstrand Presumably you

Re: [Mesa-dev] [PATCH 28/53] intel/fs: Fix logical FB write lowering for SIMD32

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > From: Francisco Jerez > Presumably Jason already reviewed this and just missed attaching his R-b tag. ___ mesa-dev mailing list

Re: [Mesa-dev] [PATCH 22/53] intel/fs: Disable SIMD32 dispatch on Gen4-6 with control flow

On Thu, May 24, 2018 at 2:56 PM, Jason Ekstrand wrote: > From: Francisco Jerez > > The hardware's control flow logic is 16-wide so we're out of luck > here. We could, in theory, support SIMD32 if we know the control-flow > is uniform but we don't

Re: [Mesa-dev] [PATCH 07/53] intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot.

On Fri, May 25, 2018 at 12:14 PM, Jason Ekstrand <ja...@jlekstrand.net> wrote: > On Fri, May 25, 2018 at 11:27 AM, Matt Turner <matts...@gmail.com> wrote: >> >> On Thu, May 24, 2018 at 2:55 PM, Jason Ekstrand <ja...@jlekstrand.net> >> wrote: >> &

Re: [Mesa-dev] [PATCH 00/53] intel/fs: SIMD32 support for fragment shaders

s an exercise to the reader. :-) 1-6, 8-20 are Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 15/53] intel/fs: Set up FB write message headers in the visitor

On Thu, May 24, 2018 at 2:55 PM, Jason Ekstrand wrote: > Doing instruction header setup in the generator is aweful for a number Misspelling: awful ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 09/53] intel/fs: Fix Gen4-5 FB write AA data payload munging for non-EOT writes.

ionally execute the fire_fb_write() that does not. But we actually want to send one or the other, and never both. With that explanation in the commit message, Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.

Re: [Mesa-dev] [PATCH 08/53] intel/fs: FS_OPCODE_REP_FB_WRITE has side effects

On Thu, May 24, 2018 at 2:55 PM, Jason Ekstrand wrote: > It doesn't matter since we don't ever run replicated write shaders > through the optimizer but it's good to be complete. Aside: Is there anything that would prevent us from detecting that all fragments are uniform and

Re: [Mesa-dev] [PATCH 07/53] intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot.

On Thu, May 24, 2018 at 2:55 PM, Jason Ekstrand wrote: > From: Francisco Jerez I think some explanation is required. I'm guessing this is because you have to write lo fragments out before high, but we should say that in the commit message.

Re: [Mesa-dev] [PATCH shaderdb] run: shader program file created via GetProgramBinary (v5)

Hi Dongwon, I just pushed this. No point in delaying any longer! :) Thanks, Matt ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 09/13] i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear

On Mon, Apr 30, 2018 at 4:34 PM, Scott D Phillips <scott.d.phill...@intel.com> wrote: > Matt Turner <matts...@gmail.com> writes: > >> On Mon, Apr 30, 2018 at 10:25 AM, Scott D Phillips >> <scott.d.phill...@intel.com> wrote: >>> The reference for

Re: [Mesa-dev] [PATCH] configure.ac: rework -latomic check

On Thu, May 10, 2018 at 1:43 AM, Thomas Petazzoni <thomas.petazz...@bootlin.com> wrote: > Hello Matt, > > On Wed, 9 May 2018 16:30:12 -0700, Matt Turner wrote: > >> Hi Thomas, >> >> I rebased this patch on >> >> commit 54ba73ef102f7b908

[Mesa-dev] [PATCH] configure.ac: rework -latomic check

is no libatomic. In this case, config.log contains: GCC_ATOMIC_BUILTINS_SUPPORTED_FALSE='' GCC_ATOMIC_BUILTINS_SUPPORTED_TRUE='#' With means that atomic intrinsics are not usable. Reviewed-by: Matt Turner <matts...@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazz...@b

Re: [Mesa-dev] [PATCH] src/intel/Makefile.vulkan.am: add missing MKDIR_GEN

Thanks. Reviewed-by: Matt Turner <matts...@gmail.com> Cc'd stable and pushed. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] gcc bug / crash in ast_type_qualifier::validate_in_qualifier()?

On Mon, May 7, 2018 at 8:02 PM, Brian Paul wrote: > > I don't know when this started happening (I'll try bisecting tomorrow) but > we're seeing a crash in ast_type_qualifier::validate_in_qualifier() in -O3 > builds with gcc 5.4.0 on Ubuntu 16.04. > > Specifically, at

Re: [Mesa-dev] [PATCH] configure.ac: rework -latomic check

On Mon, May 7, 2018 at 4:34 AM, Thomas Petazzoni wrote: > The configure.ac logic added in commit > 2ef7f23820a67e958c2252bd81eb0458903ebf33 ("configure: check if > -latomic is needed for __atomic_*") makes the assumption that if a > 64-bit atomic intrinsic test

Re: [Mesa-dev] [PATCH, v3] configure.ac/meson.build: Fix -latomic test

Thanks. Reviewed-by: Matt Turner <matts...@gmail.com> and pushed. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: Don't leak blorp on Gen4-5.

Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/4] intel/compiler: Fix lower_conversions for 8-bit types.

W_OPCODE_MOV && > + inst->src[0].type == inst->dst.type && > + !inst->saturate && > + !inst->src[0].negate && > + !inst->src[0].abs; And indent these to align vertically as well. The first three patches are Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] nir: Implement optional b2f->iand lowering

Thanks! Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

On Wed, May 2, 2018 at 9:13 AM, Eleni Maria Stea wrote: > Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed > formats that can render. When GetCompressed* functions are called, the > pixels are returned in the non-compressed format that is used for the >

Re: [Mesa-dev] [PATCH] nir: Implement optional b2f->iand lowering

On Mon, Apr 30, 2018 at 7:50 PM, Alyssa Rosenzweig wrote: >> Tell me a little more about what your hardware supports. > > Both integers and floats are first-class; they are each natively 32-bit, > with 16-bit versions to be supported down the line. There's support for > int8

Re: [Mesa-dev] [PATCH 09/13] i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear

On Mon, Apr 30, 2018 at 10:25 AM, Scott D Phillips wrote: > The reference for MOVNTDQA says: > > For WC memory type, the nontemporal hint may be implemented by > loading a temporary internal buffer with the equivalent of an > aligned cache line without

Re: [Mesa-dev] [PATCH] nir: Implement optional b2f->iand lowering

On Sun, Apr 29, 2018 at 11:19 AM, Alyssa Rosenzweig wrote: > This pass is required by the Midgard compiler; our instruction set uses > NIR-style booleans (~0 for true) but lacks a dedicated b2f instruction. > Normally, this lowering pass would be implemented in a

[Mesa-dev] [PATCH] nir: Transform discard_if(true) into discard

Noticed while reviewing Tim Arceri's NIR inlining series. Without his series: instructions in affected programs: 16 -> 14 (-12.50%) helped: 2 With his series: instructions in affected programs: 196 -> 174 (-11.22%) helped: 22 --- src/compiler/nir/nir_opt_constant_folding.c | 17

Re: [Mesa-dev] [PATCH 02/10] glsl: add missing include to ir_optimization.h

fixed. This file has existed for years without ever including anything else, so I suspect that the expected way to use it is to always include it after including ir.h. But that's admittedly weird, so Reviewed-by: Matt Turner <matts...@gmail.com> ___

Re: [Mesa-dev] [PATCH 01/10] glsl: replace some asserts with unreachable when processing the ast

andled > * by ast_function_expression::hir. > */ > - assert(0); > + unreachable("ast_function_call: handled elsewhere "); >break; > > case ast_identifier: { > -- > 2.17.0 Remove the now unnecessary breaks and have a Review

Re: [Mesa-dev] [PATCH 1/2] intel/compiler: grf127 can not be dest when src and dest overlap in send

ge 990): > > "r127 must not be used for return address when there is a src and dest overlap > in send instruction." > > Cc: Jason Ekstrand <ja...@jlekstrand.net> > Cc: Matt Turner <matts...@gmail.com> > --- > src/intel/compiler/brw_eu_validate.c | 9

Re: [Mesa-dev] [PATCH mesa] u_endian: use non-underscore-prefixed BYTE_ORDER names

On Mon, Apr 9, 2018 at 1:35 AM, Jonathan Gray wrote: > What happened with this patch? It seems the problem it is fixing got > cherry-picked into 17.3 but the fix for master (and now 17.3) is still > not merged? I think Eric's on holiday now, so I wouldn't expect a speedy

Re: [Mesa-dev] [PATCH] Add more Coffee Lake brand strings

gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") > CHIPSET(0x3EA1, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") > CHIPSET(0x3EA4, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH, v2] CHROMIUM: configure.ac/meson.build: Fix -latomic test

On Thu, Mar 29, 2018 at 4:10 PM, Nicolas Boichat <drink...@chromium.org> wrote: > On Fri, Mar 30, 2018 at 2:26 AM, Matt Turner <matts...@gmail.com> wrote: >> On Thu, Mar 29, 2018 at 1:31 AM, Nicolas Boichat <drink...@chromium.org> >> wrote: >>> Fr

Re: [Mesa-dev] [PATCH] nir/lower_vec_to_movs: Only coalesce if the vec had a SSA destination

?id=105440 > Fixes: 2458ea95c56 "nir/lower_vec_to_movs: Coalesce movs on-the-fly when > possible" > Reported-by: Vadym Shovkoplias <vadym.shovkopl...@globallogic.com> > Cc: Andriy Khulap <andriy.khu...@globallogic.com> > Cc: Vadym Shovkoplias <vadym.shovkopl...

Re: [Mesa-dev] [PATCH shaderdb] run: shader program file created via GetProgramBinary (v5)

On Fri, Mar 23, 2018 at 5:56 PM, Dongwon Kim wrote: > With optin '-b', shader-db now generates a shader program binary file > using GetProgramBinary(). This shader program binary can be loaded via > ProgramBinary() to be executed by an application later. Help me understand

Re: [Mesa-dev] [PATCH] glsl: always call do_lower_jumps() after loop unrolling

Seems reasonable. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] i965: mark function end of brw_regs_negative_equal() unreachable

Ian sent a patch for this already (that fixes it without unreachable) ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] intel/compiler: Explicitly cast register type in switch

it doesn't > detect missing switch cases and it doesn't detect that flow can get out > of the switch. Weird. That is not what I would have expected GCC to do. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mai

Re: [Mesa-dev] [PATCH, v2] CHROMIUM: configure.ac/meson.build: Fix -latomic test

On Thu, Mar 29, 2018 at 1:31 AM, Nicolas Boichat wrote: > From: Nicolas Boichat > > When compiling with LLVM 6.0, the test fails to detect that > -latomic is actually required, as the atomic call is inlined. > > In the code itself

Re: [Mesa-dev] [PATCH] intel/fs: Don't emit a des copy for image ops with has_dest == false

;intrinsic].has_dest) { > + for (unsigned c = 0; c < info->dest_components; ++c) > +bld.MOV(offset(retype(dest, base_type), bld, c), > +offset(tmp, bld, c)); Nested control flow and a multiline statement: braces required. Please fix while you're here.

Re: [Mesa-dev] [PATCH] glsl: remove GCC construct from VECN macro

SVC. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105740 > Fixes: f407edf3407396379e16b0be74b8d3b85d2ad7f0 > Cc: Rob Clark <robdcl...@gmail.com> > Cc: Timothy Arceri <tarc...@itsqueeze.com> > Cc: Roland Scheidegger <srol...@vmware.com> > Signed-off-b

Re: [Mesa-dev] [PATCH 6/6] nir: Don't condition 'a-b < 0' -> 'a < b' on is_not_used_by_conditional

On Fri, Mar 23, 2018 at 3:44 PM, Ian Romanick <i...@freedesktop.org> wrote: > On 03/23/2018 11:39 AM, Matt Turner wrote: >> On Wed, Mar 21, 2018 at 5:58 PM, Ian Romanick <i...@freedesktop.org> wrote: >>> From: Ian Romanick <ian.d.roman...@intel.com> >&

Re: [Mesa-dev] [PATCH] i965/vec4: Fix null destination register in 3-source instructions

Thanks! Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/6] nir: Don't condition 'a-b < 0' -> 'a < b' on is_not_used_by_conditional

On Wed, Mar 21, 2018 at 5:58 PM, Ian Romanick wrote: > From: Ian Romanick > > Now that i965 recognizes that a-b generates the same conditions as 'a < > b', there is no reason to condition this transformation on 'is not used > by conditional.' > >

Re: [Mesa-dev] [PATCH 5/6] i965/vec4: Propagate conditional modifiers from compares to adds

Would be really good to extend the vec4 tests too. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/6] i965/vec4: Allow cmod propagation when src0 is a uniform or shader input

Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/6] i965/fs: Propagate conditional modifiers from compares to adds

Really nice, and thanks a lot for extending the unit tests. I've been very happy with them, and they make me feel a lot more confident about the code. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedeskt

Re: [Mesa-dev] [PATCH 2/6] i965/fs: Allow cmod propagation when src0 is a uniform or shader input

Good call. Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/6] i965: Add negative_equals methods

are no B/UB immediates, so you can move these to default. In fact, I'd get rid of the default so we'll get a warning if there are unhandled types. Probably the only one not already in the list is NF, which should also be unreachable. Returning false for unimplemented types seems fine. Immediates

Re: [Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

On Wed, Mar 21, 2018 at 3:08 PM, Francisco Jerez <curroje...@riseup.net> wrote: > Matt Turner <matts...@gmail.com> writes: > >> On Wed, Mar 21, 2018 at 2:56 PM, Francisco Jerez <curroje...@riseup.net> >> wrote: >>> Matt Turner <matts...@gmail.com&g

Re: [Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

On Wed, Mar 21, 2018 at 2:56 PM, Francisco Jerez <curroje...@riseup.net> wrote: > Matt Turner <matts...@gmail.com> writes: > >> From Message Descriptor section in gfxspecs: >> >> "Memory fence messages without Commit Enable set do not return >>

Re: [Mesa-dev] [PATCH 08/11] intel: Disable fast color clear on icl

On Wed, Mar 21, 2018 at 2:52 PM, Kenneth Graunke <kenn...@whitecape.org> wrote: > On Wednesday, March 21, 2018 2:06:19 PM PDT Matt Turner wrote: >> From: Anuj Phogat <anuj.pho...@gmail.com> >> >> Disabling fast color clear makes fbo-clearmipmap test render correct

Re: [Mesa-dev] [PATCH 07/11] intel/compiler/icl: Set the condition for dependency control on gen11+

On Wed, Mar 21, 2018 at 2:51 PM, Kenneth Graunke <kenn...@whitecape.org> wrote: > On Wednesday, March 21, 2018 2:06:18 PM PDT Matt Turner wrote: >> From: Anuj Phogat <anuj.pho...@gmail.com> >> >> When source or destination datatype is 64b or operation is intege

[Mesa-dev] [PATCH 04/11] intel/compiler/icl: Update the assert in brw_stage_has_packed_dispatch()

From: Anuj Phogat Rafael ran piglit with the test code enabled and saw no additional GPU hangs. --- src/intel/compiler/brw_compiler.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h

[Mesa-dev] [PATCH 05/11] intel/compiler: Use null destination register for memory fence messages

From Message Descriptor section in gfxspecs: "Memory fence messages without Commit Enable set do not return anything to the thread (response length is 0 and destination register is null)." This fixes a GPU hang in simulation in the piglit test

[Mesa-dev] [PATCH 11/11] intel/compiler: Readd ICL to test_eu_validate.cpp

Now that the PCI IDs are upstream, this can be readded. --- src/intel/compiler/test_eu_validate.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index e36f50a2d7e..79401222d78 100644 ---

[Mesa-dev] [PATCH 03/11] intel/common/icl: Disable hiz surface sampling

From: Anuj Phogat On gen11+ AUX_HIZ is not a supported value for surfaces being sampled by the 3D sampler. --- src/intel/dev/gen_device_info.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c index

[Mesa-dev] [PATCH 02/11] intel/common/icl: Add L3 config

From: Anuj Phogat ICL uses the same L3 configs as CNL, just leaving the SLM configs out. --- src/intel/common/gen_l3_config.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c index

[Mesa-dev] [PATCH 09/11] intel: Add a Ice Lake PCI IDs

From: Anuj Phogat --- include/pci_ids/i965_pci_ids.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index feb9c582b19..925655e9908 100644 --- a/include/pci_ids/i965_pci_ids.h +++

[Mesa-dev] [PATCH 10/11] intel/compiler: Skip 64-bit type tests when types not available

--- src/intel/compiler/test_eu_validate.cpp | 39 + 1 file changed, 39 insertions(+) diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index 8169f951b2d..e36f50a2d7e 100644 --- a/src/intel/compiler/test_eu_validate.cpp

[Mesa-dev] [PATCH 07/11] intel/compiler/icl: Set the condition for dependency control on gen11+

From: Anuj Phogat When source or destination datatype is 64b or operation is integer DWord multiply, DepCtrl must not be used. We had this restriction on few previous intel platforms. It has been brought back on Gen11+. --- src/intel/compiler/brw_vec4.cpp | 8 ++-- 1

[Mesa-dev] [PATCH 06/11] intel/compiler/icl: Clear "null render target" bit in extended message descriptor

From: Jason Ekstrand Otherwise all our render target writes go no where. --- src/intel/compiler/brw_eu_emit.c | 3 +++ src/intel/compiler/brw_inst.h| 3 +++ 2 files changed, 6 insertions(+) diff --git a/src/intel/compiler/brw_eu_emit.c

[Mesa-dev] [PATCH 08/11] intel: Disable fast color clear on icl

From: Anuj Phogat Disabling fast color clear makes fbo-clearmipmap test render correct texture in base miplevel. Fast color clear is anyways disabled for non-base miplevels. --- src/mesa/drivers/dri/i965/brw_blorp.c | 4 1 file changed, 4 insertions(+) diff --git

[Mesa-dev] [PATCH 01/11] intel/tools/aubinator: Drop platform list from print_help()

We all know the platform names, and I don't want to update this list continually. --- src/intel/tools/aubinator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c index 8029dc12155..2a72efa8a2c 100644 ---

Re: [Mesa-dev] [PATCH] i965/tiled_memcpy: realign rgba8_copy_aligned_dst stack in 32-bit builds

On Wed, Mar 21, 2018 at 2:39 AM, Eric Engestrom wrote: > On Tuesday, 2018-03-20 13:39:25 -0700, Scott D Phillips wrote: >> When building intel_tiled_memcpy for i686, the stack will only be >> 4-byte aligned. This isn't sufficient for SSE temporaries which >> require

Re: [Mesa-dev] [PATCH] i965: Add INTEL_DEBUG stages support for disk shader cache

Nice. Thanks! Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] intel/compiler: Use gen_get_device_info() in test_eu_validate

Previously the unit test filled out a minimal devinfo struct. A previous patch caused the test to begin assert failing because the devinfo was not complete. Avoid this by using the real mechanism to create devinfo. Note that we have to drop icl from the table, since we now rely on the name -> PCI

[Mesa-dev] [PATCH 1/2] intel: Add cfl to gen_device_name_to_pci_device_id()

--- src/intel/dev/gen_device_info.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c index 1773009d33c..3365bdd4dd6 100644 --- a/src/intel/dev/gen_device_info.c +++ b/src/intel/dev/gen_device_info.c @@ -55,6 +55,7 @@

Re: [Mesa-dev] [PATCH 0/3] Meson patches for FreeBSD

On Fri, Mar 16, 2018 at 8:07 AM, Emil Velikov <emil.l.veli...@gmail.com> wrote: > On 16 March 2018 at 02:39, Matt Turner <matts...@gmail.com> wrote: >> On Tue, Mar 6, 2018 at 11:16 AM, Greg V <greg@unrelenting.technology> wrote: >>> Hi! Here's a few more pa

Re: [Mesa-dev] [PATCH 0/3] Meson patches for FreeBSD

On Tue, Mar 6, 2018 at 11:16 AM, Greg V wrote: > Hi! Here's a few more patches that let me successfully build, package > and install fully working Meson-built Mesa-git on my FreeBSD box. > > Greg V (3): > meson: Use system_has_kms_drm in default driver selection >

Re: [Mesa-dev] [PATCH] intel/compiler: Check for unsupported register sizes.

Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH mesa 1/2] Add processor topology calculation implementation for Darwin/OSX targets.

On Wed, Mar 14, 2018 at 5:07 PM, Jeremy Sequoia wrote: >> Please don't push code to maintained drivers without going through the >> mailing list. I feel like I shouldn't have to say that. > > In the past there hasn’t been much care about code in __APPLE__, so I figured > it

Re: [Mesa-dev] [PATCH mesa 1/2] Add processor topology calculation implementation for Darwin/OSX targets.

Subject should have a swr prefix or similar. On Wed, Mar 14, 2018 at 4:19 PM, Jeremy Huddleston Sequoia wrote: > From: Apple SWE Explain? > > The implementation for bootstrapping SWR on Darwin targets is based on the > Linux version. > Instead of

Re: [Mesa-dev] soft fp64 support - main body (glsl/gallium)

On Mon, Mar 12, 2018 at 9:24 PM, Dave Airlie wrote: > This is the main code for the soft fp64 work. It's mostly Elie's > code with a bunch of changes by me. > > This patchset has all the glsl lowering code. (using float64.glsl, > yes I know checked in files are bad, but not bad

Re: [Mesa-dev] [PATCH] meson: don't use compiler.has_header

Acked-by: Matt Turner <matts...@gmail.com> Thanks! ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] mesa: Don't write to user buffer in glGetTexParameterIuiv on error

Reviewed-by: Matt Turner <matts...@gmail.com> ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] squash! i965/fs: Merge CMP and SEL into CSEL on Gen8+

Looks good to me. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 18/22] i965/fs: Add infrastructure for generating CSEL instructions.

On Tue, Mar 6, 2018 at 11:28 AM, Ian Romanick <i...@freedesktop.org> wrote: > On 03/06/2018 11:24 AM, Matt Turner wrote: >> On Tue, Mar 6, 2018 at 11:22 AM, Ian Romanick <i...@freedesktop.org> wrote: >>> On 03/05/2018 04:40 PM, Matt Turner wrote: >>>> On

Re: [Mesa-dev] [PATCH 18/22] i965/fs: Add infrastructure for generating CSEL instructions.

On Tue, Mar 6, 2018 at 11:22 AM, Ian Romanick <i...@freedesktop.org> wrote: > On 03/05/2018 04:40 PM, Matt Turner wrote: >> On Fri, Feb 23, 2018 at 3:56 PM, Ian Romanick <i...@freedesktop.org> wrote: >>> From: Kenneth Graunke <kenn...@whitecape.org> >>&

Re: [Mesa-dev] [PATCH 18/22] i965/fs: Add infrastructure for generating CSEL instructions.

On Fri, Feb 23, 2018 at 3:56 PM, Ian Romanick wrote: > From: Kenneth Graunke > > v2 (idr): Don't allow CSEL with a non-float src2. > > v3 (idr): Add CSEL to fs_inst::flags_written. Suggested by Matt. brw_disassemble_inst fs_visitor::dump_instruction

Re: [Mesa-dev] [PATCH 17/22] nir: Narrow some dot product operations

On Fri, Feb 23, 2018 at 3:56 PM, Ian Romanick wrote: > From: Ian Romanick > > On vector platforms, this helps elide some constant loads. > > No changes on Broadwell or Skylake. > > Haswell > total instructions in shared programs: 13093793 ->

Re: [Mesa-dev] [PATCH 18/22] i965/fs: Add infrastructure for generating CSEL instructions.

On Fri, Feb 23, 2018 at 3:56 PM, Ian Romanick wrote: > From: Kenneth Graunke > > v2 (idr): Don't allow CSEL with a non-float src2. > > v3 (idr): Add CSEL to fs_inst::flags_written. Suggested by Matt. > > Signed-off-by: Kenneth Graunke

Re: [Mesa-dev] [PATCH] Update the documentation for meson

On Thu, Mar 1, 2018 at 11:34 AM, Dylan Baker wrote: > Meson is pretty well tested and works in most configurations now, so we > can remove the warning about it being unsuited for actual use. > > It's also worth documenting that meson 0.42.0 or greater is required. > >

Re: [Mesa-dev] [RFC PATCH] get_reviewer.pl: Delete

On Wed, Feb 28, 2018 at 1:09 PM, Eric Anholt <e...@anholt.net> wrote: > Matt Turner <matts...@gmail.com> writes: > >> I find this script *really* annoying. Getting Cc'd on a random sample of >> a series is doing it wrong. Cc lists of 14 people is doing it wrong. >

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