Playing with the electrical grid so that it's 125% of the regular grid works great
for me. I always seem to catch the center of the pins this way even when I have an
Imperial grid board with these metric TQFPs.
Brian Guralnick
- Original Message -
From: "Jon Elson" <[EMAIL
You can set the grid in the lib. to be metric and when done adjusting the
part switch it to a imperial grid and save it. The translation is made when
you switch the grids.
Ted
-Original Message-
From: Jon Elson [mailto:[EMAIL PROTECTED]]
Sent: Friday, September 07, 2001 2:17 PM
To: Prote
[EMAIL PROTECTED] wrote:
> All,
> Thanks for responding. It looks like I have several paths to explore.
>
> 1. I was able to get IPC's website footprint generation tool to spit out a
> footprint.
> 2. Brian Gurlanick's QFP generator.
> 3. Michael Scmitt provided a footprint he uses for the Alt
Off topic: Sorry I can't reply, off topic, off topic subject is off topic.
Late,
Jeff Adolphs
-Original Message-
From: Ted Tontis [mailto:[EMAIL PROTECTED]]
Sent: Friday, September 07, 2001 8:47 AM
To: Protel Forum (E-mail)
Subject: [PEDA] what changed
Besides me does anyone el
At 05:50 PM 9/6/01 -0700, Brad Velander wrote:
>I wasn't really in need of support but
>it seems that my comments made people see red to the point where they failed
>to appreciate the context of my statements.
Speaking for myself, I did not feel any anger, I merely expressed my
thoughts on the s
At 11:09 AM 9/7/01 -0400, [EMAIL PROTECTED] wrote:
>Does anyone else have this problem
>and have you found a work around other than the test Engineer changing the
>pad designators globally. Changing the pads works, but there is a risk that
>the file could leak out of his dept and into the released
Ted,
Thank You! Yes, a through hole with 2 rows of pins for all 4 sides. I have
asked Mill-Max for a sample, which I should be able to see the connections
to the Cypress part.
Jeff
-Original Message-
From: Ted Tontis [mailto:[EMAIL PROTECTED]]
Sent: Friday, September 07, 2001 1:43 PM
To
The part is a through hole correct? and has a 2 rows of pins for all 4
sides. If you have a ohm meter and a sample part, ohm it out. The pin 1
location on the socket should have a mark on it for pin 1. If you don't have
a sample I would call Mil-Max directly.
Regards,
Ted
-Original Message-
Brad,
Excellent point. I am using Cypress CY7C144 68-pin PLCC which I know the
numbering of, but I don't know how the IC socket changes the single row
into the dual row pattern. I will have to get the socket to find out.
Thank You!
Jeff
-Original Message-
From: Brad Velander [mailto:[E
Jeff,
here is my thought. Isn't the answer to that question dependant on
the device that you plug into it? If you plug in a device and it is numbered
A/B/C/D, does it make sense that the mating Mill-Max connector pins might be
numbered W/X/Y/Z? If they aren't numbered the same then you nee
Good Day! Anyone know the pin numbering of Mill-Max PLCC68 socket
940-99-068-24-00 ?
The Mill-Max PCB Layout does not show the pin numbering and I do not have a
sample part.
Have a good weekend!
Regards,
Jeff Adolphs
Lake Shore Cryotronics, Inc.
Off-topic:
Did you have a good week? My wife
At 07:46 AM 9/7/01 -0500, Ted Tontis wrote:
> Besides me does anyone else think that it is strange that the forum
>administrator is cracking down on what he/she believes to be off topic? This
>was never an issue before, so why now?
The Forum Administrator has periodically posted notices t
I would have thought a quick sorry / ooopppsss we / our ISP had a stuff up
etc post would have be nice, sort of to add closure to a problem we were
seeing, and let us know it is fixed :o(
Regards,
Kat.
The informatio
You could try making a footprint with my footprint generator in imperial mode. The
problem here is that Altera only specifies Metric & obviously, the pin-pin spacing
still doesn't fall on every mil.
Brian Guralnick
- Original Message -
From: <[EMAIL PROTECTED]>
To: "Protel
Now that we've finished bashing Brad, let's all have a group hug...yeeuck!
I'm not too concerned how many use the 123 method though it seems the EBC AK
is the majority. My original question was whether anyone else has a problem
with CAE software and the EBC method.
This CBtest part of GENRad seem
Besides me does anyone else think that it is strange that the forum
administrator is cracking down on what he/she believes to be off topic? This
was never an issue before, so why now? Who is the forum admin? is it
Protel/Altium? or is it some other EDA co. The message sent buy Mr. Potapoff
Whilst manual routes will happily snap to any pad centres, the Protel
autorouter isn't too happy about anything off a 1-mil grid. It tends to put
a number of small track segments converging on the pad centre, which you'll
probably want to tidy up - this takes more time than converting the metric
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