t and what to search for in what might initially be an
unrelated topic.
Best Regards
Laurie Biddulph
http://www.ozemail.com.au/~boobies
- Original Message -
From: Ian Wilson
To: Protel EDA Forum
Sent: Monday, October 27, 2003 7:21 PM
Subject: Re: [PEDA] Stock components
On
o 15 minutes and (b) a 90%
completion rate to 100% -- just with a bit more RAM???
Best Regards
Laurie Biddulph
http://www.ozemail.com.au/~boobies
- Original Message -
From: Abd ul-Rahman Lomax
To: Protel EDA Forum
Sent: Wednesday, October 29, 2003 8:04 AM
Subject: Re: [PEDA] Stoc
seeing at the moment.
Anything on the site that tickles your fancy :-))
Best Regards
Laurie Biddulph
http://www.ozemail.com.au/~boobies
- Original Message -
From: Bagotronix Tech Support
To: Protel EDA Forum
Sent: Wednesday, October 29, 2003 7:50 AM
Subject: Re: [PEDA] Stock
agotronix.com
- Original Message -
From: "Laurie Biddulph" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Tuesday, October 28, 2003 1:45 PM
Subject: [PEDA] Stock Components/Joining nets - now autorouting
Thanx everyone for their respo
At 01:45 PM 10/28/2003, you wrote:
On another topic. We have a 4-layer board (nothing unusual mix of analog
and digital components) which routes on Protel 98 in around 15-30 minutes
and always achieves 100% routing. If we run the SAME artwork in Protel
99SE it takes over 7 hours and only achieve
Thanx everyone for their responses to my queries which were what I expected would be
the answer.
On another topic. We have a 4-layer board (nothing unusual mix of analog and digital
components) which routes on Protel 98 in around 15-30 minutes and always achieves 100%
routing. If we run the SAM
ld
have to
believe also it is no were near as easily implemented as the higher end
systems.
Bob Wolfe
- Original Message -
From: "Laurie Biddulph" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Monday, October 27, 2003 1:26 AM
Subject: [
On 05:26 PM 27/10/2003, Laurie Biddulph said:
I'll try and keep this short and simple.
We have a stock of components that we regularly use (ie a selection of
resistors, selection of capacitors etc). When generating a schematic we
would use RESISTOR and CAPACITOR for the component symbol and edit
> From: "Laurie Biddulph" <[EMAIL PROTECTED]>: We have a stock of
components that we regularly use (ie a selection of resistors, selection of
capacitors etc)...
I've had several rounds with this issue with a few companies. Trust me:-),
the only way to make this work is to build stock libraries. U
I'll try and keep this short and simple.
We have a stock of components that we regularly use (ie a selection of resistors,
selection of capacitors etc). When generating a schematic we would use RESISTOR and
CAPACITOR for the component symbol and edit the component details. The problem here is
th
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