[PEDA] Was: Simulation, timestep too small

2002-04-16 Thread Rolf Molitor
www.intusoft.com has some helpful technical articles about SPICE. (You have to register to download them) I wish Protel would offer more help for simulation ... One article describes in general convergence problems with some circuits and their causes (something like 'converg.pdf'). The 'timestep t

Re: [PEDA] Was: Simulation, timestep too small

2002-04-16 Thread Ian Wilson
On 10:10 AM 16/04/2002 +0200, Rolf Molitor said: >www.intusoft.com has some helpful technical articles about SPICE. >(You have to register to download them) >I wish Protel would offer more help for simulation ... >One article describes in general convergence problems with some circuits and >their

Re: [PEDA] Was: Simulation, timestep too small

2002-04-16 Thread Rolf Molitor
For my opinion its not nearly sufficient for such a complex subject. To my recollection the simulator was adopted from MicroCode, which is a full member of the altium family. The guys there surely have very very very much more knowhow concerning simulation that could (and should) be shared with th

Re: [PEDA] Timestep Too Small

2002-04-16 Thread Tim Hutcheson
Thanks to all. Actually, my problem was a more classic error. When creating the library part for the schematic, I forgot to flip a pin to the correct orientation relative to the part outline - so it was backwards. I also did not have a label name on it and never noticed the inconsistent positio

[PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Shuping Lew
Warning Unable to process data: multipart/mixed;boundary="=_NextPart_000_0005_01C1E55A.A530A310"

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Brian Sherer
Shuping, I've had similar problems in Protel'98 which were traced to duplicate Identifiers giving duplicate pins; apparently causing a database that was too large for either Protel or my machine to handle in available memory. Something similar happened reloading a netlist to an existing layout ha

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Ian Wilson
On 03:23 PM 16/04/2002 -0700, Shuping Lew said: >I tried to load a netlist file to PCB. It has over 1,100 components. I >receiced a warning of access violation. It says: Access Violation at address >OF086CC6 module Exception Occurred in PCB: Netlist... > >I had the same problem months ago. Th

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Shuping Lew
Brian, I am using Protel 99SE sp6. The operation systems is Window 2000. I have over 500 mb of Ram. Tried to load a netlist to a new PCB document. There is no warning for the netlist report. I am not sure what I should do to solve the problem. Do you have any suggestion? -Original Message

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Shuping Lew
I used Update PCB also. Sometime there was nothing shown on the PCB, or only netlist lines shown but no components. I got the schematic files. I tried this way and it worked: Loads each sheet's netlist individually to PCB; clears netlist each time; Then Update PCB after all the components loaded.

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Tony Karavidas
Why not send it to Protel for evaluation?? > -Original Message- > From: Shuping Lew [mailto:[EMAIL PROTECTED]] > Sent: Tuesday, April 16, 2002 4:15 PM > To: 'Protel EDA Forum' > Subject: Re: [PEDA] FW: Access violation -- Is it a Protel bug? > > > Brian, I am using Protel 99SE sp6. The o

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread JaMi Smith
Ian and Shuping, I would ask the same questions as Ian. If you have the Schematics, I would use Update PCB, and if it appears to be too large to load in in one chunk (if it bombs again), then I would try only loading half of the Schematic pages at first, and then do another update another update

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Brian Sherer
Ian Wilson's questions are good ones. Did you enter the schematic and generate the Netlist? If you entered the schematic, and if it is an option, I would begin by resetting all Identifiers to ?. That is, do a global change of all R's to R?, all C's to C?, etc, for all components. Then use Tools/

Re: [PEDA] FW: Access violation -- Is it a Protel bug?

2002-04-16 Thread Mike Reagan
Shuping, At some point around 900 components Protel performance will slow down, Many designs I am seeing are around 1300 - 1440 components. Protel cam handle them easily with lots of RAM (512 meg) , to address IANs question why load the netlist? Because the synchronizer will also choke to and