Re: [PEDA] 1020-pin BGA out-routing question (some add)
Here is link for device package itself... http://www.altera.com/support/devices/packaging/specifications/pkg-pin/pdf/1 020-FBGA_Therm.pdf here is link for the pin-out files... http://www.altera.com/literature/lit-dp.html#stratix here is link for the chip... http://www.altera.com/literature/ds/ds_stx.pdf' -Juha Pajunen -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: 1. lokakuuta 2002 5:19 To: Protel EDA Forum Subject: Re: [PEDA] 1020-pin BGA out-routing question (some add) Is there an actual datasheet for the specific device you are using? Can you provide a Mfg and PN, and possibly a link? It would help alot in seeing what you need. Thanks, JaMi * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Hi, There is a new version of 1020-pin BGA routing test for checking at :) http://groups.yahoo.com/group/protel-users/files/junk/ please tell me that this is OK? ;) or tell me how to manage this damn chip :) Used layers are TOP, MID1, MID2 and BOT (BOT layer is not routed yet...) so I think it can be done with 4 signal layers (maybe not all signal pads but many of them), there will be 4 layers for power planes 2*GND and 2*POWER (planned 8 layer board) -Juha Pajunen -Original Message- From: Juha Pajunen [mailto:[EMAIL PROTECTED]] Sent: 1. lokakuuta 2002 9:43 To: Protel EDA Forum Subject: Re: [PEDA] 1020-pin BGA out-routing question (some add) Here is link for device package itself... http://www.altera.com/support/devices/packaging/specifications/pkg-pin/pdf/1 020-FBGA_Therm.pdf here is link for the pin-out files... http://www.altera.com/literature/lit-dp.html#stratix here is link for the chip... http://www.altera.com/literature/ds/ds_stx.pdf' -Juha Pajunen -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: 1. lokakuuta 2002 5:19 To: Protel EDA Forum Subject: Re: [PEDA] 1020-pin BGA out-routing question (some add) Is there an actual datasheet for the specific device you are using? Can you provide a Mfg and PN, and possibly a link? It would help alot in seeing what you need. Thanks, JaMi * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Hi, I changed the footprint, 40mil pitch with 20mil pads. VIAs between SMD pad are 16mil pad and 8mil hole, we want use this because there will be more room for routing and SOLDERMASK is bigger between SMD pad and VIA (I have 4mil opening for SMD pads and VIAs are tentd or 0mil opening; which one is better). Traces are 4mil and gap is also 4mil, need to route two trace between SMD pads, do not want make over 10 layer board... Should I use two powerplanes for FPGA core voltage, I/O voltage for FPGA (there is 8 bank, so we might need 8 different I/O voltages), VREF voltage for each bank (8 bank), 3.3V for memory and other chips... how to manage all those different voltages...??? How about making splitplanes on GNDplane for different GNDs? (memory, I/O, of cource there will be own GND splitplane for FPGA chip...???) JaMi wrote... This will keep your vias as far as possible from the actual BGA pad, and you want as much here as you can get. This wili also allow you to use a bigger via (see below). Our VIAs are 16mil pad and 8mil hole, isn't this ok? The board size could be x=8000mil y=4900mil (do not know yet...) I am still intrestd in what kind of board stack up you GURUs recommend! -Jupa -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: 27. syyskuuta 2002 22:03 To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] 1020-pin BGA out-routing question (some add) Juha, Just looked at your database. First, your vias are misplaced, and need to be exactly in the center of the opening between the pads, which appear to be on a 1mm grid, which means that you vias should be on a .5mm grid. This will keep your vias as far as possible from the actual BGA pad, and you want as much here as you can get. This wili also allow you to use a bigger via (see below). Secondly, you will possibly want a larger pad to drill ratio on your vias if at all possible, to prevent massive breakouts, which while acceptable by some standards. may be excessive with that current ratio. One of routing numbers being batted around by some board houses is somthing they call the five fours, which is three 4 mil gaps with two 4 mil traces, all between a 20 mil pad with 10 mil holes for 40 mil spacing on a BGA. If your spacing on the BGA is actually 1mm, which is .03937 . . . , instead of 40 mil, then you have to slightly adjust the size of the pad, and everything else will fit. Even here you are gonig to possibly see breakout, which once again is allowable, providing that you are using teardrops for all of your pad entries. How big is your board anyway, overall size wise. The above numbers are based on standard alignment of all features within 5 mil, and unless your board is fairly large. everything seems to be very do-able with out too many layers, or the need to go to micro vias, or ever to blind or burried vias. JaMi - Original Message - From: Juha Pajunen [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, September 27, 2002 1:09 AM Subject: [PEDA] 1020-pin BGA out-routing question (some add) Hi again, What is the best PCB layer stack for this type of BGA? http://groups.yahoo.com/group/protel-users/files/junk/ There is 1020-pin 1mm pitch BGA. It would be very pleasing to have some information and help how to route that huge BGA. What are trace width and cap between different tracks and so... It would be very nice if you couldedit that file (how to route it) and then send it to me to this addrss [EMAIL PROTECTED] I really need all useful information about routing this BGA! :) Sincerely, Juha Pajunen, Hw Engineer Bitboys Oy E-mail: [EMAIL PROTECTED] NOTE: This message, and any attached files, may contain privileged or confidential information. It is intended for use only by the designated recipients. Any disclosure, copying or distribution of, or reliance upon, this message by anyone else is strictly prohibited. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Juha, First, sorry about the delay in responding, but the different time zones make it hard to keep up. Secondly, I an certainly no guru on the subject, but can only offer you a few things to think about as you approach this board, and hopefully if someone out there knows better than I, they will step in and offer better advice. I have read both of your responses, and will try to combine all of my responses here. Ok, to start, why don't you see below,'' JaMi - Original Message - From: Juha Pajunen [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Monday, September 30, 2002 2:52 AM Subject: Re: [PEDA] 1020-pin BGA out-routing question (some add) Hi, I changed the footprint, 40mil pitch with 20mil pads. VIAs between SMD pad are 16mil pad and 8mil hole, we want use this because there will be more room for routing and SOLDERMASK is bigger between SMD pad and VIA (I have 4mil opening for SMD pads and VIAs are tentd or 0mil opening; which one is better). Traces are 4mil and gap is also 4mil, need to route two trace between SMD pads, do not want make over 10 layer board... Do not change your spacing to .040 unless that is the actual spacing of your device. I only offered that because it was used in a presentation that I attended on the subject, but if I actually understand correctly, your BGA is 1.00mm spacing (actually .03937 and not .04000), and the cumulative error would definitely cause a problem on a pattern this large. Stick with what the databook calls for on the pitch, and adjust everything else to match that. If you are using an 8 mil hole in a 16 mil pad, that requires a 8 mil overall feature registration (.004 true position), which is pretty tight for an 8 by 5 inch board, and that would allow zero for annular ring, which is acceptable (for certain manufacturing specs), but forces you to use teardrops on all of your vias. I would think that you would be much better off tightening up your solder mask, and it's registration, and using the extra slop (as it were) in the rest of the design. Even if you stuck with the 8 mil hole, and kicked your pad up to 18 mils, but kept the same feature registration, you could at least avoid breakouts. Anyway, something to think about. Remember that Protel does allow you to remove unused internal pads when you generate gerbers, but I would not want to depend on this for any clearances (I would prefer to make a special via for the specific occasion and location in which I juggled the pad stack (s it were), if I had a tight spot or two and needed a little extra space. I will try and locate the number of the IPC Spec that discusses breakout in this specific situation. Also remember that when you consider overall feature registration and breakout, you also have to consider the effect on plane clearance, and remember that hole size is usually based on final hole size, after plating, while the plane clearance itself has to take into account the max drill size (including any etchback (if present)). This brings up the related subject of thermals. The via farm under a BGA usually has the effect of making swiss cheese out of any planes that run under the BGA, and you have to be very careful about how you use thermals here, because you can literally destroy any plane that is left after the normal clearance for the tightly packed vias if you are not careful. Some people demand the use of thermals under a BGA, regardless of the number of perforations in the plane due to vias, in which case, I would say that you need to be very very careful with the specific dimensions if the thermal (make one specifically for use under the BGA if necessary) and make sure that your final gerbers look OK before you ship them out and make the board. My own opinion in this case, is to NOT use a thermal at all on the via, but rather the connections to the plane direct, and then make sure that the trace that goes between the via and the actual BGA pad, is small enough (say 8 mils) that it acts as a thermal relief itself (in just the same manner as if you have a surface mount pad on an outer layer that you had to isolate from a plane (just as the Polygon Plane fill does)). This is usually enough thermal isolation from the plane itself, to not affect the soldering of the BGA, but you had better check with your assembly house (it might require some special profiling) and get their approval on this one, before you go this route, since I am sure that many people out there would disagree with me on this point. With the trace between the via and pad at about 8 mil, it will provide thermal isolation that is required for the soldering operation, but at the same time it is short enough so that it does not become too much of an inductor for those power and ground connections. You might want some other opinions on this one. Two traces per routing channel is very do-able, and respecting the actual number of layers you will need, I can't help you there, as it will take
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Is there an actual datasheet for the specific device you are using? Can you provide a Mfg and PN, and possibly a link? It would help alot in seeing what you need. Thanks, JaMi * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Juha, OK, I looked at the layout, and the part number device, EP1S30, and did a search on the net, and came up with ALTERA STRATIX. Yes, the LVDS is in fact controlled impedance, 100 ohm differential, or you could probably route individual lines at 50 ohm. It does appear that some of the Stratix devices have the required 100 ohm termination built in, but I am not sure about yours, and this may be good providing that you are using the Stradix device as the differential receiver, however if you are using it as the LVDS driver / transmitter, then you will probably have to provide your own termination at the other end of the line. The first thing that you might want to do is look at the following ALTERA links: Ap Note for High Speed Board Design: http://www.altera.com/literature/an/an075.pdf Using High Speed Differential I/O Interfaces in Stratix Devices: http://www.altera.com/literature/an/an202.pdf These should give you some idea of just what you need to do in terms of routing, at least in the LVDS area. I looked around for some real life pinout diagrams, and only found some fairly poor tables, which would take me forever to map out. The mapping in your sample layout doesn't look quite right (although possibly it is and I am just not looking at it correctly), but I don't have the time to go over it. Can you point me to some ALTERA maps or pin out pictorals if there are any? JaMi * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Hei Juha, I currently don't have the time to work out a detailed routing strategy, but if I hear of such a biest I would consider blind/buried vias. If you choose to go to microvias you even can place them within the BGA pads! Depending the overall complexity I would recommend a 2+N+2 stack in microvia technology (if assembled double sided and dense). This means vias from Top to Mid1, Mid1 to Mid2, Bottom to Bottom-1, Bottom-1 to Bottom-2 and thru the whole stack (these are conventionally drilled). Depending your actual project you may be able to simplify this. Hope this helps Emanuel Juha Pajunen wrote: Hi again, What is the best PCB layer stack for this type of BGA? http://groups.yahoo.com/group/protel-users/files/junk/ There is 1020-pin 1mm pitch BGA. It would be very pleasing to have some information and help how to route that huge BGA. What are trace width and cap between different tracks and so... It would be very nice if you couldedit that file (how to route it) and then send it to me to this addrss [EMAIL PROTECTED] I really need all useful information about routing this BGA! :) Sincerely, Juha Pajunen, Hw Engineer Bitboys Oy E-mail: [EMAIL PROTECTED] NOTE: This message, and any attached files, may contain privileged or confidential information. It is intended for use only by the designated recipients. Any disclosure, copying or distribution of, or reliance upon, this message by anyone else is strictly prohibited. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
How would you even solder a 1020pin BGA (I assume that's 32x32 with the four central balls missing?) I say that you'd need to use blind vias, with a lot of layers (I've never worked on BGA's but would imagine that you might get 4rows/columns per layer). My estimate would require around 8layers. That's if you've got signals on every layer. Others would have a much better idea though... - Original Message - From: Juha Pajunen [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, September 27, 2002 8:09 PM Subject: [PEDA] 1020-pin BGA out-routing question (some add) Hi again, What is the best PCB layer stack for this type of BGA? http://groups.yahoo.com/group/protel-users/files/junk/ There is 1020-pin 1mm pitch BGA. It would be very pleasing to have some information and help how to route that huge BGA. What are trace width and cap between different tracks and so... It would be very nice if you couldedit that file (how to route it) and then send it to me to this addrss [EMAIL PROTECTED] I really need all useful information about routing this BGA! :) Sincerely, Juha Pajunen, Hw Engineer Bitboys Oy E-mail: [EMAIL PROTECTED] NOTE: This message, and any attached files, may contain privileged or confidential information. It is intended for use only by the designated recipients. Any disclosure, copying or distribution of, or reliance upon, this message by anyone else is strictly prohibited. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Juha, It seems that everyone is missing the primary questions. What is the speed of the device? What type of routing are you doing, TTL / CMOS, ECL, LVDS, etc., etc., etc.? How many of the actual I/O's are you actually using? Where are all of your I?O's going to or comming from (do most of them have to go the same direction on the board, or are they generally going to be able to go in four different directions, etc., etc., etc.? While implied in some of the above questions, specifically, do you need controlled impedance? How many supplies are involved, and how much decoupling does the specific device require? Are there more than one ground planes involved? No reason to panic. Yet. JaMi Smith - Original Message - From: Juha Pajunen [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, September 27, 2002 1:09 AM Subject: [PEDA] 1020-pin BGA out-routing question (some add) Hi again, What is the best PCB layer stack for this type of BGA? http://groups.yahoo.com/group/protel-users/files/junk/ There is 1020-pin 1mm pitch BGA. It would be very pleasing to have some information and help how to route that huge BGA. What are trace width and cap between different tracks and so... It would be very nice if you couldedit that file (how to route it) and then send it to me to this addrss [EMAIL PROTECTED] I really need all useful information about routing this BGA! :) Sincerely, Juha Pajunen, Hw Engineer Bitboys Oy E-mail: [EMAIL PROTECTED] NOTE: This message, and any attached files, may contain privileged or confidential information. It is intended for use only by the designated recipients. Any disclosure, copying or distribution of, or reliance upon, this message by anyone else is strictly prohibited. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
Juha, Just looked at your database. First, your vias are misplaced, and need to be exactly in the center of the opening between the pads, which appear to be on a 1mm grid, which means that you vias should be on a .5mm grid. This will keep your vias as far as possible from the actual BGA pad, and you want as much here as you can get. This wili also allow you to use a bigger via (see below). Secondly, you will possibly want a larger pad to drill ratio on your vias if at all possible, to prevent massive breakouts, which while acceptable by some standards. may be excessive with that current ratio. One of routing numbers being batted around by some board houses is somthing they call the five fours, which is three 4 mil gaps with two 4 mil traces, all between a 20 mil pad with 10 mil holes for 40 mil spacing on a BGA. If your spacing on the BGA is actually 1mm, which is .03937 . . . , instead of 40 mil, then you have to slightly adjust the size of the pad, and everything else will fit. Even here you are gonig to possibly see breakout, which once again is allowable, providing that you are using teardrops for all of your pad entries. How big is your board anyway, overall size wise. The above numbers are based on standard alignment of all features within 5 mil, and unless your board is fairly large. everything seems to be very do-able with out too many layers, or the need to go to micro vias, or ever to blind or burried vias. JaMi - Original Message - From: Juha Pajunen [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, September 27, 2002 1:09 AM Subject: [PEDA] 1020-pin BGA out-routing question (some add) Hi again, What is the best PCB layer stack for this type of BGA? http://groups.yahoo.com/group/protel-users/files/junk/ There is 1020-pin 1mm pitch BGA. It would be very pleasing to have some information and help how to route that huge BGA. What are trace width and cap between different tracks and so... It would be very nice if you couldedit that file (how to route it) and then send it to me to this addrss [EMAIL PROTECTED] I really need all useful information about routing this BGA! :) Sincerely, Juha Pajunen, Hw Engineer Bitboys Oy E-mail: [EMAIL PROTECTED] NOTE: This message, and any attached files, may contain privileged or confidential information. It is intended for use only by the designated recipients. Any disclosure, copying or distribution of, or reliance upon, this message by anyone else is strictly prohibited. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] 1020-pin BGA out-routing question (some add)
I would agree with his statements.. but there is other equally important considerations. First thing is use the component centre as the component origin. It will save you headacks later, Place it on a metric (1mm) grid even if the rest of the board is placed on an imperial grid. (But move your board origin to 2000mil, 2000mil first). Place the vias on a 0.5mm grid. Increase the pad size slightly 20mil? .. unless you have a doc to say otherwise and vias to 20mil with .3mm hole.. that's 8mil annular ring and will be less likely to break out. Also the tracks on the top 8mil. it fits ok.. except around the edge where they will need to be 7 mil to keep 8mil track to track spacing (you may want to neck down) this will give you less of a problem with under/over etch. Then identify all the ground and power traces, they will dictate how you layout the whole device. I have used a XXX type arrangement for the grounds before, this seems to work well (that is you join all the grounds with long diagonal traces and place a via at the intersection of the traces). This is a Motorola thing not mine :-) Power is usually after the GND and uses the free space created by the GND XXX for its vias.. makes it easy to see on the bottom of the board too. The you have to look at your signals as suggested, and determine how many layers you will allow to route out on and how many of the signals are high speed, matched impedances, time critical, slow speed, static etc. Do the grid, via and traces and identify the power/GND and I will look again :-) as will others I am sure Simon -Original Message- From: JaMi Smith [mailto:[EMAIL PROTECTED]] Sent: Saturday, 28 September 2002 7:03 a.m. To: Protel EDA Forum Cc: JaMi Smith Subject: Re: [PEDA] 1020-pin BGA out-routing question (some add) Juha, Just looked at your database. First, your vias are misplaced, and need to be exactly in the center of the opening between the pads, which appear to be on a 1mm grid, which means that you vias should be on a .5mm grid. This will keep your vias as far as possible from the actual BGA pad, and you want as much here as you can get. This wili also allow you to use a bigger via (see below). Secondly, you will possibly want a larger pad to drill ratio on your vias if at all possible, to prevent massive breakouts, which while acceptable by some standards. may be excessive with that current ratio. One of routing numbers being batted around by some board houses is somthing they call the five fours, which is three 4 mil gaps with two 4 mil traces, all between a 20 mil pad with 10 mil holes for 40 mil spacing on a BGA. If your spacing on the BGA is actually 1mm, which is .03937 . . . , instead of 40 mil, then you have to slightly adjust the size of the pad, and everything else will fit. Even here you are gonig to possibly see breakout, which once again is allowable, providing that you are using teardrops for all of your pad entries. How big is your board anyway, overall size wise. The above numbers are based on standard alignment of all features within 5 mil, and unless your board is fairly large. everything seems to be very do-able with out too many layers, or the need to go to micro vias, or ever to blind or burried vias. JaMi - Original Message - From: Juha Pajunen [EMAIL PROTECTED] To: Protel EDA Forum [EMAIL PROTECTED] Sent: Friday, September 27, 2002 1:09 AM Subject: [PEDA] 1020-pin BGA out-routing question (some add) Hi again, What is the best PCB layer stack for this type of BGA? http://groups.yahoo.com/group/protel-users/files/junk/ There is 1020-pin 1mm pitch BGA. It would be very pleasing to have some information and help how to route that huge BGA. What are trace width and cap between different tracks and so... It would be very nice if you couldedit that file (how to route it) and then send it to me to this addrss [EMAIL PROTECTED] I really need all useful information about routing this BGA! :) Sincerely, Juha Pajunen, Hw Engineer Bitboys Oy E-mail: [EMAIL PROTECTED] NOTE: This message, and any attached files, may contain privileged or confidential information. It is intended for use only by the designated recipients. Any disclosure, copying or distribution of, or reliance upon, this message by anyone else is strictly prohibited. http://mobile.yahoo.com.au - Yahoo! Messenger for SMS - Always be connected to your Messenger Friends * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
