On Tue, 03 Dec 2019 08:49:58 +0100
Markus Armbruster wrote:
> Cornelia Huck writes:
>
> > On Sat, 30 Nov 2019 20:42:36 +0100
> > Markus Armbruster wrote:
> >
> > I don't really want to restart the discussion :), but what about:
> >
> >> cpu_model_from_info() is a helper for qmp_query_cpu_mod
From: Cameron Esfahani
Previous implementation in hvf_inject_interrupts() would always inject
VMCS_INTR_T_SWINTR even when VMCS_INTR_T_HWINTR was required. Now
correctly determine when VMCS_INTR_T_HWINTR is appropriate versus
VMCS_INTR_T_SWINTR.
Make sure to clear ins_len and has_error_code whe
The following changes since commit 39032981fa851d25fb27527f25f046fed800e585:
Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2019-12-02' into
staging (2019-12-02 16:29:41 +)
are available in the Git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you
Hi Harish,
On Tue, Dec 3, 2019 at 6:42 AM Harish Jenny K N
wrote:
> > +static int gpio_aggregator_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = &pdev->dev;
> > + struct gpio_desc **descs;
> > + struct gpiochip_fwd *fwd;
> > + int i, n;
> > +
> > + n = g
On 03/12/2019 08.45, Philippe Mathieu-Daudé wrote:
> On 12/3/19 8:29 AM, Thomas Huth wrote:
>> It's been deprecated since QEMU v3.1. The 40p machine should be
>> used nowadays instead.
>>
>> Signed-off-by: Thomas Huth
>> ---
>> .gitmodules | 3 -
>> MAINTAINERS |
02.12.2019, 23:50, "Markus Armbruster" :
> Yury Kotov writes:
>
>> Hi!
>>
>> 29.11.2019, 11:22, "Markus Armbruster" :
>>> Yury Kotov writes:
>>>
The monitor_can_read (as a callback of qemu_chr_fe_set_handlers)
should return size of buffer which monitor_qmp_read or monitor_read
>>
On 03/12/2019 01:53, pannengyuan wrote:
>
>
> On 2019/12/2 21:58, Laurent Vivier wrote:
>> On 02/12/2019 12:15, pannengy...@huawei.com wrote:
>>> From: PanNengyuan
>>>
>>> ivqs/ovqs/c_ivq/c_ovq is forgot to cleanup in
>>> virtio_serial_device_unrealize, the memory leak stack is as bellow:
>>>
>>
On 12/2/19 10:09 PM, Niek Linnenbank wrote:
Dear QEMU developers,
Hereby I would like to contribute the following set of patches to QEMU
which add support for the Allwinner H3 System on Chip and the
Orange Pi PC machine. The following features and devices are supported:
* SMP (Quad Core Corte
On 12/3/19 9:25 AM, Thomas Huth wrote:
On 03/12/2019 08.45, Philippe Mathieu-Daudé wrote:
On 12/3/19 8:29 AM, Thomas Huth wrote:
It's been deprecated since QEMU v3.1. The 40p machine should be
used nowadays instead.
Signed-off-by: Thomas Huth
---
.gitmodules | 3 -
MAINT
On 02/12/2019 22.00, Eduardo Habkost wrote:
> On Mon, Dec 02, 2019 at 08:39:48AM +0100, Igor Mammedov wrote:
>> On Fri, 29 Nov 2019 18:46:12 +0100
>> Paolo Bonzini wrote:
>>
>>> On 29/11/19 13:16, Igor Mammedov wrote:
As for "-m", I'd make it just an alias that translates
-m/mem-path/me
Markus Armbruster writes:
> Kevin recently posted a minimally invasive fix for empty QAPI
> modules[*]. This is my attempt at a fix that also addresses the
> design weakness that led to the bug.
Queued for 5.0.
On 12/2/19 10:09 PM, Niek Linnenbank wrote:
Dear QEMU developers,
Hereby I would like to contribute the following set of patches to QEMU
which add support for the Allwinner H3 System on Chip and the
Orange Pi PC machine. The following features and devices are supported:
* SMP (Quad Core Corte
On 03/12/19 00:55, Cameron Esfahani wrote:
> Changes in v3:
> - Change previous code which saved interrupt/exception type in
> hvf_store_events() to inject later in hvf_inject_interrupts().
> Now, hvf_inject_interrupts() will correctly determine when it's appropriate
> to inject VMCS_INTR_T_H
Public bug reported:
The qemu vhdx driver does not support type 2 (differencing) vhdx images
(usually stored with file extension .avhdx). This means that any hyperv
images with snapshots are not supported by qemu-img. It would be great
to be able to convert to a new qcow image from a backing + set
Hi Dave,
We could use the exist interface to add netfilter and chardev, it might not
have the problem you said.
However, the netfilter and chardev on the primary at the start, that means
we could not dynamic set COLO
feature to VM?
We try to change this chardev to prevent primary VM will stuck t
On 12/2/19 10:09 PM, Niek Linnenbank wrote:
The Xunlong Orange Pi PC is an Allwinner H3 System on Chip
based embedded computer with mainline support in both U-Boot
and Linux. The board comes with a Quad Core Cortex A7 @ 1.3GHz,
512MB RAM, 100Mbit ethernet, USB, SD/MMC, USB, HDMI and
various other
On 03/12/2019 09.51, Philippe Mathieu-Daudé wrote:
> On 12/3/19 9:25 AM, Thomas Huth wrote:
>> On 03/12/2019 08.45, Philippe Mathieu-Daudé wrote:
>>> On 12/3/19 8:29 AM, Thomas Huth wrote:
It's been deprecated since QEMU v3.1. The 40p machine should be
used nowadays instead.
Sig
On 12/3/19 10:15 AM, Thomas Huth wrote:
On 03/12/2019 09.51, Philippe Mathieu-Daudé wrote:
On 12/3/19 9:25 AM, Thomas Huth wrote:
On 03/12/2019 08.45, Philippe Mathieu-Daudé wrote:
On 12/3/19 8:29 AM, Thomas Huth wrote:
It's been deprecated since QEMU v3.1. The 40p machine should be
used nowa
Le 12/2/19 à 10:09 PM, Niek Linnenbank a écrit :
The Allwinner H3 System on Chip includes an Ethernet MAC (EMAC)
which provides 10M/100M/1000M Ethernet connectivity. This commit
adds support for the Allwinner H3 EMAC, including emulation for
the following functionality:
* DMA transfers
*
On Mon, 2 Dec 2019 09:36:21 +
Vladimir Sementsov-Ogievskiy wrote:
> 28.11.2019 1:37, Greg Kurz wrote:
> > On Wed, 27 Nov 2019 22:15:49 +0300
> > Vladimir Sementsov-Ogievskiy wrote:
> >
> >> Make error_append_security_model_hint and
> >> error_append_socket_sockfd_hint hint append helpers we
>> s390x: Fix query-cpu-model-FOO error API violations
>>
>> cpu_model_from_info() is a helper for qmp_query_cpu_model_expansion(),
>> qmp_query_cpu_model_comparison(), qmp_query_cpu_model_baseline(). It
>> dereferences @errp when the visitor or the QOM setter fails. That's
>>
Aleksandar.
enjoy your vacation.
Regards,
Michael Rolnik
On Tue, Dec 3, 2019 at 3:48 AM Aleksandar Markovic <
aleksandar.m.m...@gmail.com> wrote:
>
>
> On Tuesday, December 3, 2019, Aleksandar Markovic <
> aleksandar.m.m...@gmail.com> wrote:
>
>>
>>
>> On Tuesday, December 3, 2019, Aleksandar M
On 02.12.19 15:01, Janosch Frank wrote:
> As it turns out we need to clear the ri controls and PSW enablement
> bit to be architecture compliant.
>
> Signed-off-by: Janosch Frank
> ---
> target/s390x/cpu.c | 5 +
> target/s390x/cpu.h | 7 ++-
> 2 files changed, 11 insertions(+), 1 del
* Fabiano Rosas (faro...@linux.ibm.com) wrote:
> When setting up the DAX window during the virtiofs driver probe inside
> the guest, the Linux arch-specific function arch_add_memory is called,
> which on ppc tries to do a cache flush [1] of the recently added
> memory. At this point the window is m
Thomas Huth writes:
> Some tests create huge (but sparse) files, and to be able to run those
> tests in certain limited environments (like CI containers), we have to
> check for the possibility to create such files first. Thus let's introduce
> a common function to check for large files, and re
Thomas Huth writes:
> Travis recently added the possibility to test on ppc64le, arm64 and s390x
> hosts, too. However, the containers are very restricted there and do not
> allow the creation of large files, so that the tests 060 and 079 are
> currently failing there. So let's add some proper c
On 02.12.19 15:01, Janosch Frank wrote:
> As it turns out we need to clear the ri controls and PSW enablement
> bit to be architecture compliant.
>
> Signed-off-by: Janosch Frank
> ---
> target/s390x/cpu.c | 5 +
> target/s390x/cpu.h | 7 ++-
> 2 files changed, 11 insertions(+), 1 deleti
Thomas Huth writes:
> On 28/11/2019 22.06, Stefan Weil wrote:
>> Am 28.11.19 um 16:35 schrieb Thomas Huth:
>>
>>> So far we only have compile coverage for tci. But since commit
>>> 2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation
>>> for INDEX_op_ld16u_i64") has been included
On Fri, 29 Nov 2019 13:59:37 +0100
Greg Kurz wrote:
> On Fri, 29 Nov 2019 13:49:20 +0100
> Paolo Bonzini wrote:
>
> > On 29/11/19 13:32, Greg Kurz wrote:
> > > Nice. :)
> > >
> > > Reviewed-by: Greg Kurz
> > >
> > > Paolo,
> > >
> > > I can take this through my 9p tree if you want. Otherwis
Hi,
> +/* If this is GET_DESCRIPTOR request for configuration descriptor,
> + * remove 'remote wakeup' flag from it to prevent idle power down
> + * in Windows guest */
scripts/checkpatch.pl complains about that, please fix (and also the
other checkpatch warnings).
> +
On Fri, Nov 29, 2019 at 03:02:41PM +0100, Janosch Frank wrote:
> On 11/29/19 1:35 PM, Daniel P. Berrangé wrote:
> > Is there any way to prevent a guest from using protected mode even
> > if QEMU supports it ? eg the mgmt app may want to be able to
> > guarantee that all VMs are migratable, so don
Hi,
> +/*
> + * If this is GET_DESCRIPTOR request for configuration descriptor,
> + * remove 'remote wakeup' flag from it to prevent idle power down
> + * in Windows guest
> + */
> +if (dev->suppress_remote_wake &&
> +control_packet->re
We seem to be coming to the conclusion something that:
a) It should live in the qemu tree
b) It shouldn't live under contrib
c) We'll create a new top level, i.e. 'daemons'
d) virtiofsd will be daemons/virtiofsd
Now, somethings I'm less clear on:
e) What else would move into daemons? I
On Fri, 18 Oct 2019 17:06:18 +0200
Damien Hedde wrote:
> Provide a temporary device_legacy_reset function doing what
> device_reset does to prepare for the transition with Resettable
> API.
>
> All occurrence of device_reset in the code tree are also replaced
> by device_legacy_reset.
>
> The n
On Tue, 3 Dec 2019 at 08:16, Paolo Bonzini wrote:
>
> The following changes since commit 39032981fa851d25fb27527f25f046fed800e585:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2019-12-02'
> into staging (2019-12-02 16:29:41 +)
>
> are available in the Git repository at:
On Tue, 3 Dec 2019 at 10:53, Dr. David Alan Gilbert wrote:
>
> We seem to be coming to the conclusion something that:
>
> a) It should live in the qemu tree
> b) It shouldn't live under contrib
> c) We'll create a new top level, i.e. 'daemons'
> d) virtiofsd will be daemons/virtiofsd
>
> N
On Fri, 18 Oct 2019 17:06:19 +0200
Damien Hedde wrote:
> Adds trace events to reset procedure and when updating the parent
> bus of a device.
>
> Signed-off-by: Damien Hedde
> ---
> hw/core/qdev.c | 27 ---
> hw/core/trace-events | 9 +
> 2 files changed,
On 11/30/19 9:45 AM, Alex Bennée wrote:
> This is in preparation for further re-factoring of the register API
> with the rest of the code. Theoretically the read register function
> could overwrite the MAX_PACKET_LENGTH buffer although currently all
> registers are well within the size range.
>
On Fri, 11 Oct 2019 at 14:48, Richard Henderson
wrote:
>
> A translation with 2 ranges has both positive and negative addresses.
> This is true for the EL1&0 and the as-yet unimplemented EL2&0 regimes.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/internals.h | 14 ++
>
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Tue, 3 Dec 2019 at 10:53, Dr. David Alan Gilbert
> wrote:
> >
> > We seem to be coming to the conclusion something that:
> >
> > a) It should live in the qemu tree
> > b) It shouldn't live under contrib
> > c) We'll create a new top lev
Richard Henderson writes:
> On 11/27/19 10:06 PM, Max Filippov wrote:
>> When a breakpoint is inserted at location for which there's currently no
>> virtual to physical translation no action is taken on CPU TB cache. If a
>> TB for that virtual address already exists but is not visible ATM the
On 12/2/19 8:04 AM, Michael Rolnik wrote:
Aleksandar.
If this code is going to be merge in 2019 I should modify al the
copyrights, right. or should I put 2020 in?
Usually the copyright date is when you first contributed your code to
the world (here, the list). If a patch was on the list in 2
On Mon, Nov 11, 2019 at 12:13:47PM +0100, Kevin Wolf wrote:
> Am 25.10.2019 um 18:04 hat Stefan Hajnoczi geschrieben:
> > From: Aarushi Mehta
> >
> > Signed-off-by: Aarushi Mehta
> > Signed-off-by: Stefan Hajnoczi
>
> This commit message needs to answer at least where these stubs are
> actuall
On 11/30/19 5:57 PM, Michael Rolnik wrote:
Hi Aleksandar.
I guess no testing would be possible.
My previous series of patches (about 2 years ago, before Sarah joined)
did not contain any peripherals, there were only the CPU and the sample
board, I used it to test instructions.
Somebody compla
On Fri, 18 Oct 2019 17:06:20 +0200
Damien Hedde wrote:
> This commit defines an interface allowing multi-phase reset. This aims
> to solve a problem of the actual single-phase reset (built in
> DeviceClass and BusClass): reset behavior is dependent on the order
> in which reset handlers are calle
On Tue, Dec 03, 2019 at 11:06:44AM +, Peter Maydell wrote:
> On Tue, 3 Dec 2019 at 10:53, Dr. David Alan Gilbert
> wrote:
> >
> > We seem to be coming to the conclusion something that:
> >
> > a) It should live in the qemu tree
> > b) It shouldn't live under contrib
> > c) We'll create
On Fri, 29 Nov 2019 18:41:26 +
Peter Maydell wrote:
> On Fri, 18 Oct 2019 at 16:07, Damien Hedde wrote:
> >
> > In qdev_set_parent_bus(), when changing the parent bus of a
> > realized device, if the source and destination buses are not in the
> > same reset state, some adaptation are requir
Wainer dos Santos Moschetta writes:
> By default VM build test use qemu-img from system's PATH to
> create the image disk. Due the lack of qemu-img on the system
> or the desire to simply use a version built with QEMU, it would
> be nice to allow one to set its path. So this patch makes that
>
On Fri, 18 Oct 2019 17:06:28 +0200
Damien Hedde wrote:
> Replace deprecated qdev_reset_all by resettable_cold_reset_fn for
> the ipl registration in the main reset handlers.
>
> This does not impact the behavior for the following reasons:
> + at this point resettable just call the old reset meth
On Fri, 18 Oct 2019 17:06:17 +0200
Damien Hedde wrote:
> Hi all,
>
> The purpose of this series is to split the current reset procedure
> into multiple phases. This will help to solve some ordering
> difficulties we have during reset. Previous version can be found here:
> https://lists.gnu.org/a
On Fri, 11 Oct 2019 at 14:48, Richard Henderson
wrote:
>
> This is TFSRE0_EL1, TFSR_EL1, TFSR_EL2, TFSR_EL3,
> RGSR_EL1, GCR_EL1, GMID_EL1, and PSTATE.TCO.
>
> Signed-off-by: Richard Henderson
> ---
> v3: Add GMID; add access_mte.
> v4: Define only TCO at mte_insn_reg.
> ---
> target/arm/cpu.h
On 03/12/19 11:34, Greg Kurz wrote:
> On Fri, 29 Nov 2019 13:59:37 +0100
> Greg Kurz wrote:
>
>> On Fri, 29 Nov 2019 13:49:20 +0100
>> Paolo Bonzini wrote:
>>
>>> On 29/11/19 13:32, Greg Kurz wrote:
Nice. :)
Reviewed-by: Greg Kurz
Paolo,
I can take this throug
11.11.2019 19:02, Max Reitz wrote:
> We can use this decorator above TestRepairQuorum.setUp() to skip all
> quorum tests with a single line.
>
> Signed-off-by: Max Reitz
Reviewed-by: Vladimir Sementsov-Ogievskiy
--
Best regards,
Vladimir
The default machine type on aarch64 is not set which causes error in
qtest_init(). Here we use the "virt" machine as the default machine
type on aarch64.
Signed-off-by: Xiang Zheng
---
tests/fw_cfg-test.c | 65 +++--
1 file changed, 51 insertions(+), 14 de
There are quite a few tests disabled on AArch64 such as fw_cfg-tests.
This patch series fix some problems in test code and adapt it to
virt machine.
Xiang Zheng (5):
tests: fw_cfg: Rename pc_fw_cfg_* to fw_cfg_*
tests: fw_cfg: Support read/write of fw_cfg registers on aarch64
tests: fw_cfg:
Rename pc_fw_cfg_* to fw_cfg_* to make them common for other
architectures so that we can run fw_cfg tests on aarch64.
Signed-off-by: Xiang Zheng
---
tests/fw_cfg-test.c | 48
tests/hd-geo-test.c | 6 ++---
tests/libqos/fw_cfg.h| 20 +++
I'm not sure whether it's neccesary to add FW_CFG_RAM_SIZE and
FW_CFG_MAX_CPUS into fw_cfg on virt machine. This patch just makes
the fw_cfg-test happy.
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index d4bedc2
Now turn on the fw_cfg test for aarch64.
Signed-off-by: Xiang Zheng
---
tests/Makefile.include | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 8566f5f119..180e0ed2b7 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -276
On Tue, 3 Dec 2019 at 12:29, Xiang Zheng wrote:
>
> I'm not sure whether it's neccesary to add FW_CFG_RAM_SIZE and
> FW_CFG_MAX_CPUS into fw_cfg on virt machine. This patch just makes
> the fw_cfg-test happy.
>
> Signed-off-by: Xiang Zheng
> ---
> hw/arm/virt.c | 3 +++
> 1 file changed, 3 inser
Refer to the fw_cfg registers locations of x86 and arm in
docs/specs/fw_cfg.txt, the test codes need to differ on the addresses
for read/write.
Besides, fix the endian problems in mm_fw_cfg_select().
Signed-off-by: Xiang Zheng
---
tests/libqos/fw_cfg.c | 17 +++--
1 file changed, 15
On Tue, 3 Dec 2019 at 12:29, Xiang Zheng wrote:
>
> Rename pc_fw_cfg_* to fw_cfg_* to make them common for other
> architectures so that we can run fw_cfg tests on aarch64.
>
> Signed-off-by: Xiang Zheng
> -static inline QFWCFG *pc_fw_cfg_init(QTestState *qts)
> +static inline QFWCFG *fw_cfg_ini
On 11/30/19 9:45 AM, Alex Bennée wrote:
> Rather than having a static buffer replace str_buf with a GString
> which we know can grow on demand. Convert the internal functions to
> take a GString instead of a char * and length.
>
> Signed-off-by: Alex Bennée
> Reviewed-by: Richard Henderson
>
On Tue, 3 Dec 2019, at 16:39, Philippe Mathieu-Daudé wrote:
> On 12/3/19 5:14 AM, Andrew Jeffery wrote:
> > Prepare for SoCs such as the ASPEED AST2600 whose firmware configures
> > CNTFRQ to values significantly larger than the static 62.5MHz value
> > currently derived from GTIMER_SCALE. As th
On Tue, 3 Dec 2019, at 16:49, Philippe Mathieu-Daudé wrote:
> On 12/3/19 5:14 AM, Andrew Jeffery wrote:
> > The ASPEED AST2600 clocks the generic timer at the rate of HPLL. On
> > recent firmwares this is at 1125MHz, which is considerably quicker than
> > the assumed 62.5MHz of the current gener
11.11.2019 19:02, Max Reitz wrote:
> Signed-off-by: Max Reitz
> ---
> tests/qemu-iotests/iotests.py | 59 +++
> 1 file changed, 59 insertions(+)
>
> diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
> index d34305ce69..3e03320ce3 100644
On 03/12/2019 13.27, Xiang Zheng wrote:
> There are quite a few tests disabled on AArch64 such as fw_cfg-tests.
> This patch series fix some problems in test code and adapt it to
> virt machine.
>
> Xiang Zheng (5):
> tests: fw_cfg: Rename pc_fw_cfg_* to fw_cfg_*
> tests: fw_cfg: Support read/
On 26/11/19 13:14, Dr. David Alan Gilbert wrote:
>> IOW, if we did decide we want it in QEMU, then instead of
>> '$GIT/contrib/virtiofsd', I'd prefer to see '$GIT/virtiofsd'.
>
> I'm not sure it deserves a new top level for such a specific tool.
>
It could be in fsdev/virtiofsd, but I agree with
On 03/12/19 10:15, Thomas Huth wrote:
Maybe we can rename this as read_boot_order_mm, and the previous
read_boot_order_pc as read_boot_order_io.
>>>
>>> I don't think it makes much sense. This was completely specific to the
>>> "prep" machine, even the "40p" machine seems to prefer fw_cfg
Hi,
Maybe we should add:
CONFIG_HOST_BIOS_GEOMETRY=n
to rom/config.seabios-128k and recreate the 128k image?
On 12/2/19 4:46 PM, Cornelia Huck wrote:
> On Mon, 2 Dec 2019 09:01:45 -0500
> Janosch Frank wrote:
>
>> Up to now we only had an ioctl to reset vcpu data QEMU couldn't reach
>> for the initial reset, which was also called for the clear reset. To
>
> s/which/and that/ ?
Ok
>
>> be architectu
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> On 03/12/19 14:02, Dr. David Alan Gilbert wrote:
> >> It could be in fsdev/virtiofsd,
> > fsdev is currently all 9p stuff, so that would seem very confusing.
>
> Move it to fsdev/9p?
Greg: Are you OK with us doing that, and then having fsdev/virtiofs
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> On 26/11/19 13:14, Dr. David Alan Gilbert wrote:
> >> IOW, if we did decide we want it in QEMU, then instead of
> >> '$GIT/contrib/virtiofsd', I'd prefer to see '$GIT/virtiofsd'.
> >
> > I'm not sure it deserves a new top level for such a specific tool
Hello All,
Currently I am studying qemu and I want to figure out how I can use
custom logic gates on user space emulation. I am searching very basic
'hello world' kind of tutorial or some resources to i.e. adding left
or LOR : 1 | 0 = 1 but 0 | 1 = 0 to existing x86 arch
((https://en.wikibooks.or
On 28/11/2019 22.33, Stefan Weil wrote:
> Am 28.11.19 um 22:06 schrieb Stefan Weil:
>
>> Am 28.11.19 um 16:35 schrieb Thomas Huth:
>>
>>> So far we only have compile coverage for tci. But since commit
>>> 2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation
>>> for INDEX_op_ld16u_i64
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Tue, Dec 03, 2019 at 11:06:44AM +, Peter Maydell wrote:
> > On Tue, 3 Dec 2019 at 10:53, Dr. David Alan Gilbert
> > wrote:
> > >
> > > We seem to be coming to the conclusion something that:
> > >
> > > a) It should live in the qemu tree
On 03/12/2019 14.04, Paolo Bonzini wrote:
> On 03/12/19 10:15, Thomas Huth wrote:
> Maybe we can rename this as read_boot_order_mm, and the previous
> read_boot_order_pc as read_boot_order_io.
I don't think it makes much sense. This was completely specific to the
"prep" machi
On 03/12/19 14:02, Dr. David Alan Gilbert wrote:
>> It could be in fsdev/virtiofsd,
> fsdev is currently all 9p stuff, so that would seem very confusing.
Move it to fsdev/9p?
>> but I agree with Daniel that at this
>> point the QEMU build system introduces baggage that you may not want for
>> vir
* Daniel Cho (daniel...@qnap.com) wrote:
> Hi Dave,
>
> We could use the exist interface to add netfilter and chardev, it might not
> have the problem you said.
>
> However, the netfilter and chardev on the primary at the start, that means
> we could not dynamic set COLO
> feature to VM?
I wasn'
Sync in the new vcpu resets.
Signed-off-by: Janosch Frank
---
linux-headers/linux/kvm.h | 4
1 file changed, 4 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 3d9b18f7f8..f9fc3f6dc0 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.
Up to now we only had an ioctl to reset vcpu data QEMU couldn't reach
for the initial reset, and that was also called for the clear
reset. To be architecture compliant, we also need to clear local
interrupts on a normal reset.
Because of this and the upcoming protvirt support we need to add
ioctls
On 03.12.19 14:28, Janosch Frank wrote:
> We need to set the short psw indication bit in the reset psw, as it is
> a short psw.
>
> fixes: 9629823290 ("pc-bios/s390-ccw: do a subsystem reset before running the
> guest")
> Signed-off-by: Janosch Frank
We should also add
commit 24bb1fa36ff7b2
As it turns out we need to clear the ri controls and PSW enablement
bit to be architecture compliant.
Signed-off-by: Janosch Frank
Reviewed-by: Christian Borntraeger
---
target/s390x/cpu.c | 7 ++-
target/s390x/cpu.h | 7 ++-
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git
On a cpu reset normal, we need to clear local cpus. Unfortunately we
need a new API for that, since KVM only exposes one of the three
resets.
Also we need to clear the riccb and the PSW ri mask on a normal reset.
And we need to set the short psw bit indication in the bios when doing
a reset.
Patc
03.12.2019 16:32, Vladimir Sementsov-Ogievskiy wrote:
> 11.11.2019 19:02, Max Reitz wrote:
>> Signed-off-by: Max Reitz
>
>
> Reviewed-by: Vladimir Sementsov-Ogievskiy
>
Oops, stop. Why do you remove line "self.vm.shutdown()" ?
--
Best regards,
Vladimir
We need to set the short psw indication bit in the reset psw, as it is
a short psw.
fixes: 9629823290 ("pc-bios/s390-ccw: do a subsystem reset before running the
guest")
Signed-off-by: Janosch Frank
---
pc-bios/s390-ccw/jump2ipl.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(
11.11.2019 19:02, Max Reitz wrote:
> Signed-off-by: Max Reitz
Reviewed-by: Vladimir Sementsov-Ogievskiy
--
Best regards,
Vladimir
On Fri, 11 Oct 2019 at 14:49, Richard Henderson
wrote:
>
> Implements the rules of "PE generation of Checked and Unchecked
> accesses" which aren't already implied by TB_FLAGS_MTE_ACTIVE.
> Implements the rules of "PE handling of Tag Check Failure".
>
> Does not implement tag physical address spac
On 03/12/19 14:16, Thomas Huth wrote:
> On 03/12/2019 14.04, Paolo Bonzini wrote:
>> On 03/12/19 10:15, Thomas Huth wrote:
>> Maybe we can rename this as read_boot_order_mm, and the previous
>> read_boot_order_pc as read_boot_order_io.
>
> I don't think it makes much sense. This was
Cleber Rosa writes:
> On Mon, Aug 19, 2019 at 01:18:26AM +0200, Philippe Mathieu-Daudé wrote:
>> Add a runner script to be able to run acceptance tests within
>> Docker images. We can now reproduce Travis CI builds locally (and
>> debug them!).
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>>
On 03/12/19 1:47 PM, Geert Uytterhoeven wrote:
> Hi Harish,
>
> On Tue, Dec 3, 2019 at 6:42 AM Harish Jenny K N
> wrote:
>>> +static int gpio_aggregator_probe(struct platform_device *pdev)
>>> +{
>>> + struct device *dev = &pdev->dev;
>>> + struct gpio_desc **descs;
>>> + struct gpio
On 27/11/19 2:12 PM, Geert Uytterhoeven wrote:
> Add a maintainership section for the GPIO Aggregator/Repeater, covering
> documentation, Device Tree bindings, and driver source code.
>
> Signed-off-by: Geert Uytterhoeven
> ---
> Harish: Do you want to be listed as maintainer, too?
Yes. please
Cleber Rosa writes:
> RFC: QEMU Gating CI
> ===
>
> This RFC attempts to address most of the issues described in
> "Requirements/GatinCI"[1]. An also relevant write up is the "State of
> QEMU CI as we enter 4.0"[2].
>
> The general approach is one to minimize the infrastructure
> +static int gpio_aggregator_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct gpio_desc **descs;
> + struct gpiochip_fwd *fwd;
> + int i, n;
> +
> + n = gpiod_count(dev, NULL);
> + if (n < 0)
> + return n;
> +
> + de
On Mon, Dec 02, 2019 at 01:12:54PM -0500, Cleber Rosa wrote:
> On Mon, Dec 02, 2019 at 05:00:18PM +, Stefan Hajnoczi wrote:
> > On Mon, Dec 02, 2019 at 09:05:52AM -0500, Cleber Rosa wrote:
> > > RFC: QEMU Gating CI
> > > ===
> >
> > Excellent, thank you for your work on this!
>
On Fri, 11 Oct 2019 at 14:49, Richard Henderson
wrote:
>
> R0078 specifies that base register, or base register plus immediate
> offset, is unchecked when the base register is SP.
It looks like rule-numbers didn't make it into the final Arm ARM,
so I guess the reference here would just be to sect
On 27/11/19 2:12 PM, Geert Uytterhoeven wrote:
> Add Device Tree bindings for a GPIO repeater, with optional translation
> of physical signal properties. This is useful for describing explicitly
> the presence of e.g. an inverter on a GPIO line, and was inspired by the
> non-YAML gpio-inverter b
On Fri, 11 Oct 2019 at 14:49, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> v2: Update to 00eac5.
> Merge choose_random_nonexcluded_tag into helper_irg since
> that pseudo function no longer exists separately.
> ---
> target/arm/helper-a64.h| 1 +
> target/ar
Hi Geert,
On Wed, Nov 27, 2019 at 09:42:51AM +0100, Geert Uytterhoeven wrote:
> +static int gpio_aggregator_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct gpio_desc **descs;
> + struct gpiochip_fwd *fwd;
> + int i, n;
FWIW/FTR, doing some
Hi Philippe.
I copied Richard's file and modified it's content, that's why Richard is
there.
Regards,
Michael Rolnik
On Tue, Dec 3, 2019 at 1:18 PM Philippe Mathieu-Daudé
wrote:
> On 12/2/19 8:04 AM, Michael Rolnik wrote:
> > Aleksandar.
> >
> > If this code is going to be merge in 2019 I shou
On Tue, 2019-12-03 at 00:37 -0500, Michael S. Tsirkin wrote:
> On Tue, Dec 03, 2019 at 08:53:42AM +0800, pannengyuan wrote:
> >
> >
> > On 2019/12/2 21:58, Laurent Vivier wrote:
> > > On 02/12/2019 12:15, pannengy...@huawei.com wrote:
> > > > From: PanNengyuan
> > > >
> > > > ivqs/ovqs/c_ivq/c_
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