Module Name:src
Committed By: gutteridge
Date: Thu Jul 20 23:31:28 UTC 2023
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_gmx.c
Log Message:
octeon_gmx.c: fix spelling in (default disabled) error messages
To generate a diff of this commit:
cvs rdiff -u -r1.22
Module Name:src
Committed By: gutteridge
Date: Thu Jul 20 23:31:28 UTC 2023
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_gmx.c
Log Message:
octeon_gmx.c: fix spelling in (default disabled) error messages
To generate a diff of this commit:
cvs rdiff -u -r1.22
Module Name:src
Committed By: riastradh
Date: Tue Mar 21 22:07:29 UTC 2023
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_rnm.c
Log Message:
octrnm(4): Raise delay on startup.
According to CN50XX-HRM-V0.99E and CN78XX-HM-0.99E:
The entropy is provided by the
Module Name:src
Committed By: riastradh
Date: Tue Mar 21 22:07:29 UTC 2023
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_rnm.c
Log Message:
octrnm(4): Raise delay on startup.
According to CN50XX-HRM-V0.99E and CN78XX-HM-0.99E:
The entropy is provided by the
Module Name:src
Committed By: skrll
Date: Thu Sep 29 06:59:02 UTC 2022
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c octeon_smi.c octeon_xhci.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28
Module Name:src
Committed By: skrll
Date: Thu Sep 29 06:59:02 UTC 2022
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c octeon_smi.c octeon_xhci.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28
Module Name:src
Committed By: thorpej
Date: Sun Sep 18 11:38:48 UTC 2022
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c if_cnmacvar.h
Log Message:
Eliminate use of IFF_OACTIVE.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27
Module Name:src
Committed By: thorpej
Date: Sun Sep 18 11:38:48 UTC 2022
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c if_cnmacvar.h
Log Message:
Eliminate use of IFF_OACTIVE.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27
Module Name:src
Committed By: riastradh
Date: Sat Apr 9 23:34:40 UTC 2022
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
mips/cavium: Insert appropriate membars around IPIs.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27
Module Name:src
Committed By: riastradh
Date: Sat Apr 9 23:34:40 UTC 2022
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
mips/cavium: Insert appropriate membars around IPIs.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27
Module Name:src
Committed By: riastradh
Date: Sat Mar 26 19:38:00 UTC 2022
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
mips/cavium: Simplify membars around interrupt establishment.
Previously I used xc_barrier to ensure the initialization of the
Module Name:src
Committed By: riastradh
Date: Sat Mar 26 19:38:00 UTC 2022
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
mips/cavium: Simplify membars around interrupt establishment.
Previously I used xc_barrier to ensure the initialization of the
Module Name:src
Committed By: riastradh
Date: Wed Mar 23 23:24:21 UTC 2022
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
mips/cavium: Fix membars around establishing interrupt handlers.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25
Module Name:src
Committed By: riastradh
Date: Wed Mar 23 23:24:21 UTC 2022
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
mips/cavium: Fix membars around establishing interrupt handlers.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25
Module Name:src
Committed By: martin
Date: Wed Jan 26 18:57:56 UTC 2022
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_uart.c
Log Message:
Fix initialization of the register map by using the com_init_regs()
helper function. Pointed out by jmcneill.
To generate a
Module Name:src
Committed By: martin
Date: Wed Jan 26 18:57:56 UTC 2022
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_uart.c
Log Message:
Fix initialization of the register map by using the com_init_regs()
helper function. Pointed out by jmcneill.
To generate a
Module Name:src
Committed By: simonb
Date: Thu May 27 03:23:29 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c
Log Message:
Move the send queue checking to a new function, and also call this
in the rx interrupt path. Measureable improvement on a NFS
Module Name:src
Committed By: simonb
Date: Thu May 27 03:23:29 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c
Log Message:
Move the send queue checking to a new function, and also call this
in the rx interrupt path. Measureable improvement on a NFS
Module Name:src
Committed By: simonb
Date: Thu May 27 01:43:32 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c
Log Message:
Schedule the send cleanup function for next tick in cnmac_start(). In
the send cleanup function, schedule for the next tick
Module Name:src
Committed By: simonb
Date: Thu May 27 01:43:32 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c
Log Message:
Schedule the send cleanup function for next tick in cnmac_start(). In
the send cleanup function, schedule for the next tick
Module Name:src
Committed By: simonb
Date: Fri May 14 13:36:28 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_gmx.c
Log Message:
Fix a missed bitmask to __SHIFTOUT conversion in rev 1.12.
Fixes negotiation problems on non-gige switches. Problem discovered
Module Name:src
Committed By: simonb
Date: Fri May 14 13:36:28 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_gmx.c
Log Message:
Fix a missed bitmask to __SHIFTOUT conversion in rev 1.12.
Fixes negotiation problems on non-gige switches. Problem discovered
Module Name:src
Committed By: thorpej
Date: Mon May 10 23:58:52 UTC 2021
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
Specify the "fdt" interface attribute when configuring via FDT, since
mainbus also carries the "mainbus" interface attribute.
To
Module Name:src
Committed By: thorpej
Date: Mon May 10 23:58:52 UTC 2021
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
Specify the "fdt" interface attribute when configuring via FDT, since
mainbus also carries the "mainbus" interface attribute.
To
Module Name:src
Committed By: simonb
Date: Wed May 5 06:47:29 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_cib.c octeon_gmx.c octeon_intc.c
Log Message:
Sprinkle some static.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7
Module Name:src
Committed By: simonb
Date: Wed May 5 06:47:29 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_cib.c octeon_gmx.c octeon_intc.c
Log Message:
Sprinkle some static.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7
Module Name:src
Committed By: simonb
Date: Wed Mar 24 08:10:14 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_fpa.c
Log Message:
Remove somewhat dubious empty octfpa_desc structure.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10
Module Name:src
Committed By: simonb
Date: Wed Mar 24 08:10:14 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_fpa.c
Log Message:
Remove somewhat dubious empty octfpa_desc structure.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10
Module Name:src
Committed By: thorpej
Date: Mon Jan 4 17:22:59 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_asx.c octeon_fpa.c octeon_gmx.c
octeon_ipd.c octeon_pip.c octeon_pko.c
Log Message:
malloc(9) -> kmem(9)
To generate a diff of this
Module Name:src
Committed By: thorpej
Date: Mon Jan 4 17:22:59 UTC 2021
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_asx.c octeon_fpa.c octeon_gmx.c
octeon_ipd.c octeon_pip.c octeon_pko.c
Log Message:
malloc(9) -> kmem(9)
To generate a diff of this
Module Name:src
Committed By: jmcneill
Date: Thu Oct 15 09:32:40 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_xhci.c
Log Message:
Initialise xhci_softc sc_ios
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: jmcneill
Date: Thu Oct 15 09:32:40 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_xhci.c
Log Message:
Initialise xhci_softc sc_ios
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3
Module Name:src
Committed By: jmcneill
Date: Mon Sep 28 12:14:47 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
faa_a4x_bst is gone
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/cavium/mainbus.c
Please note
Module Name:src
Committed By: jmcneill
Date: Mon Sep 28 12:14:47 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
faa_a4x_bst is gone
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/mips/cavium/mainbus.c
Please note
Module Name:src
Committed By: simonb
Date: Tue Aug 18 10:35:51 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
We don't need to call the POW and FGA bootstrap functions from the FDT
mainbus attach, the iobus attach code does this already and is
Module Name:src
Committed By: simonb
Date: Tue Aug 18 10:35:51 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
We don't need to call the POW and FGA bootstrap functions from the FDT
mainbus attach, the iobus attach code does this already and is
Module Name:src
Committed By: skrll
Date: Tue Aug 18 07:41:41 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Fix MULTIPROCESSOR build
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/mips/cavium/octeon_intr.c
Module Name:src
Committed By: skrll
Date: Tue Aug 18 07:41:41 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Fix MULTIPROCESSOR build
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/mips/cavium/octeon_intr.c
Module Name:src
Committed By: jmcneill
Date: Mon Aug 17 21:25:12 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c octeon1p_iobus.c octeon_iobus.c
src/sys/arch/mips/cavium/include: iobusvar.h
Log Message:
Attach an iobus with octrnm even if using
Module Name:src
Committed By: jmcneill
Date: Mon Aug 17 21:25:12 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c octeon1p_iobus.c octeon_iobus.c
src/sys/arch/mips/cavium/include: iobusvar.h
Log Message:
Attach an iobus with octrnm even if using
Module Name:src
Committed By: jmcneill
Date: Mon Aug 17 21:00:29 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
IPI_SHOOTDOWN needs to be IPL_SCHED. Spotted by nick.
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23
Module Name:src
Committed By: jmcneill
Date: Mon Aug 17 21:00:29 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
IPI_SHOOTDOWN needs to be IPL_SCHED. Spotted by nick.
To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23
Module Name:src
Committed By: simonb
Date: Wed Aug 5 04:47:35 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Apply some static to some symbols.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22
Module Name:src
Committed By: simonb
Date: Wed Aug 5 04:47:35 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Apply some static to some symbols.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22
Module Name:src
Committed By: simonb
Date: Wed Aug 5 04:19:11 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Target all device interrupts to cpu0.
Patch from skrll@. Code is conditional, hopefully not needed long term.
To generate a
Module Name:src
Committed By: simonb
Date: Wed Aug 5 04:19:11 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Target all device interrupts to cpu0.
Patch from skrll@. Code is conditional, hopefully not needed long term.
To generate a
Module Name:src
Committed By: simonb
Date: Tue Aug 4 01:59:46 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_corereg.h
Log Message:
Add some CvmCtl bits from newer cnMIPS cores.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: simonb
Date: Tue Aug 4 01:59:46 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_corereg.h
Log Message:
Add some CvmCtl bits from newer cnMIPS cores.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: jmcneill
Date: Wed Jul 22 15:01:18 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c
Log Message:
Initialize PageMask and Wired registers on secondary processors.
To generate a diff of this commit:
cvs rdiff -u -r1.16
Module Name:src
Committed By: jmcneill
Date: Wed Jul 22 15:01:18 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c
Log Message:
Initialize PageMask and Wired registers on secondary processors.
To generate a diff of this commit:
cvs rdiff -u -r1.16
Module Name:src
Committed By: jmcneill
Date: Mon Jul 20 17:56:13 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_ciureg.h
Log Message:
Fix coreX/IP4 summary register offsets
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11
Module Name:src
Committed By: jmcneill
Date: Mon Jul 20 17:56:13 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_ciureg.h
Log Message:
Fix coreX/IP4 summary register offsets
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11
Module Name:src
Committed By: jmcneill
Date: Mon Jul 20 14:05:51 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Simplify IPI handling even more for now and run everything at IPL_HIGH.
To generate a diff of this commit:
cvs rdiff -u -r1.19
Module Name:src
Committed By: jmcneill
Date: Mon Jul 20 14:05:51 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Simplify IPI handling even more for now and run everything at IPL_HIGH.
To generate a diff of this commit:
cvs rdiff -u -r1.19
Module Name:src
Committed By: jmcneill
Date: Mon Jul 20 13:30:41 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Fix confusion between ipi bitmask and mbox register bit assignments.
To generate a diff of this commit:
cvs rdiff -u -r1.18
Module Name:src
Committed By: jmcneill
Date: Mon Jul 20 13:30:41 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Fix confusion between ipi bitmask and mbox register bit assignments.
To generate a diff of this commit:
cvs rdiff -u -r1.18
Module Name:src
Committed By: simonb
Date: Sun Jul 19 08:58:35 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c
Log Message:
KNF whitespace nits.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/mips/cavium/octeon_cpunode.c
Module Name:src
Committed By: simonb
Date: Sun Jul 19 08:58:35 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c
Log Message:
KNF whitespace nits.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/mips/cavium/octeon_cpunode.c
Module Name:src
Committed By: jmcneill
Date: Fri Jul 17 19:40:47 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Simplify IPI handling and change IPLs of IPI_HALT, IPI_XCALL, and
IPI_GENERIC from IPL_SCHED to IPL_HIGH.
To generate a diff of
Module Name:src
Committed By: jmcneill
Date: Fri Jul 17 19:40:47 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Simplify IPI handling and change IPLs of IPI_HALT, IPI_XCALL, and
IPI_GENERIC from IPL_SCHED to IPL_HIGH.
To generate a diff of
Module Name:src
Committed By: jmcneill
Date: Fri Jul 17 17:57:16 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c octeonvar.h
Log Message:
Cleanup handling of multiple banks.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16
Module Name:src
Committed By: jmcneill
Date: Fri Jul 17 17:57:16 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c octeonvar.h
Log Message:
Cleanup handling of multiple banks.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16
Module Name:src
Committed By: simonb
Date: Fri Jul 17 08:06:02 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_xhci.c octeon_xhcireg.h
Log Message:
Don't use a reserved value for the USB endian CSR selects and
enable octxhci_uctl_init(). Between these, USB
Module Name:src
Committed By: simonb
Date: Fri Jul 17 08:06:02 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_xhci.c octeon_xhcireg.h
Log Message:
Don't use a reserved value for the USB endian CSR selects and
enable octxhci_uctl_init(). Between these, USB
Module Name:src
Committed By: jmcneill
Date: Thu Jul 16 21:33:50 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c octeonvar.h
Log Message:
Support 128 IRQs instead of 64. This is icky and needs to be cleaned up.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: jmcneill
Date: Thu Jul 16 21:33:50 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c octeonvar.h
Log Message:
Support 128 IRQs instead of 64. This is icky and needs to be cleaned up.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: jmcneill
Date: Thu Jul 16 16:40:28 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
Initialize FDT console device
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/cavium/mainbus.c
Module Name:src
Committed By: jmcneill
Date: Thu Jul 16 16:40:28 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: mainbus.c
Log Message:
Initialize FDT console device
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/cavium/mainbus.c
Hi Rin,
Rin Okuyama wrote:
> Hi,
>
> On 2020/06/23 14:18, Simon Burge wrote:
> > Module Name:src
> > Committed By: simonb
> > Date: Tue Jun 23 05:18:43 UTC 2020
> >
> > Modified Files:
> > src/sys/arch/mips/cavium/dev: octeon_uart.c
> >
> > Log Message:
> > Add
Module Name:src
Committed By: simonb
Date: Sat Jun 27 02:49:42 UTC 2020
Added Files:
src/sys/arch/mips/cavium/dev: octeon_uartvar.h
Log Message:
Add new file containing a couple of UART prototypes.
Missing file pointed out by rin@. Thanks!
To generate a diff of this
Module Name:src
Committed By: simonb
Date: Sat Jun 27 02:49:42 UTC 2020
Added Files:
src/sys/arch/mips/cavium/dev: octeon_uartvar.h
Log Message:
Add new file containing a couple of UART prototypes.
Missing file pointed out by rin@. Thanks!
To generate a diff of this
Hi,
On 2020/06/23 14:18, Simon Burge wrote:
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:18:43 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_uart.c
Log Message:
Add support for a very simple output-only console so early printf() can work.
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:18:43 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_uart.c
Log Message:
Add support for a very simple output-only console so early printf() can work.
Minor tweaks, remove some unused code.
To
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:18:43 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_uart.c
Log Message:
Add support for a very simple output-only console so early printf() can work.
Minor tweaks, remove some unused code.
To
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:18:28 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_dwctwo.c
Log Message:
Make sure we only attach to CN3xxx/CN5xxx.
Cleanup - mostly removing unused code.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:18:28 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_dwctwo.c
Log Message:
Make sure we only attach to CN3xxx/CN5xxx.
Cleanup - mostly removing unused code.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:17:13 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c if_cnmacvar.h octeon_gmx.c
octeon_gmxreg.h octeon_gmxvar.h
Log Message:
Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:17:13 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: if_cnmac.c if_cnmacvar.h octeon_gmx.c
octeon_gmxreg.h octeon_gmxvar.h
Log Message:
Redo cnmac attachments - cnmacM @ gmxN @ pip0 @ iobus
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:15:33 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeonvar.h
src/sys/arch/mips/cavium/dev: octeon_ipd.c octeon_ipdvar.h octeon_pko.c
octeon_pkovar.h octeon_pow.c octeon_powreg.h
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:15:33 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeonvar.h
src/sys/arch/mips/cavium/dev: octeon_ipd.c octeon_ipdvar.h octeon_pko.c
octeon_pkovar.h octeon_pow.c octeon_powreg.h
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:14:39 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Don't include "opt_octeon.h" any more.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:14:18 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c octeon_iobus.c
src/sys/arch/mips/cavium/dev: octeon_asx.c octeon_ciu.c octeon_fau.c
octeon_fauvar.h octeon_fpa.c
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:14:39 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Don't include "opt_octeon.h" any more.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14
Module Name:src
Committed By: simonb
Date: Tue Jun 23 05:14:18 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_cpunode.c octeon_iobus.c
src/sys/arch/mips/cavium/dev: octeon_asx.c octeon_ciu.c octeon_fau.c
octeon_fauvar.h octeon_fpa.c
Module Name:src
Committed By: simonb
Date: Tue Jun 23 03:09:35 UTC 2020
Removed Files:
src/sys/arch/mips/cavium/dev: octeon_usbcvar.h octeon_usbnvar.h
Log Message:
Remove unused include files.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r0
Module Name:src
Committed By: simonb
Date: Tue Jun 23 03:09:35 UTC 2020
Removed Files:
src/sys/arch/mips/cavium/dev: octeon_usbcvar.h octeon_usbnvar.h
Log Message:
Remove unused include files.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r0
Module Name:src
Committed By: simonb
Date: Tue Jun 23 03:08:11 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_usbcreg.h
Log Message:
Remove USB controller register definitions, these match dwc2 core and
weren't used anyway.
To generate a diff of this
Module Name:src
Committed By: simonb
Date: Tue Jun 23 03:07:48 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_dwctwo.c
Log Message:
Remove unused octeon*usb*var*h includes.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12
Module Name:src
Committed By: simonb
Date: Tue Jun 23 03:07:48 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_dwctwo.c
Log Message:
Remove unused octeon*usb*var*h includes.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12
Module Name:src
Committed By: simonb
Date: Tue Jun 23 03:08:11 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_usbcreg.h
Log Message:
Remove USB controller register definitions, these match dwc2 core and
weren't used anyway.
To generate a diff of this
Module Name:src
Committed By: simonb
Date: Mon Jun 22 12:26:11 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_bootbusreg.h octeon_ciureg.h
octeon_fpareg.h octeon_gmxreg.h octeon_pipreg.h octeon_powreg.h
octeon_usbcreg.h
Log Message:
Module Name:src
Committed By: simonb
Date: Mon Jun 22 12:26:11 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_bootbusreg.h octeon_ciureg.h
octeon_fpareg.h octeon_gmxreg.h octeon_pipreg.h octeon_powreg.h
octeon_usbcreg.h
Log Message:
Module Name:src
Committed By: simonb
Date: Mon Jun 22 03:05:07 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_asxreg.h octeon_bootbusreg.h
octeon_ciureg.h octeon_corereg.h octeon_fpareg.h octeon_gmxreg.h
octeon_gpioreg.h
Module Name:src
Committed By: simonb
Date: Mon Jun 22 03:05:07 UTC 2020
Modified Files:
src/sys/arch/mips/cavium/dev: octeon_asxreg.h octeon_bootbusreg.h
octeon_ciureg.h octeon_corereg.h octeon_fpareg.h octeon_gmxreg.h
octeon_gpioreg.h
Module Name:src
Committed By: riastradh
Date: Sat Jun 20 18:48:28 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Nix trailing whitespace.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/cavium/octeon_intr.c
Module Name:src
Committed By: riastradh
Date: Sat Jun 20 18:48:28 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
Log Message:
Nix trailing whitespace.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/cavium/octeon_intr.c
Module Name:src
Committed By: simonb
Date: Fri Jun 19 02:23:43 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
src/sys/arch/mips/cavium/dev: octeon_ciureg.h octeon_dwctwo.c
octeon_gmx.c octeon_ipd.c octeon_mpi.c octeon_pci.c
Module Name:src
Committed By: simonb
Date: Fri Jun 19 02:23:43 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeon_intr.c
src/sys/arch/mips/cavium/dev: octeon_ciureg.h octeon_dwctwo.c
octeon_gmx.c octeon_ipd.c octeon_mpi.c octeon_pci.c
Module Name:src
Committed By: simonb
Date: Thu Jun 18 13:52:08 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeonreg.h octeonvar.h
src/sys/arch/mips/cavium/dev: if_cnmac.c octeon_asxvar.h
octeon_cop2reg.h octeon_cop2var.h octeon_fau.c
Module Name:src
Committed By: simonb
Date: Thu Jun 18 13:52:08 UTC 2020
Modified Files:
src/sys/arch/mips/cavium: octeonreg.h octeonvar.h
src/sys/arch/mips/cavium/dev: if_cnmac.c octeon_asxvar.h
octeon_cop2reg.h octeon_cop2var.h octeon_fau.c
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