Re: [U-Boot] [PATCH v2 2/5] arm: socfpga: Add checking function on FPGA setting in FDT

[Chee, Tien Fong]

On Rab, 2017-08-09 at 10:20 +0200, Marek Vasut wrote:
> On 08/09/2017 07:07 AM, Chee, Tien Fong wrote:
> > 
> > On Sel, 2017-08-08 at 11:29 +0200, Marek Vasut wrote:
> > > 
> > > On 08/08/2017 11:12 AM, tien.fong.c...@intel.com wrote:
> > > > 
> > > > 
> > > > From: Tien Fong Chee 
> > > > 
> > > > Function for checking FPGA early release setting which is
> > > > defined
> > > > by user in FDT chosen section. This function would be used by
> > > > later driver in decision applying appropriate FPGA
> > > > configuration in
> > > > early release or full FPGA booting mode.
> > > Isn't this a property of the FPGA driver ?
This is not property of fpga driver. It acts like passing data flag to
u-boot, so u-boot knows how to boot in the mode defined by user.
> > > Shouldn't this have altr, prefix ?
This node doesn't represet a real device, it acts like a place for
passing data to U-boot. So, this flag name doesn't matter with prefix,
right?
> > > Did this go through DT binding review?
No, refer my explanation above.
> > > 
> > This is our own define under chosen section. This is flag to tell
> > U-
> > boot what kind of boot and what kind of fpga configuration we want
> > during boot.
> And you didn't answer any of the aforementioned questions :(
> 
Sorry, it could be i misunderstand your question. please refer my
asnwer in above.
> > 
> > > 
> > > > 
> > > > 
> > > > Signed-off-by: Tien Fong Chee 
> > > > ---
> > > >  arch/arm/mach-socfpga/include/mach/misc.h |  1 +
> > > >  arch/arm/mach-socfpga/misc_arria10.c  | 20
> > > > 
> > > >  2 files changed, 21 insertions(+)
> > > > 
> > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > index 0b65783..e003f8a 100644
> > > > --- a/arch/arm/mach-socfpga/include/mach/misc.h
> > > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h
> > > > @@ -26,6 +26,7 @@ static inline void socfpga_fpga_add(void) {}
> > > >  unsigned int dedicated_uart_com_port(const void *blob);
> > > >  unsigned int shared_uart_com_port(const void *blob);
> > > >  unsigned int uart_com_port(const void *blob);
> > > > +int is_early_release_fpga_config(const void *blob);
> > > >  #endif
> > > >  
> > > >  #endif /* _MISC_H_ */
> > > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c
> > > > b/arch/arm/mach-
> > > > socfpga/misc_arria10.c
> > > > index 9d751f6..2d6e977 100644
> > > > --- a/arch/arm/mach-socfpga/misc_arria10.c
> > > > +++ b/arch/arm/mach-socfpga/misc_arria10.c
> > > > @@ -235,6 +235,26 @@ unsigned int uart_com_port(const void
> > > > *blob)
> > > >     return shared_uart_com_port(blob);
> > > >  }
> > > >  
> > > > +int is_chosen_boolean_true(const void *blob, const char *name)
> > > > +{
> > > > +   int node;
> > > > +   int rval = 0;
> > > > +
> > > > +   node = fdt_subnode_offset(blob, 0, "chosen");
> > > > +
> > > > +   if (node >= 0)
> > > > +   rval = fdtdec_get_bool(blob, node, name);
> > > > +
> > > > +   return rval;
> > > > +}
> > > > +
> > > > +int is_early_release_fpga_config(const void *blob)
> > > > +{
> > > > +   static const char *name = "early-release-fpga-config";
> > > > +
> > > > +   return is_chosen_boolean_true(blob, name);
> > > > +}
> > > > +
> > > >  /*
> > > >   * Print CPU information
> > > >   */
> > > > 
> 
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Re: [U-Boot] [PATCH v2 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager

[Chee, Tien Fong]

On Rab, 2017-08-09 at 10:29 +0200, Marek Vasut wrote:
> On 08/09/2017 06:50 AM, Chee, Tien Fong wrote:
> [...]
> 
> > 
> > > 
> > > > 
> > > > > 
> > > > > If this is for some FPGA loading, can this functionality be
> > > > > scripted
> > > > > instead?
> > > > > 
> > > > Sorry, i'm not getting you. How functionality be scripted?
> > > > Could
> > > > you
> > > > provide some example or details explanation?
> > > ie. "load" (from fs) + "fpga load" (program FPGA) commands ?
> > > I think the fpga command already has some support for loading
> > > from FS
> > > too.
> > > 
> > Currently, we already have fpga load commands in fpga driver, fpga
> > rbf
> > is loaded to memory, and programmed to fpga from memory, where
> > memory
> > location would be decided by user, it could be OCRAM or SDRAM.
> > 
> > for fpga loadfs command, i plan to implement it after having
> > complete
> > boot to U-boot console, since this is quite complex and involving
> > some
> > hardware workaround issue, and some use case scenarios need to be
> > considerd.
> So the arria10 u-boot port is still unable to boot to console ?
> 
Still need 2 to 3 more patchsets to get it boot to console.
> > 
> > For example reconfiguring fpga with periperal rbf can
> > corrupt the sdram since sdram IOs is part of the fpga periph rbf. I
> > need console to run a lot different scenarios testing.
> OK
> 
> > 
> > We still need cff.c, because most functionality in cff.c are
> > required
> > by fpga loadfs command.
> It seems a lot of stuff from this is common code, so why does it have
> to
> be in this driver again ?
This driver contains a lot "smart" functionality such as:
1: It having ability to the right memory(OCRAM or SDRAM) to achieve the
best FPGA programing performance.
2: It can determine the right size buffer for the fpga rbf without info
of buffer size defined by user.
3: It has ability to know what kind of fpga rbf type, and security
type, such as peripheral, core, combined rbf, encryption and
unencryption based on any fpga file user pass in .
4: It supports the checksum.
5: support raw flash without fs.
6: support the file name defined in DTS and U-boot environment
variable.
>  Also, the ifdeffery is awful and the explicit
> depedence on VFAT when loading from FS is real bad.
> 
It is because a lot functions is common to sdmmc, nand and qspi in
different fs such as vfat, ubi and raw. It is unavoidable to have some
ifdeffery if we want to keep the function common to all flashes and
fs. 

> [...]
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Re: [U-Boot] [RFC] efi_loader: Add test to boot OpenBSD's efi bootloader

[Jonathan Gray]

On Sun, Aug 06, 2017 at 03:06:17PM -0400, Rob Clark wrote:
> On Sun, Aug 6, 2017 at 2:54 PM, Mark Kettenis  wrote:
> >> From: Rob Clark 
> >> Date: Sun,  6 Aug 2017 12:10:28 -0400
> >>
> >> Signed-off-by: Rob Clark 
> >> ---
> >> Kinda works, but since we don't have an 'exit' command like grub, we
> >> have to reboot, which leaves the "board" in a bad state (I guess,
> >> since the next test fails).  I haven't tackled the travis bits to get
> >> travis to download OpenBSD's bootloader, or other little details like
> >> that.
> >
> > What does the grub "exit" command do?  Simply call EFI_BOOT_SERVICE.Exit()?
> > Wouldn't be too difficult for me to add a command that does this.
> 
> Yeah, I think just calls BS->Exit().. that would be quite useful.

Mark committed the change for this and snapshots now have "machine exit"
and "machine poweroff".

https://ftp.openbsd.org/pub/OpenBSD/snapshots/armv7/BOOTARM.EFI
https://ftp.openbsd.org/pub/OpenBSD/snapshots/arm64/BOOTAA64.EFI
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[U-Boot] [PATCH] board: ks2: README: Update NAND wording

[Franklin S Cooper Jr]

Traditional KS2 devices supported NAND via the AEMIF peripheral. However,
66AK2G doesn't use the AEMIF but rather the GPMC for NAND. Therefore,
clarify some statements to indicate only certain devices have AEMIF and
in other places just say NAND instead of AEMIF NAND

Signed-off-by: Franklin S Cooper Jr 
---
 board/ti/ks2_evm/README | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README
index 5430c7d..a26b7f8 100644
--- a/board/ti/ks2_evm/README
+++ b/board/ti/ks2_evm/README
@@ -61,7 +61,7 @@ configs/k2g_evm_defconfig
 
 Supported boot modes:
  - SPI NOR boot
- - AEMIF NAND boot
+ - AEMIF NAND boot (K2E, K2L and K2HK)
  - UART boot
  - MMC boot (Only on K2G)
 
@@ -69,7 +69,7 @@ Supported image formats:
  - u-boot.bin: for loading and running u-boot.bin through
Texas Instruments code composure studio (CCS) and for UART boot.
  - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
- - MLO: gpimage for programming AEMIF NAND flash for NAND boot, MMC boot.
+ - MLO: gpimage for programming NAND flash for NAND boot, MMC boot.
 
 Build instructions:
 ===
-- 
2.9.4.dirty

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Re: [U-Boot] [PATCH 1/5] Kconfig: add option to build with -fshort-wchar

[Tom Rini]

On Wed, Aug 09, 2017 at 07:14:31PM -0400, Rob Clark wrote:

> UEFI expects strings to be UTF-16.  So add an option so that when
> EFI_LOADER is enabled, we can use the expected unicode string size.
> 
> Signed-off-by: Rob Clark 

So, I kludged this to just globally pass -fshort-wchar and I see no size
changes in a world build
(https://gist.github.com/trini/60c4e58c662553ca902b4e878a9a8dc5).  I
feel we should explain why, and enable this along with the stdc-2011
change.

-- 
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Re: [U-Boot] [U-Boot, v0, 07/20] vsprintf.c: add wide string (%ls) support

[rick]

Hi Tom

Yes, Nds32 has a newer toolchain gcc 4.9 available now.

Rick

-Original Message-
From: Tom Rini [mailto:tr...@konsulko.com]
Sent: Wednesday, August 09, 2017 7:27 PM
To: Rob Clark; Rick Jian-Zhi Chen(陳建志)
Cc: Alexander Graf; Heinrich Schuchardt; U-Boot Mailing List; Peter Jones; 
Simon Glass; Sekhar Nori; Bin Meng
Subject: Re: [U-Boot,v0,07/20] vsprintf.c: add wide string (%ls) support

On Tue, Aug 08, 2017 at 08:14:41PM -0400, Rob Clark wrote:
> On Tue, Aug 8, 2017 at 7:55 PM, Alexander Graf  wrote:
> >
> >
> > On 09.08.17 00:39, Rob Clark wrote:
> >>
> >> On Tue, Aug 8, 2017 at 7:08 PM, Heinrich Schuchardt
> >> 
> >> wrote:
> >>>
> >>> On 08/09/2017 12:44 AM, Rob Clark wrote:
> 
>  On Tue, Aug 8, 2017 at 6:03 PM, Heinrich Schuchardt
>  
>  wrote:
> >
> > On 08/04/2017 09:31 PM, Rob Clark wrote:
> >>
> >> This is convenient for efi_loader which deals a lot with utf16.
> >>
> >> Signed-off-by: Rob Clark 
> >
> >
> > Please, put this patch together with [PATCH] vsprintf.c: add
> > GUID printing https://patchwork.ozlabs.org/patch/798362/
> > and
> > [PATCH v0 06/20] common: add some utf16 handling helpers
> > https://patchwork.ozlabs.org/patch/797968/
> > into a separate patch series.
> >
> > These three patches can be reviewed independently of the
> > efi_loader patches and probably will not be integrated via the efi-next 
> > tree.
> 
> 
>  I'll resend these as a separate patchset, and just not in next
>  revision of efi_loader patchset that it is a dependency
> 
> >> ---
> >>   lib/vsprintf.c | 30 --
> >>   1 file changed, 28 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/lib/vsprintf.c b/lib/vsprintf.c index
> >> 874a2951f7..0c40f852ce 100644
> >> --- a/lib/vsprintf.c
> >> +++ b/lib/vsprintf.c
> >> @@ -17,6 +17,7 @@
> >>   #include 
> >>
> >>   #include 
> >> +#include 
> >>
> >>   #include 
> >>   #define noinline __attribute__((noinline)) @@ -270,6 +271,26
> >> @@ static char *string(char *buf, char *end, char *s, int
> >> field_width,
> >>return buf;
> >>   }
> >>
> >> +static char *string16(char *buf, char *end, u16 *s, int field_width,
> >> + int precision, int flags) {
> >> + u16 *str = s ? s : L"";
> >
> > Please, do not use the L-notation here as it requires -fshort-wchar.
> > As we currently cannot switch the complete project to C11 you
> > cannot use the u-notation either.
> 
> 
>  current plan was to either switch whole project to -fshort-wchar or
>  c11 and rework these patches (as well as a few patches in the
>  efi_loader patchset).  (In the c11 case, I'm not sure what we'll use
>  as the fmt string, since afaict that isn't specified.  We could use %S
>  although that seems to be a deprecated way to do %ls, or something
>  different like %A, I guess)..
> 
>  how far are we from c11?  If there is stuff I can do to help let me
>  know.  If feasible, I'd rather do that first rather than have a bunch
>  of stuff in vsprintf and elsewhere that needs to be cleaned up later
>  after the switch.
> >>>
> >>>
> >>> buildman downloads very old compilers (gcc < 4.8) from kernel.org which
> >>> do not support C11.
> >>> Travis CI uses Ubuntu 14.04 with gcc 4.8.4 which incorrectly throws an
> >>> error for disk/part.c in C11 mode.
> >>
> >>
> >> ugg, 4.8 is pretty old..   Not sure how much older than 4.8 buildman
> >> uses.  It seems like *some* c11 was supported w/ >=4.6 so if we
> >> approach the conversion piecemeal (for example skipping code that
> >> triggers gcc bugs on old compilers) we might be able to keep 4.8.4
> >> working until travis provides something newer.
> >>
> >> (btw, even going back say 8 fedora releases or more, I've used distro
> >> packaged arm and aarch64 toolchains exclusively.. are there that many
> >> distro's where we really can't assume availability of an
> >> cross-toolchain?  If there isn't something newer from kernel.org can
> >> we just drop relying on ancient prebuilt toolchains?  I'm anyways not
> >> hugely a fan of downloading binary executables from even kernel.org,
> >> instead of using something from a distro build system which I at least
> >> know is very locked down.)
> >>
> >>> To get things right we would have to
> >>> * build our own cross tool chains based on a current gcc version
> >>> * use our own tool chain in Travis for x86-64 or use a docker
> >>>container with a current gcc version.
> >>>
> >>> In the long run heading for C11 would be the right thing to do.
> >>> Until then use an initializer { '<', 'N', 'U', 'L', 'L', '>' }.
> >>> It looks ugly but does not consume more bytes once compiled.
> >>>
> >>
> >> Sure, that I'm less 

Re: [U-Boot] [PATCH] boot_fit: Change return value from FDT_ERROR to -EINVAL in fdt_offset()

[Franklin S Cooper Jr]

On 08/04/2017 03:47 PM, Nobuhiro Iwamatsu wrote:
> FDT_ERROR is defined as unsigned long. However, since the return value of
> fdt_offset() is int, a warning will occur when compiling. Also, it is better
> to use -EINVAL than FDT_ERROR.
> This fixes this problem by change return value from FDT_ERROR to -EINVAL.
> 
> Signed-off-by: Nobuhiro Iwamatsu 
> CC: Franklin S Cooper Jr 
> ---
>  common/boot_fit.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/common/boot_fit.c b/common/boot_fit.c
> index 51440a6e6f..0a723150b5 100644
> --- a/common/boot_fit.c
> +++ b/common/boot_fit.c
> @@ -25,7 +25,7 @@ int fdt_offset(void *fit)
>   images = fdt_path_offset(fit, FIT_IMAGES_PATH);
>   if (images < 0) {
>   debug("%s: Cannot find /images node: %d\n", __func__, images);
> - return FDT_ERROR;
> + return -EINVAL;
>   }
>  

Reviewed-by: Franklin S Cooper Jr 
>   fdt_name = fdt_getprop(fit, node, FIT_FDT_PROP, _len);
> 
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Re: [U-Boot] [PATCH 0/8] nvme: Add NVM Express driver support

[Tom Rini]

On Thu, Aug 10, 2017 at 09:49:42AM +0800, Bin Meng wrote:
> Hi Tom,
> 
> On Thu, Aug 10, 2017 at 9:31 AM, Tom Rini  wrote:
> > On Thu, Aug 10, 2017 at 06:40:57AM +0800, Bin Meng wrote:
> >> Hi Tom,
> >>
> >> On Thu, Aug 3, 2017 at 5:30 PM, Bin Meng  wrote:
> >> > This series adds NVM Express driver support to U-Boot.
> >> >
> >> > This series is based on previous RFC v2 patchset [1][2] done by
> >> > Zhikang Zhang and Wenbin Song, as well as Jon Nettleton's fixes
> >> > [3] on top of the RFC v1.
> >> >
> >> > The patches are organized in a way that meets the requirement
> >> > of upstream. Jon's fixes were squashed/integrated with a proper
> >> > order in this series.
> >> >
> >> > The original RFC driver was cleaned up a lot, to remove the
> >> > compilation limitation on non-ARMv8 architecture (including a
> >> > header file from armv8), drop the board_r.c modification, drop
> >> > unnecessary PCI configuration space initialization, add 32-bit
> >> > architecture support of readq/writeq operations, eliminate
> >> > compiler warnings, as well as coding convention clean up, plus
> >> > a fix to a bug that is exposed by QEMU platform.
> >> >
> >> > Tested with an Intel SSD 750 series NVMe 400GB card, a Plextor
> >> > NVMe SSD M8Pe Series 256GB card, on Intel Crown Bay board, as
> >> > well as QEMU x86 emulation platform.
> >> >
> >> > This series is available at u-boot-x86/nvme-working for testing.
> >> >
> >> > [1] http://patchwork.ozlabs.org/patch/753088/
> >> > [2] http://patchwork.ozlabs.org/patch/753089/
> >> > [3] http://patchwork.ozlabs.org/patch/794909/
> >> >
> >> >
> >> > Bin Meng (2):
> >> >   nvme: Handle zero Maximum Data Transfer Size (MDTS)
> >> >   x86: qemu: Enable NVMe driver
> >> >
> >> > Jon Nettleton (2):
> >> >   nvme: Detect devices that are class Storage Express
> >> >   nvme: Fix number of blocks detection
> >> >
> >> > Zhikang Zhang (4):
> >> >   dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME
> >> >   nvme: Add NVM Express driver support
> >> >   nvme: Add show routine to print detailed information
> >> >   nvme: Add nvme commands
> >> >
> >> >  cmd/Kconfig|   7 +
> >> >  cmd/Makefile   |   1 +
> >> >  cmd/nvme.c | 197 +++
> >> >  configs/qemu-x86_defconfig |   1 +
> >> >  disk/part.c|   6 +-
> >> >  doc/README.nvme|  86 +
> >> >  drivers/Kconfig|   2 +
> >> >  drivers/Makefile   |   1 +
> >> >  drivers/block/blk-uclass.c |   2 +
> >> >  drivers/nvme/Kconfig   |  12 +
> >> >  drivers/nvme/Makefile  |   7 +
> >> >  drivers/nvme/nvme-uclass.c |  62 
> >> >  drivers/nvme/nvme.c| 860 
> >> > +
> >> >  drivers/nvme/nvme.h| 717 +
> >> >  drivers/nvme/nvme_show.c   | 127 +++
> >> >  include/blk.h  |   1 +
> >> >  include/dm/uclass-id.h |   1 +
> >> >  include/nvme.h |  82 +
> >> >  include/pci_ids.h  |   1 +
> >> >  19 files changed, 2172 insertions(+), 1 deletion(-)
> >> >  create mode 100644 cmd/nvme.c
> >> >  create mode 100644 doc/README.nvme
> >> >  create mode 100644 drivers/nvme/Kconfig
> >> >  create mode 100644 drivers/nvme/Makefile
> >> >  create mode 100644 drivers/nvme/nvme-uclass.c
> >> >  create mode 100644 drivers/nvme/nvme.c
> >> >  create mode 100644 drivers/nvme/nvme.h
> >> >  create mode 100644 drivers/nvme/nvme_show.c
> >> >  create mode 100644 include/nvme.h
> >>
> >> Do you think this NVMe support can be included in 2017.09? If yes (and
> >> no other review comments from the list), I can apply and for you to
> >> pull via the x86 tree.
> >
> > I've reviewed it, and things look good.  I'll pick it up in a day or
> > two.  My question now is, can this also be enabled for sandbox, given
> > that we have PCI there?  Thanks!
> 
> Thanks for the review! I've reassigned the patches to you in the patchwork.
> 
> For the sandbox, I believe you want this driver to be included for
> build testing? I think it can be enabled on sandbox, but I have not
> tried that yet.

Build testing and coverity coverage to start with.  A follow up (that
would require some work in places) would be adding test.py tests of some
sort.

-- 
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Re: [U-Boot] [PATCH 0/8] nvme: Add NVM Express driver support

[Bin Meng]

Hi Tom,

On Thu, Aug 10, 2017 at 9:31 AM, Tom Rini  wrote:
> On Thu, Aug 10, 2017 at 06:40:57AM +0800, Bin Meng wrote:
>> Hi Tom,
>>
>> On Thu, Aug 3, 2017 at 5:30 PM, Bin Meng  wrote:
>> > This series adds NVM Express driver support to U-Boot.
>> >
>> > This series is based on previous RFC v2 patchset [1][2] done by
>> > Zhikang Zhang and Wenbin Song, as well as Jon Nettleton's fixes
>> > [3] on top of the RFC v1.
>> >
>> > The patches are organized in a way that meets the requirement
>> > of upstream. Jon's fixes were squashed/integrated with a proper
>> > order in this series.
>> >
>> > The original RFC driver was cleaned up a lot, to remove the
>> > compilation limitation on non-ARMv8 architecture (including a
>> > header file from armv8), drop the board_r.c modification, drop
>> > unnecessary PCI configuration space initialization, add 32-bit
>> > architecture support of readq/writeq operations, eliminate
>> > compiler warnings, as well as coding convention clean up, plus
>> > a fix to a bug that is exposed by QEMU platform.
>> >
>> > Tested with an Intel SSD 750 series NVMe 400GB card, a Plextor
>> > NVMe SSD M8Pe Series 256GB card, on Intel Crown Bay board, as
>> > well as QEMU x86 emulation platform.
>> >
>> > This series is available at u-boot-x86/nvme-working for testing.
>> >
>> > [1] http://patchwork.ozlabs.org/patch/753088/
>> > [2] http://patchwork.ozlabs.org/patch/753089/
>> > [3] http://patchwork.ozlabs.org/patch/794909/
>> >
>> >
>> > Bin Meng (2):
>> >   nvme: Handle zero Maximum Data Transfer Size (MDTS)
>> >   x86: qemu: Enable NVMe driver
>> >
>> > Jon Nettleton (2):
>> >   nvme: Detect devices that are class Storage Express
>> >   nvme: Fix number of blocks detection
>> >
>> > Zhikang Zhang (4):
>> >   dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME
>> >   nvme: Add NVM Express driver support
>> >   nvme: Add show routine to print detailed information
>> >   nvme: Add nvme commands
>> >
>> >  cmd/Kconfig|   7 +
>> >  cmd/Makefile   |   1 +
>> >  cmd/nvme.c | 197 +++
>> >  configs/qemu-x86_defconfig |   1 +
>> >  disk/part.c|   6 +-
>> >  doc/README.nvme|  86 +
>> >  drivers/Kconfig|   2 +
>> >  drivers/Makefile   |   1 +
>> >  drivers/block/blk-uclass.c |   2 +
>> >  drivers/nvme/Kconfig   |  12 +
>> >  drivers/nvme/Makefile  |   7 +
>> >  drivers/nvme/nvme-uclass.c |  62 
>> >  drivers/nvme/nvme.c| 860 
>> > +
>> >  drivers/nvme/nvme.h| 717 +
>> >  drivers/nvme/nvme_show.c   | 127 +++
>> >  include/blk.h  |   1 +
>> >  include/dm/uclass-id.h |   1 +
>> >  include/nvme.h |  82 +
>> >  include/pci_ids.h  |   1 +
>> >  19 files changed, 2172 insertions(+), 1 deletion(-)
>> >  create mode 100644 cmd/nvme.c
>> >  create mode 100644 doc/README.nvme
>> >  create mode 100644 drivers/nvme/Kconfig
>> >  create mode 100644 drivers/nvme/Makefile
>> >  create mode 100644 drivers/nvme/nvme-uclass.c
>> >  create mode 100644 drivers/nvme/nvme.c
>> >  create mode 100644 drivers/nvme/nvme.h
>> >  create mode 100644 drivers/nvme/nvme_show.c
>> >  create mode 100644 include/nvme.h
>>
>> Do you think this NVMe support can be included in 2017.09? If yes (and
>> no other review comments from the list), I can apply and for you to
>> pull via the x86 tree.
>
> I've reviewed it, and things look good.  I'll pick it up in a day or
> two.  My question now is, can this also be enabled for sandbox, given
> that we have PCI there?  Thanks!

Thanks for the review! I've reassigned the patches to you in the patchwork.

For the sandbox, I believe you want this driver to be included for
build testing? I think it can be enabled on sandbox, but I have not
tried that yet.

Regards,
Bin
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Re: [U-Boot] [PATCH] scripts: setlocalversion: safely extract variables from auto.conf using awk

[Tom Rini]

On Tue, Aug 08, 2017 at 03:37:03PM +0200, Philipp Tomsich wrote:

> Moving SPL_LDSCRIPT to Kconfig triggered an unfortunate attempt of
> command substitution, as the sourced auto.conf may include $(ARCH)
> which tries to execute a command 'ARCH'.
> This showed up as a warning similar to the following:
>   include/config/auto.conf: line 209: ARCH: command not found
> 
> This change does no longer attempt to source auto.conf, but rather
> passes it through awk to retrieve the values for CONFIG_LOCALVERSION
> and CONFIG_LOCALVERSION_AUTO.  This will also mitigate the risk of
> unintended command substitution.
> 
> Signed-off-by: Philipp Tomsich 
> Reported-by: Andy Yan 
> 

Reviewed-by: Tom Rini 

I do wonder if we can get this into the kernel as well.

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Re: [U-Boot] [PATCH 7/8] nvme: Handle zero Maximum Data Transfer Size (MDTS)

[Tom Rini]

On Thu, Aug 03, 2017 at 02:31:02AM -0700, Bin Meng wrote:

> Maximum Data Transfer Size (MDTS) field indicates the maximum
> data transfer size between the host and the controller. The
> host should not submit a command that exceeds this transfer
> size. The value is in units of the minimum memory page size
> and is reported as a power of two (2^n).
> 
> The spec also says: a value of 0h indicates no restrictions
> on transfer size. On the real NVMe card this is normally not
> 0 due to hardware restrictions, but with QEMU emulated NVMe
> device it reports as 0. In nvme_blk_read/write() below we
> have the following algorithm for maximum number of logic
> blocks per transfer:
> 
> u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);
> 
> dev->max_transfer_shift being 0 will for sure cause lbas to
> overflow. Let's use 20. With this fix, the NVMe driver works
> on QEMU emulated NVMe device.
> 
> Signed-off-by: Bin Meng 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH v0 00/20] enough UEFI for standard distro boot

[Tom Rini]

On Fri, Aug 04, 2017 at 03:31:42PM -0400, Rob Clark wrote:

> This patchset fleshes out EFI_LOADER enough to support booting an
> upstream \EFI\BOOT\bootaa64.efi (which then loads fallback.efi and
> then eventually the per-distro shim.efi which loads the per-distro
> grubaa64.efi) without resorting to hacks to hard-code u-boot to load
> a particular distro's grub, or other hacks like setting up the
> distro installation as live-media.
> 
> The first seven patches add dependencies that will be needed later
> in the series.  Patches 8-15 make u-boot work with upstream grub,
> without relying on distro patches.  Patches 16-19 add missing bits
> of the UEFI implementation needed to support shim/fallback.  And
> finally patch 20 adds bootmanager support to avoid shim/fallback
> after first boot.

In concept, I am in agreement with the goals of this patch series.  In
specifics, I'm going to skim around v0 and see if there's anything in
particular that I feel I need to jump in and comment on at this point.
Thanks for working on this!

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Re: [U-Boot] [PATCH 6/8] nvme: Fix number of blocks detection

[Tom Rini]

On Thu, Aug 03, 2017 at 02:31:01AM -0700, Bin Meng wrote:

> From: Jon Nettleton 
> 
> NVMe should use the nsze value from the queried device. This will
> reflect the total number of blocks of the device and fix detecting
> my Samsung 960 EVO 256GB.
> 
> Original:
> Capacity: 40386.6 MB = 39.4 GB (82711872 x 512)
> 
> Fixed:
> Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)
> 
> Signed-off-by: Jon Nettleton 
> Reviewed-by: Bin Meng 
> Tested-by: Bin Meng 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 0/8] nvme: Add NVM Express driver support

[Tom Rini]

On Thu, Aug 10, 2017 at 06:40:57AM +0800, Bin Meng wrote:
> Hi Tom,
> 
> On Thu, Aug 3, 2017 at 5:30 PM, Bin Meng  wrote:
> > This series adds NVM Express driver support to U-Boot.
> >
> > This series is based on previous RFC v2 patchset [1][2] done by
> > Zhikang Zhang and Wenbin Song, as well as Jon Nettleton's fixes
> > [3] on top of the RFC v1.
> >
> > The patches are organized in a way that meets the requirement
> > of upstream. Jon's fixes were squashed/integrated with a proper
> > order in this series.
> >
> > The original RFC driver was cleaned up a lot, to remove the
> > compilation limitation on non-ARMv8 architecture (including a
> > header file from armv8), drop the board_r.c modification, drop
> > unnecessary PCI configuration space initialization, add 32-bit
> > architecture support of readq/writeq operations, eliminate
> > compiler warnings, as well as coding convention clean up, plus
> > a fix to a bug that is exposed by QEMU platform.
> >
> > Tested with an Intel SSD 750 series NVMe 400GB card, a Plextor
> > NVMe SSD M8Pe Series 256GB card, on Intel Crown Bay board, as
> > well as QEMU x86 emulation platform.
> >
> > This series is available at u-boot-x86/nvme-working for testing.
> >
> > [1] http://patchwork.ozlabs.org/patch/753088/
> > [2] http://patchwork.ozlabs.org/patch/753089/
> > [3] http://patchwork.ozlabs.org/patch/794909/
> >
> >
> > Bin Meng (2):
> >   nvme: Handle zero Maximum Data Transfer Size (MDTS)
> >   x86: qemu: Enable NVMe driver
> >
> > Jon Nettleton (2):
> >   nvme: Detect devices that are class Storage Express
> >   nvme: Fix number of blocks detection
> >
> > Zhikang Zhang (4):
> >   dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME
> >   nvme: Add NVM Express driver support
> >   nvme: Add show routine to print detailed information
> >   nvme: Add nvme commands
> >
> >  cmd/Kconfig|   7 +
> >  cmd/Makefile   |   1 +
> >  cmd/nvme.c | 197 +++
> >  configs/qemu-x86_defconfig |   1 +
> >  disk/part.c|   6 +-
> >  doc/README.nvme|  86 +
> >  drivers/Kconfig|   2 +
> >  drivers/Makefile   |   1 +
> >  drivers/block/blk-uclass.c |   2 +
> >  drivers/nvme/Kconfig   |  12 +
> >  drivers/nvme/Makefile  |   7 +
> >  drivers/nvme/nvme-uclass.c |  62 
> >  drivers/nvme/nvme.c| 860 
> > +
> >  drivers/nvme/nvme.h| 717 +
> >  drivers/nvme/nvme_show.c   | 127 +++
> >  include/blk.h  |   1 +
> >  include/dm/uclass-id.h |   1 +
> >  include/nvme.h |  82 +
> >  include/pci_ids.h  |   1 +
> >  19 files changed, 2172 insertions(+), 1 deletion(-)
> >  create mode 100644 cmd/nvme.c
> >  create mode 100644 doc/README.nvme
> >  create mode 100644 drivers/nvme/Kconfig
> >  create mode 100644 drivers/nvme/Makefile
> >  create mode 100644 drivers/nvme/nvme-uclass.c
> >  create mode 100644 drivers/nvme/nvme.c
> >  create mode 100644 drivers/nvme/nvme.h
> >  create mode 100644 drivers/nvme/nvme_show.c
> >  create mode 100644 include/nvme.h
> 
> Do you think this NVMe support can be included in 2017.09? If yes (and
> no other review comments from the list), I can apply and for you to
> pull via the x86 tree.

I've reviewed it, and things look good.  I'll pick it up in a day or
two.  My question now is, can this also be enabled for sandbox, given
that we have PCI there?  Thanks!

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Re: [U-Boot] [PATCH 5/8] nvme: Detect devices that are class Storage Express

[Tom Rini]

On Thu, Aug 03, 2017 at 02:31:00AM -0700, Bin Meng wrote:

> From: Jon Nettleton 
> 
> This adds support to detect the catchall PCI class for NVMe devices.
> It allows the drivers to work with most NVMe devices that don't need
> specific detection due to quirks etc.
> 
> Tested against a Samsung 960 EVO drive.
> 
> Signed-off-by: Jon Nettleton 
> Signed-off-by: Bin Meng 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 8/8] x86: qemu: Enable NVMe driver

[Tom Rini]

On Thu, Aug 03, 2017 at 02:31:03AM -0700, Bin Meng wrote:

> QEMU supports NVMe emulation. Enable the NVMe driver on QEMU x86.
> 
> Signed-off-by: Bin Meng 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 3/8] nvme: Add show routine to print detailed information

[Tom Rini]

On Thu, Aug 03, 2017 at 02:30:58AM -0700, Bin Meng wrote:

> From: Zhikang Zhang 
> 
> This adds nvme_print_info() to show detailed NVMe controller and
> namespace information.
> 
> Signed-off-by: Zhikang Zhang 
> Signed-off-by: Wenbin Song 
> Signed-off-by: Bin Meng 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 2/8] nvme: Add NVM Express driver support

[Tom Rini]

On Thu, Aug 03, 2017 at 02:30:57AM -0700, Bin Meng wrote:

> From: Zhikang Zhang 
> 
> NVM Express (NVMe) is a register level interface that allows host
> software to communicate with a non-volatile memory subsystem. This
> interface is optimized for enterprise and client solid state drives,
> typically attached to the PCI express interface.
> 
> This adds a U-Boot driver support of devices that follow the NVMe
> standard [1] and supports basic read/write operations.
> 
> Tested with a 400GB Intel SSD 750 series NVMe card with controller
> id 8086:0953.
> 
> [1] http://www.nvmexpress.org/resources/specifications/
> 
> Signed-off-by: Zhikang Zhang 
> Signed-off-by: Wenbin Song 
> Signed-off-by: Bin Meng 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 4/8] nvme: Add nvme commands

[Tom Rini]

On Thu, Aug 03, 2017 at 02:30:59AM -0700, Bin Meng wrote:

> From: Zhikang Zhang 
> 
> Add nvme commands in U-Boot command line.
> 
> 1. "nvme scan" - scan NVMe blk devices
> 2. "nvme list" - show all available NVMe blk devices
> 3. "nvme info" - show current or a specific NVMe blk device
> 4. "nvme device" - show or set current device
> 5. "nvme part" - print partition table
> 6. "nvme read" - read data from NVMe blk device
> 7. "nvme write" - write data to NVMe blk device
> 
> Signed-off-by: Zhikang Zhang 
> Signed-off-by: Wenbin Song 
> Signed-off-by: Bin Meng 
> 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 1/8] dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME

[Tom Rini]

On Thu, Aug 03, 2017 at 02:30:56AM -0700, Bin Meng wrote:

> From: Zhikang Zhang 
> 
> This adds a new uclass id and block interface type for NVMe.
> 
> Signed-off-by: Zhikang Zhang 
> Signed-off-by: Wenbin Song 
> Signed-off-by: Bin Meng 
> Signed-off-by: Jon Nettleton 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH 1/1] stm32f1: remove stm32f1 support

[Tom Rini]

On Wed, Aug 09, 2017 at 03:13:02PM +0200, patrice.chot...@st.com wrote:

> From: Patrice Chotard 
> 
> A few years ago STM32F1 SoCs support has been added :
> 0144caf22ce6acd5c  gpio: stm32: add stm32f1 support
> 2d18ef2364fd3561a  ARMv7M: add STM32F1 support
> 
> But neither STM32F1 dedicated defconfig nor board was
> associated to these commits.
> 
> Got confirmation from Tom Rini and Matt Porter to remove
> all this code [1]
> 
> [1] http://u-boot.10912.n7.nabble.com/Remove-STM32F1-support-td301603.html
> 
> Signed-off-by: Patrice Chotard 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH v2 5/5] spl: fit: Add booting OS first

[Tom Rini]

On Mon, Aug 07, 2017 at 04:16:26PM -0700, York Sun wrote:

> If CONFIG_SPL_OS_BOOT is enabled, boot OS if kernel image is found
> in FIT structure.
> 
> Signed-off-by: York Sun 
> 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH v2 3/5] spl: fit: Eanble GZIP support for image decompression

[Tom Rini]

On Mon, Aug 07, 2017 at 04:16:24PM -0700, York Sun wrote:

> Add Kconfig option SPL_GZIP and SPL_ZLIB to enable gunzip support for
> SPL boot, eg. falcon boot compressed kernel image.
> 
> Signed-off-by: York Sun 
> 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH v2 2/5] cmd: spl: Fix compiling warning

[Tom Rini]

On Mon, Aug 07, 2017 at 04:16:23PM -0700, York Sun wrote:

> Fix warning "cast from pointer to integer of different size".
> 
> Signed-off-by: York Sun 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [PATCH v2 4/5] spl: fit: Support both external and embedded data

[Tom Rini]

On Mon, Aug 07, 2017 at 04:16:25PM -0700, York Sun wrote:

> SPL supports U-Boot image in FIT format which has data outside of
> FIT structure. This adds support for embedded data for normal FIT
> images.
> 
> Signed-off-by: York Sun 
> 

Reviewed-by: Tom Rini 

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Re: [U-Boot] [RFC] Kconfig: Migrate SYS_NAND_ECC... et al question

[Tom Rini]

On Mon, Aug 07, 2017 at 11:07:58PM -0500, Adam Ford wrote:

> I am trying to migrate ECC Scheme, SYS_NAND_ECCBYTES,
> SYS_NAND_ECCSIZE, and SYS_NAND_ECCSIZE to Kconfig with the changes
> I am attaching.
> 
> I my ideal scenario, the selection of scheme would set
> CONFIG_NAND_OMAP_ECCSCHEME to whatever menu option is defined, then
> corresponding default values of CONFIG_SYS_NAND_ECCSIZE and
> CONFIG_SYS_NAND_ECCBYTES, but I can't figure out how to make that
> work.
> 
> When I run the migration tool, all the omap2plus boards fail.
> 
> If anyone has any suggestions, I'm open to ideas.  I have been
> testing this on the Logic PD DM3730 Kit.

I think what you need to do is leave all of the values out of Kconfig
when running the migration tool, so that every board sets a value into
their defconfig.  Then you can start adding in logic inside of Kconfig
for defaults.

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[U-Boot] [PATCH 5/5] examples: add fallback memcpy

[Rob Clark]

Solves build issue:

  Building current source for 134 boards (12 threads, 1 job per thread)
 arm:  +   lsxhl
  +examples/api/vsprintf.o: In function `string16':
  +lib/vsprintf.c:278: undefined reference to `memcpy'
  +examples/api/uuid.o: In function `uuid_bin_to_str':
  +lib/uuid.c:197: undefined reference to `memcpy'
  +lib/uuid.c:199: undefined reference to `memcpy'
  +make[3]: *** [examples/api/demo] Error 1
  +make[2]: *** [examples/api] Error 2
  +make[1]: *** [examples] Error 2
  +make: *** [sub-make] Error 2
13301 /134sheevaplug

Signed-off-by: Rob Clark 
---
 examples/api/glue.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/examples/api/glue.c b/examples/api/glue.c
index 8aabf32c89..575c1e55f3 100644
--- a/examples/api/glue.c
+++ b/examples/api/glue.c
@@ -416,3 +416,15 @@ void ub_display_clear(void)
 {
syscall(API_DISPLAY_CLEAR, NULL);
 }
+
+__weak void *memcpy(void *dest, const void *src, size_t size)
+{
+   unsigned char *dptr = dest;
+   const unsigned char *ptr = src;
+   const unsigned char *end = src + size;
+
+   while (ptr < end)
+   *dptr++ = *ptr++;
+
+   return dest;
+}
-- 
2.13.0

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[U-Boot] [PATCH 4/5] vsprintf.c: add GUID printing

[Rob Clark]

This works (roughly) the same way as linux's, but we currently always
print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
mostly just because that is what uuid_bin_to_str() supports.

  %pUb:   01020304-0506-0708-090a-0b0c0d0e0f10
  %pUl:   04030201-0605-0807-090a-0b0c0d0e0f10

It will be used by a later efi_loader paths for efi variables and for
device-path-to-text protocol, and also quite useful for debug prints
of protocol GUIDs.

Signed-off-by: Rob Clark 
---
 examples/api/Makefile  |  1 +
 include/config_fallbacks.h |  1 +
 lib/vsprintf.c | 46 --
 3 files changed, 46 insertions(+), 2 deletions(-)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index 87c15d0f68..899527267d 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -35,6 +35,7 @@ EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
 EXT_COBJ-y += lib/charset.o
+EXT_COBJ-$(CONFIG_LIB_UUID) += lib/uuid.o
 EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
 ifeq ($(ARCH),arm)
 EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 961a83d758..56b9de09f2 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -57,6 +57,7 @@
 
 #if (CONFIG_IS_ENABLED(PARTITION_UUIDS) || \
CONFIG_IS_ENABLED(EFI_PARTITION) || \
+   CONFIG_IS_ENABLED(EFI_LOADER) || \
defined(CONFIG_RANDOM_UUID) || \
defined(CONFIG_CMD_UUID) || \
defined(CONFIG_BOOTP_PXE)) && \
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 0678b49b01..71a995dee0 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -18,6 +18,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 #define noinline __attribute__((noinline))
@@ -366,6 +367,40 @@ static char *ip4_addr_string(char *buf, char *end, u8 
*addr, int field_width,
 }
 #endif
 
+#ifdef CONFIG_LIB_UUID
+/*
+ * This works (roughly) the same way as linux's, but we currently always
+ * print lower-case (ie. we just keep %pUB and %pUL for compat with linux),
+ * mostly just because that is what uuid_bin_to_str() supports.
+ *
+ *   %pUb:   01020304-0506-0708-090a-0b0c0d0e0f10
+ *   %pUl:   04030201-0605-0807-090a-0b0c0d0e0f10
+ */
+static char *uuid_string(char *buf, char *end, u8 *addr, int field_width,
+int precision, int flags, const char *fmt)
+{
+   char uuid[UUID_STR_LEN + 1];
+   int str_format = UUID_STR_FORMAT_STD;
+
+   switch (*(++fmt)) {
+   case 'L':
+   case 'l':
+   str_format = UUID_STR_FORMAT_GUID;
+   break;
+   case 'B':
+   case 'b':
+   /* this is the default */
+   break;
+   default:
+   break;
+   }
+
+   uuid_bin_to_str(addr, uuid, str_format);
+
+   return string(buf, end, uuid, field_width, precision, flags);
+}
+#endif
+
 /*
  * Show a '%p' thing.  A kernel extension is that the '%p' is followed
  * by an extra set of alphanumeric characters that are extended format
@@ -399,8 +434,8 @@ static char *pointer(const char *fmt, char *buf, char *end, 
void *ptr,
  flags);
 #endif
 
-#ifdef CONFIG_CMD_NET
switch (*fmt) {
+#ifdef CONFIG_CMD_NET
case 'a':
flags |= SPECIAL | ZEROPAD;
 
@@ -430,8 +465,15 @@ static char *pointer(const char *fmt, char *buf, char 
*end, void *ptr,
   precision, flags);
flags &= ~SPECIAL;
break;
-   }
 #endif
+#ifdef CONFIG_LIB_UUID
+   case 'U':
+   return uuid_string(buf, end, ptr, field_width, precision,
+  flags, fmt);
+#endif
+   default:
+   break;
+   }
flags |= SMALL;
if (field_width == -1) {
field_width = 2*sizeof(void *);
-- 
2.13.0

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[U-Boot] [PATCH 2/5] lib: add some utf16 handling helpers

[Rob Clark]

We'll eventually want these in a few places in efi_loader, and also
vsprintf.

Signed-off-by: Rob Clark 
---
 include/charset.h| 55 ++
 lib/Makefile |  1 +
 lib/charset.c| 81 
 lib/efi_loader/efi_console.c | 17 ++
 4 files changed, 140 insertions(+), 14 deletions(-)
 create mode 100644 include/charset.h
 create mode 100644 lib/charset.c

diff --git a/include/charset.h b/include/charset.h
new file mode 100644
index 00..47ff6c7af1
--- /dev/null
+++ b/include/charset.h
@@ -0,0 +1,55 @@
+/*
+ *  charset conversion utils
+ *
+ *  Copyright (c) 2017 Rob Clark
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CHARSET_H_
+#define __CHARSET_H_
+
+#define MAX_UTF8_PER_UTF16 4
+
+/**
+ * utf16_strlen() - Get the length of an utf16 string
+ *
+ * Returns the number of 16 bit characters in an utf16 string, not
+ * including the terminating NULL character.
+ *
+ * @in the string to measure
+ * @return the string length
+ */
+size_t utf16_strlen(uint16_t *in);
+
+/**
+ * utf16_strnlen() - Get the length of a fixed-size utf16 string.
+ *
+ * Returns the number of 16 bit characters in an utf16 string,
+ * not including the terminating NULL character, but at most
+ * 'count' number of characters.  In doing this, utf16_strnlen()
+ * looks at only the first 'count' characters.
+ *
+ * @in the string to measure
+ * @count  the maximum number of characters to count
+ * @return the string length, up to a maximum of 'count'
+ */
+size_t utf16_strnlen(const uint16_t *in, size_t count);
+
+/**
+ * utf16_to_utf8() - Convert an utf16 string to utf8
+ *
+ * Converts 'size' characters of the utf16 string 'src' to utf8
+ * written to the 'dest' buffer.
+ *
+ * NOTE that a single utf16 character can generate up to 4 utf8
+ * characters.  See MAX_UTF8_PER_UTF16.
+ *
+ * @dest   the destination buffer to write the utf8 characters
+ * @srcthe source utf16 string
+ * @size   the number of utf16 characters to convert
+ * @return the pointer to the first unwritten byte in 'dest'
+ */
+uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size);
+
+#endif /* __CHARSET_H_ */
diff --git a/lib/Makefile b/lib/Makefile
index eacc7d6485..b88b6ebd53 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_OF_LIVE) += of_live.o
 obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 
 obj-$(CONFIG_AES) += aes.o
+obj-y += charset.o
 obj-$(CONFIG_USB_TTY) += circbuf.o
 obj-y += crc7.o
 obj-y += crc8.o
diff --git a/lib/charset.c b/lib/charset.c
new file mode 100644
index 00..eaff2e542e
--- /dev/null
+++ b/lib/charset.c
@@ -0,0 +1,81 @@
+/*
+ *  charset conversion utils
+ *
+ *  Copyright (c) 2017 Rob Clark
+ *
+ *  SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+
+/*
+ * utf8/utf16 conversion mostly lifted from grub
+ */
+
+size_t utf16_strlen(uint16_t *in)
+{
+   size_t i;
+   for (i = 0; in[i]; i++);
+   return i;
+}
+
+size_t utf16_strnlen(const uint16_t *in, size_t count)
+{
+   size_t i;
+   for (i = 0; count-- && in[i]; i++);
+   return i;
+}
+
+/* Convert UTF-16 to UTF-8.  */
+uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size)
+{
+   uint32_t code_high = 0;
+
+   while (size--) {
+   uint32_t code = *src++;
+
+   if (code_high) {
+   if (code >= 0xDC00 && code <= 0xDFFF) {
+   /* Surrogate pair.  */
+   code = ((code_high - 0xD800) << 10) + (code - 
0xDC00) + 0x1;
+
+   *dest++ = (code >> 18) | 0xF0;
+   *dest++ = ((code >> 12) & 0x3F) | 0x80;
+   *dest++ = ((code >> 6) & 0x3F) | 0x80;
+   *dest++ = (code & 0x3F) | 0x80;
+   } else {
+   /* Error...  */
+   *dest++ = '?';
+   /* *src may be valid. Don't eat it.  */
+   src--;
+   }
+
+   code_high = 0;
+   } else {
+   if (code <= 0x007F) {
+   *dest++ = code;
+   } else if (code <= 0x07FF) {
+   *dest++ = (code >> 6) | 0xC0;
+   *dest++ = (code & 0x3F) | 0x80;
+   } else if (code >= 0xD800 && code <= 0xDBFF) {
+   code_high = code;
+   continue;
+   } else if (code >= 0xDC00 && code <= 0xDFFF) {
+   /* Error... */
+   *dest++ = '?';
+   } else if (code < 0x1) {
+   *dest++ = (code >> 12) | 0xE0;
+ 

[U-Boot] [PATCH 3/5] vsprintf.c: add UTF-16 string (%ls) support

[Rob Clark]

This is convenient for efi_loader which deals a lot with UTF-16.  Only
enabled with CC_SHORT_WCHAR, leaving room to add a UTF-32 version when
CC_SHORT_WCHAR is not enabled.

Signed-off-by: Rob Clark 
---
 examples/api/Makefile |  1 +
 lib/vsprintf.c| 31 +--
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/examples/api/Makefile b/examples/api/Makefile
index dab6398bab..87c15d0f68 100644
--- a/examples/api/Makefile
+++ b/examples/api/Makefile
@@ -34,6 +34,7 @@ EXT_COBJ-y += lib/div64.o
 EXT_COBJ-y += lib/string.o
 EXT_COBJ-y += lib/time.o
 EXT_COBJ-y += lib/vsprintf.o
+EXT_COBJ-y += lib/charset.o
 EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o
 ifeq ($(ARCH),arm)
 EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 874a2951f7..0678b49b01 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -17,6 +17,7 @@
 #include 
 
 #include 
+#include 
 
 #include 
 #define noinline __attribute__((noinline))
@@ -270,6 +271,26 @@ static char *string(char *buf, char *end, char *s, int 
field_width,
return buf;
 }
 
+static char *string16(char *buf, char *end, u16 *s, int field_width,
+   int precision, int flags)
+{
+   u16 *str = s ? s : (u16[]){'<','N','U','L','L','>','\0'};
+   int utf16_len = utf16_strnlen(str, precision);
+   u8 utf8[utf16_len * MAX_UTF8_PER_UTF16];
+   int utf8_len, i;
+
+   utf8_len = utf16_to_utf8(utf8, str, utf16_len) - utf8;
+
+   if (!(flags & LEFT))
+   while (utf8_len < field_width--)
+   ADDCH(buf, ' ');
+   for (i = 0; i < utf8_len; ++i)
+   ADDCH(buf, utf8[i]);
+   while (utf8_len < field_width--)
+   ADDCH(buf, ' ');
+   return buf;
+}
+
 #ifdef CONFIG_CMD_NET
 static const char hex_asc[] = "0123456789abcdef";
 #define hex_asc_lo(x)  hex_asc[((x) & 0x0f)]
@@ -528,8 +549,14 @@ repeat:
continue;
 
case 's':
-   str = string(str, end, va_arg(args, char *),
-field_width, precision, flags);
+   if (CONFIG_IS_ENABLED(CC_SHORT_WCHAR) &&
+   qualifier == 'l') {
+   str = string16(str, end, va_arg(args, u16 *),
+  field_width, precision, flags);
+   } else {
+   str = string(str, end, va_arg(args, char *),
+field_width, precision, flags);
+   }
continue;
 
case 'p':
-- 
2.13.0

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[U-Boot] [PATCH 1/5] Kconfig: add option to build with -fshort-wchar

[Rob Clark]

UEFI expects strings to be UTF-16.  So add an option so that when
EFI_LOADER is enabled, we can use the expected unicode string size.

Signed-off-by: Rob Clark 
---
 Kconfig| 8 
 Makefile   | 4 
 lib/efi_loader/Kconfig | 1 +
 3 files changed, 13 insertions(+)

diff --git a/Kconfig b/Kconfig
index c1451bceda..7319f1fa94 100644
--- a/Kconfig
+++ b/Kconfig
@@ -53,6 +53,14 @@ config CC_OPTIMIZE_FOR_SIZE
 
  This option is enabled by default for U-Boot.
 
+config CC_SHORT_WCHAR
+   bool "Use 16b wchar"
+   default n
+   help
+ Enabling this option will pass "-fshort-wchar" to gcc, for
+ 16bit unicode strings.  This is used by EFI_LOADER, as the
+ UEFI spec defines strings to be UTF-16.
+
 config DISTRO_DEFAULTS
bool "Select defaults suitable for booting general purpose Linux 
distributions"
default y if ARCH_SUNXI || TEGRA
diff --git a/Makefile b/Makefile
index 50a002e72f..91b11f5a7b 100644
--- a/Makefile
+++ b/Makefile
@@ -590,6 +590,10 @@ else
 KBUILD_CFLAGS  += -O2
 endif
 
+ifdef CONFIG_CC_SHORT_WCHAR
+KBUILD_CFLAGS  += -fshort-wchar
+endif
+
 KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
 KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
 
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index d2b6327119..e28ef51ad4 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -1,6 +1,7 @@
 config EFI_LOADER
bool "Support running EFI Applications in U-Boot"
depends on (ARM || X86) && OF_LIBFDT
+   select CC_SHORT_WCHAR
default y
help
  Select this option if you want to run EFI applications (like grub2)
-- 
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[U-Boot] [PATCH 0/5] vsprintf and short-wchar for EFI_LOADER

[Rob Clark]

As requested, I've split this out of the larger EFI_LOADER patchset.

This adds two things that the later EFI_LOADER patchset depends on:

1) UUID/GUID support
2) %ls UTF string support, in particular UTF-16.  In the UEFI API,
   all strings are UTF-16

I had started converting this over to using c11 + u"string" literals,
instead of using -fshort-wchar + L"string" literals and %ls, but I
ran into two problems:

1) we lose out on the printf (and friends) va_arg type checking if we
   roll our own custom printf fmt modifier for UTF-16 strings
2) and worse than that, we have to disable -Wformat warnings

So given that we have a significant downside for not just using
-fshort-wchar, and I don't think any really strong argument against,
I am back to thinking that we should just go with -fshort-wchar.

The current patchset has a Kconfig option to opt-in to -fshort-wchar,
which EFI_LOADER selects.  If the consensus is to enable -fshort-wchar
for everything, I'll drop the kconfig part and make it unconditional.

The current version of this patchset and efi-loader patchset are at

  https://github.com/robclark/u-boot.git  vsprintf

and

  https://github.com/robclark/u-boot.git enough-uefi-for-shim-2

I'll resend the enought-uefi-for-shim-2 patchset after I have a
chance to figure out fs-test.sh and add tests for fs_readdir().

Rob Clark (5):
  Kconfig: add option to build with -fshort-wchar
  lib: add some utf16 handling helpers
  vsprintf.c: add UTF-16 string (%ls) support
  vsprintf.c: add GUID printing
  examples: add fallback memcpy

 Kconfig  |  8 +
 Makefile |  4 +++
 examples/api/Makefile|  2 ++
 examples/api/glue.c  | 12 +++
 include/charset.h| 55 ++
 include/config_fallbacks.h   |  1 +
 lib/Makefile |  1 +
 lib/charset.c| 81 
 lib/efi_loader/Kconfig   |  1 +
 lib/efi_loader/efi_console.c | 17 ++
 lib/vsprintf.c   | 77 ++---
 11 files changed, 241 insertions(+), 18 deletions(-)
 create mode 100644 include/charset.h
 create mode 100644 lib/charset.c

-- 
2.13.0

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Re: [U-Boot] [PATCH 0/8] nvme: Add NVM Express driver support

[Bin Meng]

Hi Tom,

On Thu, Aug 3, 2017 at 5:30 PM, Bin Meng  wrote:
> This series adds NVM Express driver support to U-Boot.
>
> This series is based on previous RFC v2 patchset [1][2] done by
> Zhikang Zhang and Wenbin Song, as well as Jon Nettleton's fixes
> [3] on top of the RFC v1.
>
> The patches are organized in a way that meets the requirement
> of upstream. Jon's fixes were squashed/integrated with a proper
> order in this series.
>
> The original RFC driver was cleaned up a lot, to remove the
> compilation limitation on non-ARMv8 architecture (including a
> header file from armv8), drop the board_r.c modification, drop
> unnecessary PCI configuration space initialization, add 32-bit
> architecture support of readq/writeq operations, eliminate
> compiler warnings, as well as coding convention clean up, plus
> a fix to a bug that is exposed by QEMU platform.
>
> Tested with an Intel SSD 750 series NVMe 400GB card, a Plextor
> NVMe SSD M8Pe Series 256GB card, on Intel Crown Bay board, as
> well as QEMU x86 emulation platform.
>
> This series is available at u-boot-x86/nvme-working for testing.
>
> [1] http://patchwork.ozlabs.org/patch/753088/
> [2] http://patchwork.ozlabs.org/patch/753089/
> [3] http://patchwork.ozlabs.org/patch/794909/
>
>
> Bin Meng (2):
>   nvme: Handle zero Maximum Data Transfer Size (MDTS)
>   x86: qemu: Enable NVMe driver
>
> Jon Nettleton (2):
>   nvme: Detect devices that are class Storage Express
>   nvme: Fix number of blocks detection
>
> Zhikang Zhang (4):
>   dm: blk: part: Add UCLASS_NVME and IF_TYPE_NVME
>   nvme: Add NVM Express driver support
>   nvme: Add show routine to print detailed information
>   nvme: Add nvme commands
>
>  cmd/Kconfig|   7 +
>  cmd/Makefile   |   1 +
>  cmd/nvme.c | 197 +++
>  configs/qemu-x86_defconfig |   1 +
>  disk/part.c|   6 +-
>  doc/README.nvme|  86 +
>  drivers/Kconfig|   2 +
>  drivers/Makefile   |   1 +
>  drivers/block/blk-uclass.c |   2 +
>  drivers/nvme/Kconfig   |  12 +
>  drivers/nvme/Makefile  |   7 +
>  drivers/nvme/nvme-uclass.c |  62 
>  drivers/nvme/nvme.c| 860 
> +
>  drivers/nvme/nvme.h| 717 +
>  drivers/nvme/nvme_show.c   | 127 +++
>  include/blk.h  |   1 +
>  include/dm/uclass-id.h |   1 +
>  include/nvme.h |  82 +
>  include/pci_ids.h  |   1 +
>  19 files changed, 2172 insertions(+), 1 deletion(-)
>  create mode 100644 cmd/nvme.c
>  create mode 100644 doc/README.nvme
>  create mode 100644 drivers/nvme/Kconfig
>  create mode 100644 drivers/nvme/Makefile
>  create mode 100644 drivers/nvme/nvme-uclass.c
>  create mode 100644 drivers/nvme/nvme.c
>  create mode 100644 drivers/nvme/nvme.h
>  create mode 100644 drivers/nvme/nvme_show.c
>  create mode 100644 include/nvme.h
>

Do you think this NVMe support can be included in 2017.09? If yes (and
no other review comments from the list), I can apply and for you to
pull via the x86 tree.

Regards,
Bin
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Re: [U-Boot] [U-Boot, v4, 60/66] rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368

[Masahiro Yamada]

Hi.


2017-08-07 23:05 GMT+09:00 Tom Rini :
> On Mon, Aug 07, 2017 at 10:48:12AM +0200, Dr. Philipp Tomsich wrote:
>> +Tom
>>
>> Ok, so the problem is 'scripts/setlocalversion’, which does the following:
>> > if test -e include/config/auto.conf; then
>> > . include/config/auto.conf
>> > else
>> > echo "Error: kernelrelease not valid - run 'make prepare' to 
>> > update it"
>> > exit 1
>> > fi
>> in order to access the variables needed for:
>> > # CONFIG_LOCALVERSION and LOCALVERSION (if set)
>> > res="${res}${CONFIG_LOCALVERSION}${LOCALVERSION}"
>> >
>> > # scm version string if not at a tagged commit
>> > if test "$CONFIG_LOCALVERSION_AUTO" = "y"; then
>> > # full scm version string
>> > res="$res$(scm_version)"
>> > else
>> > # append a plus sign if the repository is not in a clean
>> > # annotated or signed tagged state (as git describe only
>> > # looks at signed or annotated tags - git tag -a/-s) and
>> > # LOCALVERSION= is not specified
>> > if test "${LOCALVERSION+set}" != "set"; then
>> > scm=$(scm_version --short)
>> > res="$res${scm:++}"
>> > fi
>> > fi
>>
>> So nothing wrong with the changes to Kconfig, but we’re triggering a 
>> weakness in our
>> build infrastructure here.
>>
>> I guess we’ll have to implement a save version of scripts/localversion that 
>> does not
>> allow for the execution of arbitrary script code from auto.conf ...
>
> Masahiro, do you have any ideas here?  Thanks!


I do not like $(ARCH) or $(BOARD) in CONFIG values.
How hard is it to describe lds paths verbatim?




-- 
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Re: [U-Boot] [PATCH v2 3/3] apalis_t30: fix optional pcie port reset for reliable pcie operation

[Stephen Warren]

On 08/09/2017 02:18 PM, Marcel Ziswiler wrote:

On Wed, 2017-08-09 at 12:51 -0600, Stephen Warren wrote:

On 08/09/2017 09:44 AM, Marcel Ziswiler wrote:

From: Marcel Ziswiler 

Allow optionally bringing up the Apalis type specific 4 lane PCIe
port
as well as the PCIe switch as found on the Apalis Evaluation board.
In
order to avoid violating the PCIe reset timing do this by
overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis
PCIe
port are also left disabled in the device tree by default.
diff --git a/board/toradex/apalis_t30/apalis_t30.c
b/board/toradex/apalis_t30/apalis_t30.c
+void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
+   /*
+* Reset PLX PEX 8605 PCIe Switch plus
PCIe devices on
+* Apalis Evaluation Board
+*/
+   gpio_direction_output(PEX_PERST_N, 0);
+   gpio_direction_output(RESET_MOCI_CTRL, 0);
+
+   /*
+* Must be asserted for 100 ms after power
and clocks
+* are stable
+*/
+   mdelay(100);
+
+   gpio_set_value(PEX_PERST_N, 1);
+   /*
+* Err_5: PEX_REFCLK_OUTpx/nx Clock
Outputs is not
+* Guaranteed Until 900 us After
PEX_PERST# De-assertion
+*/
+   mdelay(1);
+   gpio_set_value(RESET_MOCI_CTRL, 1);


Don't we need to also call the core tegra_pcie_port_reset() function
here, so that the driver gets to do any reset of the PCIe controller
HW
that's required? I think that part should happen irrespective of
whether
CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT is enabled?


I really don't think so. All it really would do is just resetting by the means 
of the regular PEX_CTL signals which our design is not using like that anyway.


OK, I guess whatever the outcome, we could always fix it later since 
it's purely board-specific code. So, this patch,


Acked-by: Stephen Warren 
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Re: [U-Boot] [PATCH v4 4/6] pci: tegra: introduce weak tegra_pcie_board_port_reset() function

[Stephen Warren]

On 08/09/2017 02:12 PM, Marcel Ziswiler wrote:

From: Marcel Ziswiler 

Introduce a weak tegra_pcie_board_port_reset() function by default
calling the existing tegra_pcie_port_reset() function. Additionally add
a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe
port index if required. This allows overriding the PCIe port reset
functionality from board specific code as e.g. required for Apalis T30
and Apalis TK1.


This patch,
Acked-by: Stephen Warren 
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Re: [U-Boot] [PATCH v3 4/6] pci: tegra: introduce weak tegra_pcie_board_port_reset() function

[Marcel Ziswiler]

On Wed, 2017-08-09 at 12:47 -0600, Stephen Warren wrote:
> On 08/09/2017 09:31 AM, Marcel Ziswiler wrote:
> > From: Marcel Ziswiler 
> > 
> > Introduce a weak tegra_pcie_board_port_reset() function by default
> > calling the existing tegra_pcie_port_reset() function. Additionally
> > add
> > a tegra_pcie_port_index_of_port() function to retrieve the specific
> > PCIe
> > port index if required. This allows overriding the PCIe port reset
> > functionality from board specific code as e.g. required for Apalis
> > T30
> > and Apalis TK1.
> > diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
> > -static void tegra_pcie_port_reset(struct tegra_pcie_port *port)
> > +void tegra_pcie_port_reset(struct tegra_pcie_port *port)
> >   {
> >     unsigned long ctrl = tegra_pcie_port_get_pex_ctrl(port);
> >     unsigned long value;
> >   
> >     /* pulse reset signel */
> > -   value = afi_readl(port->pcie, ctrl);
> > +   value = afi_readl(((struct tegra_pcie_port *)port)->pcie,
> > ctrl);
> 
> You don't need to add these casts any more.

Argh, yeah you are right. I could have sworn I double/triple checked it all. 
Just sent out a v4 with this now.
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Re: [U-Boot] [PATCH v2 3/3] apalis_t30: fix optional pcie port reset for reliable pcie operation

[Marcel Ziswiler]

On Wed, 2017-08-09 at 12:51 -0600, Stephen Warren wrote:
> On 08/09/2017 09:44 AM, Marcel Ziswiler wrote:
> > From: Marcel Ziswiler 
> > 
> > Allow optionally bringing up the Apalis type specific 4 lane PCIe
> > port
> > as well as the PCIe switch as found on the Apalis Evaluation board.
> > In
> > order to avoid violating the PCIe reset timing do this by
> > overriding the
> > tegra_pcie_board_port_reset() function. Note however that both the
> > Apalis type specific 4 lane PCIe port as well as the regular Apalis
> > PCIe
> > port are also left disabled in the device tree by default.
> > diff --git a/board/toradex/apalis_t30/apalis_t30.c
> > b/board/toradex/apalis_t30/apalis_t30.c
> > +void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
> > +   /*
> > +    * Reset PLX PEX 8605 PCIe Switch plus
> > PCIe devices on
> > +    * Apalis Evaluation Board
> > +    */
> > +   gpio_direction_output(PEX_PERST_N, 0);
> > +   gpio_direction_output(RESET_MOCI_CTRL, 0);
> > +
> > +   /*
> > +    * Must be asserted for 100 ms after power
> > and clocks
> > +    * are stable
> > +    */
> > +   mdelay(100);
> > +
> > +   gpio_set_value(PEX_PERST_N, 1);
> > +   /*
> > +    * Err_5: PEX_REFCLK_OUTpx/nx Clock
> > Outputs is not
> > +    * Guaranteed Until 900 us After
> > PEX_PERST# De-assertion
> > +    */
> > +   mdelay(1);
> > +   gpio_set_value(RESET_MOCI_CTRL, 1);
> 
> Don't we need to also call the core tegra_pcie_port_reset() function 
> here, so that the driver gets to do any reset of the PCIe controller
> HW 
> that's required? I think that part should happen irrespective of
> whether 
> CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT is enabled?

I really don't think so. All it really would do is just resetting by the means 
of the regular PEX_CTL signals which our design is not using like that anyway.
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[U-Boot] [PATCH v4 2/6] apalis-tk1: add missing as3722 gpio0 configuration

[Marcel Ziswiler]

From: Marcel Ziswiler 

As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module
explicitly configure it to high-impedance as well.

Signed-off-by: Marcel Ziswiler 
Reviewed-by: Simon Glass 
---

Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Simon's reviewed-by.

 arch/arm/dts/tegra124-apalis.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts
index 2fc0384..fe08d3e 100644
--- a/arch/arm/dts/tegra124-apalis.dts
+++ b/arch/arm/dts/tegra124-apalis.dts
@@ -1683,9 +1683,9 @@
bias-pull-up;
};
 
-   gpio1_3_4_5_6 {
-   pins = "gpio1", "gpio3", "gpio4",
-  "gpio5", "gpio6";
+   gpio0_1_3_4_5_6 {
+   pins = "gpio0", "gpio1", "gpio3",
+  "gpio4", "gpio5", "gpio6";
bias-high-impedance;
};
};
-- 
2.9.4

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[U-Boot] [PATCH v4 3/6] power: as3722: fix ldo_get/set_enable for ldo index bigger than 7

[Marcel Ziswiler]

From: Marcel Ziswiler 

Fix ldo_get_enable() and ldo_set_enable() functions for LDOs with an
index > 7. Turns out there are actually two separate AS3722_LDO_CONTROL
registers AS3722_LDO_CONTROL0 and AS3722_LDO_CONTROL1. Actually make use
of both. While at it also actually use the enable parameter of the
ldo_set_enable() function which now truly allows disabling as opposed to
only enabling LDOs.

Signed-off-by: Marcel Ziswiler 
---

Changes in v4: None
Changes in v3: None
Changes in v2:
- New bug fix.

 drivers/power/regulator/as3722_regulator.c | 16 ++--
 include/power/as3722.h |  3 ++-
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/power/regulator/as3722_regulator.c 
b/drivers/power/regulator/as3722_regulator.c
index 3e1e6f1..eb4c465 100644
--- a/drivers/power/regulator/as3722_regulator.c
+++ b/drivers/power/regulator/as3722_regulator.c
@@ -69,10 +69,16 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
struct udevice *pmic = dev_get_parent(dev);
+   u8 ctrl_reg = AS3722_LDO_CONTROL0;
int ldo = dev->driver_data;
int ret;
 
-   ret = pmic_clrsetbits(pmic, AS3722_LDO_CONTROL, 0, 1 << ldo);
+   if (ldo > 7) {
+   ctrl_reg = AS3722_LDO_CONTROL1;
+   ldo -= 8;
+   }
+
+   ret = pmic_clrsetbits(pmic, ctrl_reg, !enable << ldo, enable << ldo);
if (ret < 0) {
debug("%s: failed to write LDO control register: %d", __func__,
  ret);
@@ -85,10 +91,16 @@ static int ldo_set_enable(struct udevice *dev, bool enable)
 static int ldo_get_enable(struct udevice *dev)
 {
struct udevice *pmic = dev_get_parent(dev);
+   u8 ctrl_reg = AS3722_LDO_CONTROL0;
int ldo = dev->driver_data;
int ret;
 
-   ret = pmic_reg_read(pmic, AS3722_LDO_CONTROL);
+   if (ldo > 7) {
+   ctrl_reg = AS3722_LDO_CONTROL1;
+   ldo -= 8;
+   }
+
+   ret = pmic_reg_read(pmic, ctrl_reg);
if (ret < 0) {
debug("%s: failed to read SD control register: %d", __func__,
  ret);
diff --git a/include/power/as3722.h b/include/power/as3722.h
index cb4b188..b3dc7b6 100644
--- a/include/power/as3722.h
+++ b/include/power/as3722.h
@@ -14,7 +14,8 @@
 #define AS3722_SD_VOLTAGE(n) (0x00 + (n))
 #define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
 #define AS3722_SD_CONTROL 0x4d
-#define AS3722_LDO_CONTROL 0x4e
+#define AS3722_LDO_CONTROL0 0x4e
+#define AS3722_LDO_CONTROL1 0x4f
 #define AS3722_ASIC_ID1 0x90
 #define AS3722_ASIC_ID2 0x91
 
-- 
2.9.4

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[U-Boot] [PATCH v4 0/6] fix apalis-tk1 pcie gigabit ethernet operation

[Marcel Ziswiler]

This series addresses a gigabit Ethernet reliability issue as observed
on Apalis TK1 related to a PCIe reset timing violation.

This series depends on Simon's work available at u-boot-dm/master plus
my previous series "move apalis t30/tk1, colibri t20/t30 to livetree".

This series is available at 
http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next

Changes in v4:
- Revert previously missed (struct tegra_pcie_port *) casts as reported
  by Stephen.

Changes in v3:
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.

Changes in v2:
- Add Simon's reviewed-by.
- New bug fix.
- Incorporate Stephen's review feedback by introducing a
  tegra_pcie_port_index_of_port() function as well as a board-specific
  reset override function.
- Add Simon's reviewed-by.

Marcel Ziswiler (5):
  apalis-tk1: add missing as3722 gpio0 configuration
  power: as3722: fix ldo_get/set_enable for ldo index bigger than 7
  pci: tegra: introduce weak tegra_pcie_board_port_reset() function
  power: as3722: add as3722_ldo_set_voltage signature to header file
  apalis-tk1: fix pcie reset for reliable gigabit ethernet operation

Sanchayan Maity (1):
  configs: apalis-tk1: fix boot failure using ext4 rootfs

 arch/arm/dts/tegra124-apalis.dts   |   6 +-
 board/toradex/apalis-tk1/Kconfig   |   8 +
 board/toradex/apalis-tk1/apalis-tk1.c  | 249 ++---
 drivers/pci/pci_tegra.c|  17 +-
 drivers/power/regulator/as3722_regulator.c |  16 +-
 include/configs/apalis-tk1.h   |   4 +-
 include/pci_tegra.h|  11 ++
 include/power/as3722.h |   4 +-
 8 files changed, 210 insertions(+), 105 deletions(-)
 create mode 100644 include/pci_tegra.h

-- 
2.9.4

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[U-Boot] [PATCH v4 4/6] pci: tegra: introduce weak tegra_pcie_board_port_reset() function

[Marcel Ziswiler]

From: Marcel Ziswiler 

Introduce a weak tegra_pcie_board_port_reset() function by default
calling the existing tegra_pcie_port_reset() function. Additionally add
a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe
port index if required. This allows overriding the PCIe port reset
functionality from board specific code as e.g. required for Apalis T30
and Apalis TK1.

Signed-off-by: Marcel Ziswiler 
---

Changes in v4:
- Revert previously missed (struct tegra_pcie_port *) casts as reported
  by Stephen.

Changes in v3:
- Stick to struct tegra_pcie_port as suggested by Stephen.

Changes in v2:
- Incorporate Stephen's review feedback by introducing a
  tegra_pcie_port_index_of_port() function as well as a board-specific
  reset override function.

 drivers/pci/pci_tegra.c | 17 ++---
 include/pci_tegra.h | 11 +++
 2 files changed, 25 insertions(+), 3 deletions(-)
 create mode 100644 include/pci_tegra.h

diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index cb5cf8b..e371c0b 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -893,7 +894,7 @@ static unsigned long tegra_pcie_port_get_pex_ctrl(struct 
tegra_pcie_port *port)
return ret;
 }
 
-static void tegra_pcie_port_reset(struct tegra_pcie_port *port)
+void tegra_pcie_port_reset(struct tegra_pcie_port *port)
 {
unsigned long ctrl = tegra_pcie_port_get_pex_ctrl(port);
unsigned long value;
@@ -910,6 +911,16 @@ static void tegra_pcie_port_reset(struct tegra_pcie_port 
*port)
afi_writel(port->pcie, value, ctrl);
 }
 
+int tegra_pcie_port_index_of_port(struct tegra_pcie_port *port)
+{
+   return port->index;
+}
+
+void __weak tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
+{
+   tegra_pcie_port_reset(port);
+}
+
 static void tegra_pcie_port_enable(struct tegra_pcie_port *port)
 {
struct tegra_pcie *pcie = port->pcie;
@@ -928,7 +939,7 @@ static void tegra_pcie_port_enable(struct tegra_pcie_port 
*port)
 
afi_writel(pcie, value, ctrl);
 
-   tegra_pcie_port_reset(port);
+   tegra_pcie_board_port_reset(port);
 
if (soc->force_pca_enable) {
value = rp_readl(port, RP_VEND_CTL2);
@@ -979,7 +990,7 @@ static bool tegra_pcie_port_check_link(struct 
tegra_pcie_port *port)
} while (--timeout);
 
 retry:
-   tegra_pcie_port_reset(port);
+   tegra_pcie_board_port_reset(port);
} while (--retries);
 
return false;
diff --git a/include/pci_tegra.h b/include/pci_tegra.h
new file mode 100644
index 000..2bf1f59
--- /dev/null
+++ b/include/pci_tegra.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2017 Toradex, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+struct tegra_pcie_port;
+
+int tegra_pcie_port_index_of_port(struct tegra_pcie_port *port);
+
+void tegra_pcie_port_reset(struct tegra_pcie_port *port);
-- 
2.9.4

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[U-Boot] [PATCH v4 6/6] apalis-tk1: fix pcie reset for reliable gigabit ethernet operation

[Marcel Ziswiler]

From: Marcel Ziswiler 

It turns out that the current PCIe reset implementation in the PCIe
board init function is not quite working reliably due to PCIe reset
timing violations. Fix this by overriding the
tegra_pcie_board_port_reset() function.

Also allow optionally bringing up the PCIe switch as found on the Apalis
Evaluation board. Note however that the Apalis PCIe port is also left
disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler 
---

Changes in v4: None
Changes in v3:
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.

Changes in v2: None

 board/toradex/apalis-tk1/Kconfig  |   8 ++
 board/toradex/apalis-tk1/apalis-tk1.c | 249 +-
 2 files changed, 163 insertions(+), 94 deletions(-)

diff --git a/board/toradex/apalis-tk1/Kconfig b/board/toradex/apalis-tk1/Kconfig
index 05407ad..159b8fb 100644
--- a/board/toradex/apalis-tk1/Kconfig
+++ b/board/toradex/apalis-tk1/Kconfig
@@ -25,6 +25,14 @@ config TDX_CFG_BLOCK_PART
 config TDX_CFG_BLOCK_OFFSET
default "-512"
 
+config APALIS_TK1_PCIE_EVALBOARD_INIT
+   bool "Apalis Evaluation Board PCIe Initialisation"
+   help
+ Bring up the Apalis PCIe port with the PCIe switch as found on the
+ Apalis Evaluation board. Note that by default the PCIe port is also
+ left disabled in the device tree which needs changing as well for this
+ to actually work.
+
 source "board/toradex/common/Kconfig"
 
 endif
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c 
b/board/toradex/apalis-tk1/apalis-tk1.c
index 5de61e7..ca2d61d 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -5,17 +5,26 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 #include "../common/tdx-common.h"
 #include "pinmux-config-apalis-tk1.h"
 
-#define LAN_RESET_N TEGRA_GPIO(S, 2)
+#define LAN_DEV_OFF_N  TEGRA_GPIO(O, 6)
+#define LAN_RESET_NTEGRA_GPIO(S, 2)
+#define LAN_WAKE_N TEGRA_GPIO(O, 5)
+#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
+#define PEX_PERST_NTEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
+#define RESET_MOCI_CTRLTEGRA_GPIO(U, 4)
+#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
 
 int arch_misc_init(void)
 {
@@ -59,123 +68,175 @@ void pinmux_init(void)
 }
 
 #ifdef CONFIG_PCI_TEGRA
-int tegra_pcie_board_init(void)
+/* TODO: Convert to driver model */
+static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
 {
-   /* TODO: Convert to driver model
-   struct udevice *pmic;
int err;
 
-   err = as3722_init();
+   if (sd > 6)
+   return -EINVAL;
+
+   err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
if (err) {
-   error("failed to initialize AS3722 PMIC: %d\n", err);
+   error("failed to update SD control register: %d", err);
return err;
}
 
-   err = as3722_sd_enable(pmic, 4);
-   if (err < 0) {
-   error("failed to enable SD4: %d\n", err);
-   return err;
-   }
+   return 0;
+}
 
-   err = as3722_sd_set_voltage(pmic, 4, 0x24);
-   if (err < 0) {
-   error("failed to set SD4 voltage: %d\n", err);
-   return err;
-   }
+/* TODO: Convert to driver model */
+static int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
+{
+   int err;
+   u8 ctrl_reg = AS3722_LDO_CONTROL0;
 
-   err = as3722_gpio_configure(pmic, 1, AS3722_GPIO_OUTPUT_VDDH |
-AS3722_GPIO_INVERT);
-   if (err < 0) {
-   error("failed to configure GPIO#1 as output: %d\n", err);
-   return err;
-   }
+   if (ldo > 11)
+   return -EINVAL;
 
-   err = as3722_gpio_direction_output(pmic, 2, 1);
-   if (err < 0) {
-   error("failed to set GPIO#2 high: %d\n", err);
-   return err;
+   if (ldo > 7) {
+   ctrl_reg = AS3722_LDO_CONTROL1;
+   ldo -= 8;
}
-   */
 
-   /* Reset I210 Gigabit Ethernet Controller */
-   gpio_request(LAN_RESET_N, "LAN_RESET_N");
-   gpio_direction_output(LAN_RESET_N, 0);
-
-   /*
-* Make sure we don't get any back feeding from LAN_WAKE_N resp.
-* DEV_OFF_N
-*/
-   gpio_request(TEGRA_GPIO(O, 5), "LAN_WAKE_N");
-   gpio_direction_output(TEGRA_GPIO(O, 5), 0);
-
-   gpio_request(TEGRA_GPIO(O, 6), "LAN_DEV_OFF_N");
-   gpio_direction_output(TEGRA_GPIO(O, 6), 0);
-
-   /* Make sure LDO9 and LDO10 are initially enabled @ 0V */
-   /* TODO: Convert to driver model
-   err = as3722_ldo_enable(pmic, 9);
-   if (err < 0) {
-   error("failed to enable LDO9: %d\n", err);
- 

[U-Boot] [PATCH v4 1/6] configs: apalis-tk1: fix boot failure using ext4 rootfs

[Marcel Ziswiler]

From: Sanchayan Maity 

Trying to boot from an ext4 rootfs fails due to us defaulting to ext3.
While the downstream T20/T30 L4T kernel has issues with ext4 later TK1
L4T should work just fine with it. Hence enable ext4 for sdboot and
usbboot on TK1.

Signed-off-by: Sanchayan Maity 
Acked-by: Marcel Ziswiler 
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 include/configs/apalis-tk1.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index d6b226c..bb46768 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -87,7 +87,7 @@
"&& setenv dtbparam ${fdt_addr_r}\0"
 
 #define SD_BOOTCMD \
-   "sdargs=ip=off root=/dev/mmcblk1p2 rw rootfstype=ext3 rootwait\0" \
+   "sdargs=ip=off root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait\0" \
"sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${setupargs} " \
"${vidargs}; echo Booting from SD card in 8bit slot...; " \
"run sddtbload; load mmc 1:1 ${kernel_addr_r} " \
@@ -98,7 +98,7 @@
"&& setenv dtbparam ${fdt_addr_r}\0"
 
 #define USB_BOOTCMD \
-   "usbargs=ip=off root=/dev/sda2 rw rootfstype=ext3 rootwait\0" \
+   "usbargs=ip=off root=/dev/sda2 rw rootfstype=ext4 rootwait\0" \
"usbboot=run setup; setenv bootargs ${defargs} ${setupargs} " \
"${usbargs} ${vidargs}; echo Booting from USB stick...; " \
"usb start && run usbdtbload; load usb 0:1 ${kernel_addr_r} " \
-- 
2.9.4

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Re: [U-Boot] [PATCH 12/13] armv7: support rk3066 early back to bootrom in start.S

[Paweł Jarosz]

Hi Phillip,


W dniu 09.08.2017 o 22:01, Dr. Philipp Tomsich pisze:

On 04 Aug 2017, at 19:01, Paweł Jarosz  wrote:

Hi Philipp,


W dniu 04.08.2017 o 18:51, Dr. Philipp Tomsich pisze:

On 04 Aug 2017, at 18:33, Paweł Jarosz  wrote:

Hi,


W dniu 15.06.2017 o 18:40, Simon Glass pisze:

Hi Pawel,

On 15 June 2017 at 10:32, Paweł Jarosz  wrote:

W dniu 15.06.2017 o 18:00, Simon Glass pisze:


(just repeating other thread for completeness)

On 15 June 2017 at 09:42, Paweł Jarosz  wrote:

W dniu 15.06.2017 o 16:50, Simon Glass pisze:


+ Some other rockchip people

Hi Pawel,

On 15 June 2017 at 01:15, Paweł Jarosz 
wrote:

Hi Simon


W dniu 14.06.2017 o 13:06, Simon Glass pisze:

+Philippe

Hi Pawel,

On 12 June 2017 at 17:50, Simon Glass  wrote:

Hi Pawel,

On 9 June 2017 at 06:31, Paweł Jarosz 
wrote:

W dniu 09.06.2017 o 13:46, Heiko Stuebner pisze:

Am Mittwoch, 7. Juni 2017, 17:37:13 CEST schrieb Paweł Jarosz:

Hi Simon,


W dniu 06.06.2017 o 23:10, Simon Glass pisze:

Hi Pawel,

On 6 June 2017 at 12:53, Paweł Jarosz 
wrote:

Rockchip bootrom first reads 1KB data from nand at offset 0x10080C00
and
executes it. Then waits for back to bootrom and loads another 32KB to
sram
which also executes. Sdram initialisation code needs to be in one of
these two
steps. Then bootloader loads another ~200KB of data at offset
0x6000
and jumps to it.

32KB of data is a little low for tpl + spl part and ~200KB data is to
low for
u-boot part(for example to boot from mmc you need to disable usb
support.

My solution to size problem is to move sdram initialisation code to tpl
stage,
move spl part to third stage(reading 200KB data) and add support for
loading
u-boot by spl from ext2/4, fat partitions.

But moving sdram initialisation code to tpl increases size of tpl above
1KB
(first boot stage). Solution to this is to add code which will be below
1KB
offset in tpl binary and do back to bootrom at very beginning of the
tpl
execution.

So do you mean that TPL starts and then loads more of itself? Why not
put SDRAM init in SPL? You say above that 32KB is 'too low', but It's
not clear why.

Ad.1 No. Tpl starts and at the first execution returns to bootrom.
Bootrom then loads
rest of the tpl (31KB) and executes it for a second time.

Ad.2,3 Due to size issues (200KB limit) i needed to move main u-boot to
mmc. To load u-boot from
mmc by SPL (there is 32KB bootrom limit, not enough space for mmc
support) i moved SPL to sdram.
Code executed in sdram can't mess with sdram settings because it will
hang the board. Sdram setup
needs to be done by code in SRAM (tpl).

At least the rk3288-Firefly was able to also have mmc stack in the SPL
in
the past, without requiring the back_to_bootrom at all. So question
would
be why this doesn't fit anymore, or on the rk3066 specifically.

Also, it seems like I got my hands on a preliminary (linux/mtd) nand
driver
(rk3228 but cursory glance at the registers suggests that it may
actually
work on previous socs down to the rk3066 as well) and it may be
possible
to adapt that for uboot, therefore making the spl able to also load the
full u-boot from without needing back_to_bootrom.


Heiko

I was not able to get mmc support on rk3066 in spl in ~31kb (32kb - 1kb
for
tpl)size limit.
One (or two i didn't check how much) back to bootrom is required on
rk3066.
If not done bootrom stays in weird state and halts on bringup secondary
cpu
in kernel. So it's rk3066 specific.

What size do you get? With firefly-rk3288 I get about 25KB with SDRAM
init and MMC stack. Are you building with Thumb 2?

If you are on irc we could try to clear this up more quicky (I am sjg1)

To summarise where I think we got to:

- move DRAM init into SPL
- either have a very small TPL which just returns to boot ROM, or
adjust start.S to return to the boot room early in SPL to load the
other 31KB

Can you please post to the mailing list with your thoughts on this so
that others (including rockchip) can chime in? I think either will
work but I think others will have an opinion.

Regards,
Simon


About moving dram init to spl i agree.

I think early back to bootrom in start.S is a good solution as it would
give
me 1KB more space for spl and i could drop hacks like jumping to spl in
tpl
board file. But I would like to hear the opinion of other people on
this.

So with this solution there would be no TPL needed? It sounds
reasonable to me. I'd like to hear other opinions also.

We don't need tpl if i use early back to bootrom in start.S patch with
spl... but i didn't test it yet. If it will work i will drop the tpl. Is
that ok?

It's OK with me. I don't know how the BROM re-enters SPL after the
first call into the 1KB region. Depending on how that works, it might
be too painful to use SPL only (e.g. if it jumps to a place in the

Re: [U-Boot] [PATCH 12/13] armv7: support rk3066 early back to bootrom in start.S

[Dr. Philipp Tomsich]

> On 04 Aug 2017, at 19:01, Paweł Jarosz  wrote:
> 
> Hi Philipp,
> 
> 
> W dniu 04.08.2017 o 18:51, Dr. Philipp Tomsich pisze:
>>> On 04 Aug 2017, at 18:33, Paweł Jarosz  wrote:
>>> 
>>> Hi,
>>> 
>>> 
>>> W dniu 15.06.2017 o 18:40, Simon Glass pisze:
 Hi Pawel,
 
 On 15 June 2017 at 10:32, Paweł Jarosz  wrote:
> W dniu 15.06.2017 o 18:00, Simon Glass pisze:
> 
>> (just repeating other thread for completeness)
>> 
>> On 15 June 2017 at 09:42, Paweł Jarosz  wrote:
>>> W dniu 15.06.2017 o 16:50, Simon Glass pisze:
>>> 
 + Some other rockchip people
 
 Hi Pawel,
 
 On 15 June 2017 at 01:15, Paweł Jarosz 
 wrote:
> Hi Simon
> 
> 
> W dniu 14.06.2017 o 13:06, Simon Glass pisze:
> 
> +Philippe
> 
> Hi Pawel,
> 
> On 12 June 2017 at 17:50, Simon Glass  wrote:
> 
> Hi Pawel,
> 
> On 9 June 2017 at 06:31, Paweł Jarosz 
> wrote:
> 
> W dniu 09.06.2017 o 13:46, Heiko Stuebner pisze:
> 
> Am Mittwoch, 7. Juni 2017, 17:37:13 CEST schrieb Paweł Jarosz:
> 
> Hi Simon,
> 
> 
> W dniu 06.06.2017 o 23:10, Simon Glass pisze:
> 
> Hi Pawel,
> 
> On 6 June 2017 at 12:53, Paweł Jarosz 
> wrote:
> 
> Rockchip bootrom first reads 1KB data from nand at offset 0x10080C00
> and
> executes it. Then waits for back to bootrom and loads another 32KB to
> sram
> which also executes. Sdram initialisation code needs to be in one of
> these two
> steps. Then bootloader loads another ~200KB of data at offset
> 0x6000
> and jumps to it.
> 
> 32KB of data is a little low for tpl + spl part and ~200KB data is to
> low for
> u-boot part(for example to boot from mmc you need to disable usb
> support.
> 
> My solution to size problem is to move sdram initialisation code to 
> tpl
> stage,
> move spl part to third stage(reading 200KB data) and add support for
> loading
> u-boot by spl from ext2/4, fat partitions.
> 
> But moving sdram initialisation code to tpl increases size of tpl 
> above
> 1KB
> (first boot stage). Solution to this is to add code which will be 
> below
> 1KB
> offset in tpl binary and do back to bootrom at very beginning of the
> tpl
> execution.
> 
> So do you mean that TPL starts and then loads more of itself? Why not
> put SDRAM init in SPL? You say above that 32KB is 'too low', but It's
> not clear why.
> 
> Ad.1 No. Tpl starts and at the first execution returns to bootrom.
> Bootrom then loads
> rest of the tpl (31KB) and executes it for a second time.
> 
> Ad.2,3 Due to size issues (200KB limit) i needed to move main u-boot 
> to
> mmc. To load u-boot from
> mmc by SPL (there is 32KB bootrom limit, not enough space for mmc
> support) i moved SPL to sdram.
> Code executed in sdram can't mess with sdram settings because it will
> hang the board. Sdram setup
> needs to be done by code in SRAM (tpl).
> 
> At least the rk3288-Firefly was able to also have mmc stack in the SPL
> in
> the past, without requiring the back_to_bootrom at all. So question
> would
> be why this doesn't fit anymore, or on the rk3066 specifically.
> 
> Also, it seems like I got my hands on a preliminary (linux/mtd) nand
> driver
> (rk3228 but cursory glance at the registers suggests that it may
> actually
> work on previous socs down to the rk3066 as well) and it may be
> possible
> to adapt that for uboot, therefore making the spl able to also load 
> the
> full u-boot from without needing back_to_bootrom.
> 
> 
> Heiko
> 
> I was not able to get mmc support on rk3066 in spl in ~31kb (32kb - 
> 1kb
> for
> tpl)size limit.
> One (or two i didn't check how much) back to bootrom is required on
> rk3066.
> If not done bootrom stays in weird state and halts on bringup 
> secondary
> cpu
> in kernel. So it's rk3066 specific.
> 
> What size do you get? With firefly-rk3288 I get about 25KB with SDRAM
> init and MMC stack. Are you building with Thumb 2?
> 
> If you are on irc 

Re: [U-Boot] [U-Boot,06/13] rockchip: rk3066: add core support

[Paweł Jarosz]

Hi Phillip,


W dniu 04.07.2017 o 19:35, Philipp Tomsich pisze:



On Tue, 6 Jun 2017, Paweł Jarosz wrote:


Add core skeleton for rk3066

Signed-off-by: Paweł Jarosz 
Acked-by: Philipp Tomsich 
---
arch/arm/mach-rockchip/Kconfig|  16 +++
arch/arm/mach-rockchip/Makefile   |   4 +
arch/arm/mach-rockchip/rk3066-board-spl.c | 173 
+

arch/arm/mach-rockchip/rk3066-board-tpl.c |  46 +++
arch/arm/mach-rockchip/rk3066-board.c | 180 
++

arch/arm/mach-rockchip/rk3066/Kconfig |  34 +
arch/arm/mach-rockchip/rk3066/Makefile|  12 ++
arch/arm/mach-rockchip/rk3066/clk_rk3066.c|  33 +
arch/arm/mach-rockchip/rk3066/syscon_rk3066.c |  54 
include/configs/rk3066_common.h   | 125 ++
10 files changed, 677 insertions(+)
create mode 100644 arch/arm/mach-rockchip/rk3066-board-spl.c
create mode 100644 arch/arm/mach-rockchip/rk3066-board-tpl.c
create mode 100644 arch/arm/mach-rockchip/rk3066-board.c
create mode 100644 arch/arm/mach-rockchip/rk3066/Kconfig
create mode 100644 arch/arm/mach-rockchip/rk3066/Makefile
create mode 100644 arch/arm/mach-rockchip/rk3066/clk_rk3066.c
create mode 100644 arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
create mode 100644 include/configs/rk3066_common.h

diff --git a/arch/arm/mach-rockchip/Kconfig 
b/arch/arm/mach-rockchip/Kconfig

index 6be2ab5..ad35e0a 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,21 @@ config ROCKCHIP_RK3036
  and video codec support. Peripherals include Gigabit Ethernet,
  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.

+config ROCKCHIP_RK3066
+bool "Support Rockchip RK3066"
+select CPU_V7
+select SUPPORT_SPL
+select SUPPORT_TPL
+select SPL
+select TPL
+select BOARD_LATE_INIT
+select ROCKCHIP_BROM_HELPER
+help
+  The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A7
+  including NEON and GPU, Mali-400 graphics, several DDR3 options
+  and video codec support. Peripherals include Gigabit Ethernet,
+  USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
config ROCKCHIP_RK3188
bool "Support Rockchip RK3188"
select CPU_V7
@@ -91,6 +106,7 @@ config SPL_MMC_SUPPORT
default y if !ROCKCHIP_SPL_BACK_TO_BROM

source "arch/arm/mach-rockchip/rk3036/Kconfig"
+source "arch/arm/mach-rockchip/rk3066/Kconfig"
source "arch/arm/mach-rockchip/rk3188/Kconfig"
source "arch/arm/mach-rockchip/rk3288/Kconfig"
source "arch/arm/mach-rockchip/rk3328/Kconfig"
diff --git a/arch/arm/mach-rockchip/Makefile 
b/arch/arm/mach-rockchip/Makefile

index 327b267..1ebba0c 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -7,15 +7,18 @@
obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o

ifdef CONFIG_TPL_BUILD
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
else ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o
obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
else
+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
@@ -29,6 +32,7 @@ ifndef CONFIG_TPL_BUILD
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
endif

+obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c 
b/arch/arm/mach-rockchip/rk3066-board-spl.c

new file mode 100644
index 000..6f7bfb0
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3066-board-spl.c
@@ -0,0 +1,173 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 spl_boot_device(void)
+{
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+const void *blob = gd->fdt_blob;
+struct udevice *dev;
+const char *bootdev;
+int node;
+int ret;
+
+bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
+debug("Boot device %s\n", bootdev);
+if (!bootdev)
+goto fallback;
+
+node = fdt_path_offset(blob, bootdev);
+if (node < 0) {
+debug("node=%d\n", node);
+goto fallback;
+}
+ret = 

Re: [U-Boot] [PATCH 1/1] efi_loader: attribute EFIAPI of efi_locate handle()

[Rob Clark]

On Wed, Aug 9, 2017 at 2:55 PM, Heinrich Schuchardt  wrote:
> efi_locate_handle is called internally so it should not be
> marked as EFIAPI.
>
> The external function is efi_locate_handle_ext.
>
> Signed-off-by: Heinrich Schuchardt 

Reviewed-by: Rob Clark 

> ---
> @Alex
> Please, pull this patch after
> [PATCH v2] efi_loader: LocateHandle should return EFI_NOT_FOUND if none found
> https://patchwork.ozlabs.org/patch/798433/
> ---
>  lib/efi_loader/efi_boottime.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
> index b8461582e4..5d4dab3396 100644
> --- a/lib/efi_loader/efi_boottime.c
> +++ b/lib/efi_loader/efi_boottime.c
> @@ -624,7 +624,7 @@ static int efi_search(enum efi_locate_search_type 
> search_type,
> return -1;
>  }
>
> -static efi_status_t EFIAPI efi_locate_handle(
> +static efi_status_t efi_locate_handle(
> enum efi_locate_search_type search_type,
> efi_guid_t *protocol, void *search_key,
> unsigned long *buffer_size, efi_handle_t *buffer)
> --
> 2.11.0
>
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[U-Boot] [PATCH 1/1] efi_loader: attribute EFIAPI of efi_locate handle()

[Heinrich Schuchardt]

efi_locate_handle is called internally so it should not be
marked as EFIAPI.

The external function is efi_locate_handle_ext.

Signed-off-by: Heinrich Schuchardt 
---
@Alex
Please, pull this patch after
[PATCH v2] efi_loader: LocateHandle should return EFI_NOT_FOUND if none found
https://patchwork.ozlabs.org/patch/798433/
---
 lib/efi_loader/efi_boottime.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index b8461582e4..5d4dab3396 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -624,7 +624,7 @@ static int efi_search(enum efi_locate_search_type 
search_type,
return -1;
 }
 
-static efi_status_t EFIAPI efi_locate_handle(
+static efi_status_t efi_locate_handle(
enum efi_locate_search_type search_type,
efi_guid_t *protocol, void *search_key,
unsigned long *buffer_size, efi_handle_t *buffer)
-- 
2.11.0

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Re: [U-Boot] [PATCH v2 3/3] apalis_t30: fix optional pcie port reset for reliable pcie operation

[Stephen Warren]

On 08/09/2017 09:44 AM, Marcel Ziswiler wrote:

From: Marcel Ziswiler 

Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
port are also left disabled in the device tree by default.



diff --git a/board/toradex/apalis_t30/apalis_t30.c 
b/board/toradex/apalis_t30/apalis_t30.c



+void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)



+   /*
+* Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
+* Apalis Evaluation Board
+*/
+   gpio_direction_output(PEX_PERST_N, 0);
+   gpio_direction_output(RESET_MOCI_CTRL, 0);
+
+   /*
+* Must be asserted for 100 ms after power and clocks
+* are stable
+*/
+   mdelay(100);
+
+   gpio_set_value(PEX_PERST_N, 1);
+   /*
+* Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
+* Guaranteed Until 900 us After PEX_PERST# De-assertion
+*/
+   mdelay(1);
+   gpio_set_value(RESET_MOCI_CTRL, 1);


Don't we need to also call the core tegra_pcie_port_reset() function 
here, so that the driver gets to do any reset of the PCIe controller HW 
that's required? I think that part should happen irrespective of whether 
CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT is enabled?

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Re: [U-Boot] [PATCH v3 1/2] usb: net: Add support for Microchip LAN75xx and LAN78xx

[Joe Hershberger]

On Wed, Aug 9, 2017 at 12:12 PM, Marek Vasut  wrote:
> On 08/09/2017 06:25 PM, yuiko.osh...@microchip.com wrote:
>> From: Yuiko Oshino 
>>
>> Series-Changes: 3
>
> FYI, this will end in the commit message when applied, remove it or move
> it below the --- . Also commit message is missing.

This is what I was talking about when I said I would fix the commit
log as I apply it.

>>- All #ifdef CONFIG_DM_ETH and #endif are removed.
>>- The lan7x_eth_recv() is modifed to correctly support the Driver Model
>>  and returns packet_en.
>>- Add mii_resolve_flowctrl_fdx() patch in the series.
>>
>> Series-Changes: 2
>>- The wait_for_bit functions copy the real one.
>>- Uses phylib
>>- Unnecessary variables are removed
>>- All return values are checked
>>- Uses mii_resolve_flowctrl_fdx() from linux/mii.h
>>
>> Signed-off-by: Yuiko Oshino 
>> ---
>> Add support for Microchip LAN7500, LAN7800 and LAN7850,
>> USB to 10/100/1000 Ethernet Controllers.
>>
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Re: [U-Boot] [PATCH v3 1/2] usb: net: Add support for Microchip LAN75xx and LAN78xx

[Marek Vasut]

On 08/09/2017 06:25 PM, yuiko.osh...@microchip.com wrote:
> From: Yuiko Oshino 
> 
> Series-Changes: 3

FYI, this will end in the commit message when applied, remove it or move
it below the --- . Also commit message is missing.

>- All #ifdef CONFIG_DM_ETH and #endif are removed.
>- The lan7x_eth_recv() is modifed to correctly support the Driver Model
>  and returns packet_en.
>- Add mii_resolve_flowctrl_fdx() patch in the series.
> 
> Series-Changes: 2
>- The wait_for_bit functions copy the real one.
>- Uses phylib
>- Unnecessary variables are removed
>- All return values are checked
>- Uses mii_resolve_flowctrl_fdx() from linux/mii.h
> 
> Signed-off-by: Yuiko Oshino 
> ---
> Add support for Microchip LAN7500, LAN7800 and LAN7850,
> USB to 10/100/1000 Ethernet Controllers.
> 
> 
>  drivers/usb/Kconfig   |   2 +
>  drivers/usb/eth/Kconfig   |  17 ++
>  drivers/usb/eth/Makefile  |   2 +
>  drivers/usb/eth/lan75xx.c | 318 +
>  drivers/usb/eth/lan78xx.c | 477 
>  drivers/usb/eth/lan7x.c   | 495 
> ++
>  drivers/usb/eth/lan7x.h   | 230 +
>  7 files changed, 1541 insertions(+)
>  create mode 100644 drivers/usb/eth/Kconfig
>  create mode 100644 drivers/usb/eth/lan75xx.c
>  create mode 100644 drivers/usb/eth/lan78xx.c
>  create mode 100644 drivers/usb/eth/lan7x.c
>  create mode 100644 drivers/usb/eth/lan7x.h
> 
> diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
> index da3ec2f..62126aa 100644
> --- a/drivers/usb/Kconfig
> +++ b/drivers/usb/Kconfig
> @@ -94,4 +94,6 @@ endif
>  
>  source "drivers/usb/gadget/Kconfig"
>  
> +source "drivers/usb/eth/Kconfig"
> +
>  endif
> diff --git a/drivers/usb/eth/Kconfig b/drivers/usb/eth/Kconfig
> new file mode 100644
> index 000..14cfa26
> --- /dev/null
> +++ b/drivers/usb/eth/Kconfig
> @@ -0,0 +1,17 @@
> +comment "USB to Ethernet Controller Drivers"
> +
> +config USB_ETHER_LAN75XX
> + bool "Microchip LAN75XX support"
> + ---help---
> +   Say Y here if you would like to support Microchip LAN75XX Hi-Speed
> +   USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
> +   Supports 10Base-T/ 100Base-TX/1000Base-T.
> +   This driver supports the internal PHY.
> +
> +config USB_ETHER_LAN78XX
> + bool "Microchip LAN78XX support"
> + ---help---
> +   Say Y here if you would like to support Microchip LAN78XX USB 3.1
> +   Gen 1 to 10/100/1000 Gigabit Ethernet controller.
> +   Supports 10Base-T/ 100Base-TX/1000Base-T.
> +   This driver supports the internal PHY.
> diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile
> index 4c44efc..4b935a3 100644
> --- a/drivers/usb/eth/Makefile
> +++ b/drivers/usb/eth/Makefile
> @@ -9,4 +9,6 @@ obj-$(CONFIG_USB_ETHER_ASIX) += asix.o
>  obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
>  obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
>  obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
> +obj-$(CONFIG_USB_ETHER_LAN75XX) += lan7x.o lan75xx.o
> +obj-$(CONFIG_USB_ETHER_LAN78XX) += lan7x.o lan78xx.o
>  obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o r8152_fw.o
> diff --git a/drivers/usb/eth/lan75xx.c b/drivers/usb/eth/lan75xx.c
> new file mode 100644
> index 000..a3c1411
> --- /dev/null
> +++ b/drivers/usb/eth/lan75xx.c
> @@ -0,0 +1,318 @@
> +/*
> + * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include "usb_ether.h"
> +#include "lan7x.h"
> +
> +/* LAN75xx specific register/bit defines */
> +#define LAN75XX_HW_CFG_BIR   BIT(7)
> +
> +#define LAN75XX_BURST_CAP0x034
> +
> +#define LAN75XX_BULK_IN_DLY  0x03C
> +
> +#define LAN75XX_RFE_CTL  0x060
> +
> +#define LAN75XX_FCT_RX_CTL   0x090
> +
> +#define LAN75XX_FCT_TX_CTL   0x094
> +
> +#define LAN75XX_FCT_RX_FIFO_END  0x098
> +
> +#define LAN75XX_FCT_TX_FIFO_END  0x09C
> +
> +#define LAN75XX_FCT_FLOW 0x0A0
> +
> +/* MAC ADDRESS PERFECT FILTER For LAN75xx */
> +#define LAN75XX_ADDR_FILTX   0x300
> +#define LAN75XX_ADDR_FILTX_FB_VALID  BIT(31)
> +
> +/*
> + * Lan75xx infrastructure commands
> + */
> +static int lan75xx_phy_gig_workaround(struct usb_device *udev,
> +   struct ueth_data *dev)
> +{
> + int ret = 0;
> +
> + /* Only internal phy */
> + /* Set the phy in Gig loopback */
> + lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
> +  (BMCR_LOOPBACK | BMCR_SPEED1000));
> +
> + /* Wait for the link up */
> + ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
> +   dev->phy_id, MII_BMSR, BMSR_LSTATUS,
> +   true, PHY_CONNECT_TIMEOUT_MS, 1);
> + if (ret)
> 

Re: [U-Boot] [PATCH v3 1/2] usb: net: Add support for Microchip LAN75xx and LAN78xx

[Joe Hershberger]

On Wed, Aug 9, 2017 at 11:25 AM,   wrote:
> From: Yuiko Oshino 
>
> Series-Changes: 3
>- All #ifdef CONFIG_DM_ETH and #endif are removed.
>- The lan7x_eth_recv() is modifed to correctly support the Driver Model
>  and returns packet_en.
>- Add mii_resolve_flowctrl_fdx() patch in the series.
>
> Series-Changes: 2
>- The wait_for_bit functions copy the real one.
>- Uses phylib
>- Unnecessary variables are removed
>- All return values are checked
>- Uses mii_resolve_flowctrl_fdx() from linux/mii.h
>
> Signed-off-by: Yuiko Oshino 
> ---
> Add support for Microchip LAN7500, LAN7800 and LAN7850,
> USB to 10/100/1000 Ethernet Controllers.

I'll fix up this commit log as I pull it.

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCH v3 2/2] net: Add mii_resolve_flowctrl_fdx()

[Joe Hershberger]

On Wed, Aug 9, 2017 at 11:25 AM,   wrote:
> From: Yuiko Oshino 
>
> Signed-off-by: Yuiko Oshino 

Acked-by: Joe Hershberger 
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[U-Boot] [PATCH v3 2/2] net: Add mii_resolve_flowctrl_fdx()

[yuiko.oshino]

From: Yuiko Oshino 

Signed-off-by: Yuiko Oshino 

---

Changes in v3:
   - This patch is added to a series.

Changes in v2:
   - The patch's tag is changed to net:.

 include/linux/mii.h | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/include/linux/mii.h b/include/linux/mii.h
index 66b83d8..19afb74 100644
--- a/include/linux/mii.h
+++ b/include/linux/mii.h
@@ -190,4 +190,27 @@ static inline unsigned int mii_duplex (unsigned int 
duplex_lock,
return 0;
 }
 
+/**
+ * mii_resolve_flowctrl_fdx
+ * @lcladv: value of MII ADVERTISE register
+ * @rmtadv: value of MII LPA register
+ *
+ * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
+ */
+static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
+{
+   u8 cap = 0;
+
+   if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
+   cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
+   } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
+   if (lcladv & ADVERTISE_PAUSE_CAP)
+   cap = FLOW_CTRL_RX;
+   else if (rmtadv & ADVERTISE_PAUSE_CAP)
+   cap = FLOW_CTRL_TX;
+   }
+
+   return cap;
+}
+
 #endif /* __LINUX_MII_H__ */
-- 
2.7.4


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[U-Boot] [PATCH v3 1/2] usb: net: Add support for Microchip LAN75xx and LAN78xx

[yuiko.oshino]

From: Yuiko Oshino 

Series-Changes: 3
   - All #ifdef CONFIG_DM_ETH and #endif are removed.
   - The lan7x_eth_recv() is modifed to correctly support the Driver Model
 and returns packet_en.
   - Add mii_resolve_flowctrl_fdx() patch in the series.

Series-Changes: 2
   - The wait_for_bit functions copy the real one.
   - Uses phylib
   - Unnecessary variables are removed
   - All return values are checked
   - Uses mii_resolve_flowctrl_fdx() from linux/mii.h

Signed-off-by: Yuiko Oshino 
---
Add support for Microchip LAN7500, LAN7800 and LAN7850,
USB to 10/100/1000 Ethernet Controllers.


 drivers/usb/Kconfig   |   2 +
 drivers/usb/eth/Kconfig   |  17 ++
 drivers/usb/eth/Makefile  |   2 +
 drivers/usb/eth/lan75xx.c | 318 +
 drivers/usb/eth/lan78xx.c | 477 
 drivers/usb/eth/lan7x.c   | 495 ++
 drivers/usb/eth/lan7x.h   | 230 +
 7 files changed, 1541 insertions(+)
 create mode 100644 drivers/usb/eth/Kconfig
 create mode 100644 drivers/usb/eth/lan75xx.c
 create mode 100644 drivers/usb/eth/lan78xx.c
 create mode 100644 drivers/usb/eth/lan7x.c
 create mode 100644 drivers/usb/eth/lan7x.h

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index da3ec2f..62126aa 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -94,4 +94,6 @@ endif
 
 source "drivers/usb/gadget/Kconfig"
 
+source "drivers/usb/eth/Kconfig"
+
 endif
diff --git a/drivers/usb/eth/Kconfig b/drivers/usb/eth/Kconfig
new file mode 100644
index 000..14cfa26
--- /dev/null
+++ b/drivers/usb/eth/Kconfig
@@ -0,0 +1,17 @@
+comment "USB to Ethernet Controller Drivers"
+
+config USB_ETHER_LAN75XX
+   bool "Microchip LAN75XX support"
+   ---help---
+ Say Y here if you would like to support Microchip LAN75XX Hi-Speed
+ USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
+
+config USB_ETHER_LAN78XX
+   bool "Microchip LAN78XX support"
+   ---help---
+ Say Y here if you would like to support Microchip LAN78XX USB 3.1
+ Gen 1 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile
index 4c44efc..4b935a3 100644
--- a/drivers/usb/eth/Makefile
+++ b/drivers/usb/eth/Makefile
@@ -9,4 +9,6 @@ obj-$(CONFIG_USB_ETHER_ASIX) += asix.o
 obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
 obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
 obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
+obj-$(CONFIG_USB_ETHER_LAN75XX) += lan7x.o lan75xx.o
+obj-$(CONFIG_USB_ETHER_LAN78XX) += lan7x.o lan78xx.o
 obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o r8152_fw.o
diff --git a/drivers/usb/eth/lan75xx.c b/drivers/usb/eth/lan75xx.c
new file mode 100644
index 000..a3c1411
--- /dev/null
+++ b/drivers/usb/eth/lan75xx.c
@@ -0,0 +1,318 @@
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/* LAN75xx specific register/bit defines */
+#define LAN75XX_HW_CFG_BIR BIT(7)
+
+#define LAN75XX_BURST_CAP  0x034
+
+#define LAN75XX_BULK_IN_DLY0x03C
+
+#define LAN75XX_RFE_CTL0x060
+
+#define LAN75XX_FCT_RX_CTL 0x090
+
+#define LAN75XX_FCT_TX_CTL 0x094
+
+#define LAN75XX_FCT_RX_FIFO_END0x098
+
+#define LAN75XX_FCT_TX_FIFO_END0x09C
+
+#define LAN75XX_FCT_FLOW   0x0A0
+
+/* MAC ADDRESS PERFECT FILTER For LAN75xx */
+#define LAN75XX_ADDR_FILTX 0x300
+#define LAN75XX_ADDR_FILTX_FB_VALIDBIT(31)
+
+/*
+ * Lan75xx infrastructure commands
+ */
+static int lan75xx_phy_gig_workaround(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+   int ret = 0;
+
+   /* Only internal phy */
+   /* Set the phy in Gig loopback */
+   lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
+(BMCR_LOOPBACK | BMCR_SPEED1000));
+
+   /* Wait for the link up */
+   ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
+ dev->phy_id, MII_BMSR, BMSR_LSTATUS,
+ true, PHY_CONNECT_TIMEOUT_MS, 1);
+   if (ret)
+   return ret;
+
+   /* phy reset */
+   return lan7x_pmt_phy_reset(udev, dev);
+}
+
+static int lan75xx_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+   uint32_t flow = 0, fct_flow = 0;
+   int ret;
+
+   ret = lan7x_update_flowcontrol(udev, dev, , _flow);
+   if (ret)
+   return 

Re: [U-Boot] [PATCH 3/3] apalis_t30: fix optional pcie port reset for reliable pcie operation

[Stephen Warren]

On 08/09/2017 08:53 AM, Marcel Ziswiler wrote:

Hi Stephen

On Tue, 2017-08-08 at 10:14 -0600, Stephen Warren wrote:

On 08/08/2017 06:43 AM, Marcel Ziswiler wrote:

From: Marcel Ziswiler 

Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
port are also left disabled in the device tree by default.

...

Also, how do
you know that the user isn't going to initialize PCIe multiple times and
expect the HW to get reset when they do?


Good question. However after having it implemented as requested below
keeping status and such it turns out there is no easy way to ever re-
initialise at least not with nowadays driver model in place (e.g. see
DM_FLAG_ACTIVATED in device_probe() of drivers/core/device.c). Or did I
miss anything?


I was naively assuming that "pci enum" would reset everything prior to 
re-enumeration. Perhaps it doesn't though; I didn't check the code.

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[U-Boot] [PATCH v2 1/3] apalis_t30: describe pcie ports

[Marcel Ziswiler]

From: Marcel Ziswiler 

Add some more comments describing the various PCIe ports available.

Signed-off-by: Marcel Ziswiler 
---

Changes in v2: None

 arch/arm/dts/tegra30-apalis.dts | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts
index 0b84dae..0852d8d 100644
--- a/arch/arm/dts/tegra30-apalis.dts
+++ b/arch/arm/dts/tegra30-apalis.dts
@@ -43,16 +43,19 @@
vddio-pex-ctl-supply = <_3v3_reg>;
hvdd-pex-supply = <_3v3_reg>;
 
+   /* Apalis Type Specific 4 Lane PCIe */
pci@1,0 {
/* TS_DIFF1/2/3/4 left disabled */
nvidia,num-lanes = <4>;
};
 
+   /* Apalis PCIe */
pci@2,0 {
/* PCIE1_RX/TX left disabled */
nvidia,num-lanes = <1>;
};
 
+   /* I210 Gigabit Ethernet Controller (On-module) */
pci@3,0 {
status = "okay";
nvidia,num-lanes = <1>;
-- 
2.9.4

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[U-Boot] [PATCH v2 0/3] fix apalis_t30 optional pcie operation

[Marcel Ziswiler]

This series addresses a PCIe reliability issue as observed on Apalis T30
related to a PCIe reset timing violation.

This series depends on Simon's work available at u-boot-dm/master plus
my previous series "move apalis t30/tk1, colibri t20/t30 to livetree"
and "fix apalis-tk1 pcie gigabit ethernet operation".

This series is available at 
http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next

Changes in v2:
- Leave resp. enable all port 0 pins input drivers as a customer may
  optionally want to use some of those MXM3 pins as inputs as well.
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.
- Improved the ifdef vs. if curly braces sequencing as suggested by
  Stephen.
- Keep PCIe port reset status in order to safeguard for future changes
  to the port reset order or even allow for re-initialisation should
  that ever be implemented in the higher levels of the driver model.

Marcel Ziswiler (3):
  apalis_t30: describe pcie ports
  apalis_t30: fix pcie port 0 and 1 pin muxing
  apalis_t30: fix optional pcie port reset for reliable pcie operation

 arch/arm/dts/tegra30-apalis.dts|  3 ++
 board/toradex/apalis_t30/Kconfig   |  9 
 board/toradex/apalis_t30/apalis_t30.c  | 54 ++
 .../toradex/apalis_t30/pinmux-config-apalis_t30.h  | 16 ---
 4 files changed, 75 insertions(+), 7 deletions(-)

-- 
2.9.4

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[U-Boot] [PATCH v2 2/3] apalis_t30: fix pcie port 0 and 1 pin muxing

[Marcel Ziswiler]

From: Marcel Ziswiler 

Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe
port 1 pin muxing.

Signed-off-by: Marcel Ziswiler 
---

Changes in v2:
- Leave resp. enable all port 0 pins input drivers as a customer may
  optionally want to use some of those MXM3 pins as inputs as well.

 board/toradex/apalis_t30/pinmux-config-apalis_t30.h | 16 +---
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/board/toradex/apalis_t30/pinmux-config-apalis_t30.h 
b/board/toradex/apalis_t30/pinmux-config-apalis_t30.h
index e0b00ea..a1e3bb6 100644
--- a/board/toradex/apalis_t30/pinmux-config-apalis_t30.h
+++ b/board/toradex/apalis_t30/pinmux-config-apalis_t30.h
@@ -285,17 +285,19 @@ static struct pmux_pingrp_config tegra3_pinmux_common[] = 
{
DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(SPI1_MISO_PX7, SPI1, NORMAL, NORMAL, INPUT),
 
-   DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, PCIE, NORMAL, NORMAL, INPUT),
-   DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, PCIE, NORMAL, NORMAL, OUTPUT),
-   DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT),
-   DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT),
+   DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0, RSVD2, NORMAL, NORMAL, INPUT),
+   DEFAULT_PINMUX(PEX_L0_RST_N_PDD1, RSVD2, NORMAL, NORMAL, INPUT),
+   DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, RSVD2, NORMAL, NORMAL, INPUT),
+
+   DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, RSVD2, DOWN, TRISTATE, OUTPUT), /* 
NC */
+   DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, RSVD2, DOWN, TRISTATE, OUTPUT), /* NC 
*/
+   DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, RSVD2, DOWN, TRISTATE, OUTPUT), /* 
NC */
 
-   DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4, PCIE, DOWN, TRISTATE, OUTPUT), /* 
NC */
-   DEFAULT_PINMUX(PEX_L1_RST_N_PDD5, PCIE, DOWN, TRISTATE, OUTPUT), /* NC 
*/
-   DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, DOWN, TRISTATE, OUTPUT), /* 
NC */
DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7, PCIE, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(PEX_L2_RST_N_PCC6, PCIE, NORMAL, NORMAL, OUTPUT),
DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT),
+   DEFAULT_PINMUX(PEX_WAKE_N_PDD3, PCIE, NORMAL, NORMAL, INPUT),
+
DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT),
DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, NORMAL, NORMAL, INPUT),
 
-- 
2.9.4

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[U-Boot] [PATCH v2 3/3] apalis_t30: fix optional pcie port reset for reliable pcie operation

[Marcel Ziswiler]

From: Marcel Ziswiler 

Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
port are also left disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler 
---

Changes in v2:
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.
- Improved the ifdef vs. if curly braces sequencing as suggested by
  Stephen.
- Keep PCIe port reset status in order to safeguard for future changes
  to the port reset order or even allow for re-initialisation should
  that ever be implemented in the higher levels of the driver model.

 board/toradex/apalis_t30/Kconfig  |  9 ++
 board/toradex/apalis_t30/apalis_t30.c | 54 +++
 2 files changed, 63 insertions(+)

diff --git a/board/toradex/apalis_t30/Kconfig b/board/toradex/apalis_t30/Kconfig
index 16224da..9cd4970 100644
--- a/board/toradex/apalis_t30/Kconfig
+++ b/board/toradex/apalis_t30/Kconfig
@@ -25,6 +25,15 @@ config TDX_CFG_BLOCK_PART
 config TDX_CFG_BLOCK_OFFSET
default "-512"
 
+config APALIS_T30_PCIE_EVALBOARD_INIT
+   bool "Apalis Evaluation Board PCIe Initialisation"
+   help
+ Bring up the Apalis type specific 4 lane PCIe port as well as the
+ Apalis PCIe port with the PCIe switch as found on the Apalis
+ Evaluation board. Note that by default both those ports are also left
+ disabled in the device tree which needs changing as well for this to
+ actually work.
+
 source "board/toradex/common/Kconfig"
 
 endif
diff --git a/board/toradex/apalis_t30/apalis_t30.c 
b/board/toradex/apalis_t30/apalis_t30.c
index 827eefd..60d1865 100644
--- a/board/toradex/apalis_t30/apalis_t30.c
+++ b/board/toradex/apalis_t30/apalis_t30.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "../common/tdx-common.h"
 
 #include "pinmux-config-apalis_t30.h"
@@ -23,6 +24,13 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PMU_I2C_ADDRESS0x2D
 #define MAX_I2C_RETRY  3
 
+#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
+#define PEX_PERST_NTEGRA_GPIO(S, 7) /* Apalis GPIO7 */
+#define RESET_MOCI_CTRLTEGRA_GPIO(I, 4)
+
+static int pci_reset_status;
+#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
+
 int arch_misc_init(void)
 {
if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
@@ -107,6 +115,52 @@ int tegra_pcie_board_init(void)
return err;
}
 
+#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
+   gpio_request(PEX_PERST_N, "PEX_PERST_N");
+   gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
+#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
+
return 0;
 }
+
+void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
+{
+   int index = tegra_pcie_port_index_of_port(port);
+   if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */
+   tegra_pcie_port_reset(port);
+   }
+#ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT
+   /*
+* Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port
+* 0 share the same RESET_MOCI therefore only assert it once for both
+* ports to avoid loosing the previously brought up port again.
+*/
+   else if ((index == 1) || (index == 0)) {
+   /* only do it once per init cycle */
+   if (pci_reset_status % 2 == 0) {
+   /*
+* Reset PLX PEX 8605 PCIe Switch plus PCIe devices on
+* Apalis Evaluation Board
+*/
+   gpio_direction_output(PEX_PERST_N, 0);
+   gpio_direction_output(RESET_MOCI_CTRL, 0);
+
+   /*
+* Must be asserted for 100 ms after power and clocks
+* are stable
+*/
+   mdelay(100);
+
+   gpio_set_value(PEX_PERST_N, 1);
+   /*
+* Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not
+* Guaranteed Until 900 us After PEX_PERST# De-assertion
+*/
+   mdelay(1);
+   gpio_set_value(RESET_MOCI_CTRL, 1);
+   }
+   pci_reset_status++;
+   }
+#endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */
+}
 #endif /* CONFIG_PCI_TEGRA */
-- 
2.9.4

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[U-Boot] [PATCH] arm: dts: am33xx: Remove redundant interrupt-parent property

[sunil . m]

From: Suniel Mahesh 

Upstream Linux has the Interrupt-parent property being removed
from mmc, mac, lcdc and tscadc sub nodes in the dtsi file.
Interrupt-parent property is already defined in the root node.
Therefore, update the dtsi to mimic this change and remove duplicates.

Signed-off-by: Suniel Mahesh 
---
Note:
- Compile tested on latest u-boot mainline tree no build issues.
- commit information upstream Linux:
  arm: dts: am33xx: Remove redundant interrupt-parent property
  sha1: de09eb52a1cceb6f80464a008c67c7bebb242314
---
 arch/arm/dts/am33xx.dtsi | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index b26e21b..14caee7 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -315,7 +315,6 @@
 25>;
dma-names = "tx", "rx";
interrupts = <64>;
-   interrupt-parent = <>;
reg = <0x4806 0x1000>;
status = "disabled";
};
@@ -328,7 +327,6 @@
 3>;
dma-names = "tx", "rx";
interrupts = <28>;
-   interrupt-parent = <>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
@@ -338,7 +336,6 @@
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
-   interrupt-parent = <>;
reg = <0x4781 0x1000>;
status = "disabled";
};
@@ -724,7 +721,6 @@
   0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
-   interrupt-parent = <>;
/*
 * c0_rx_thresh_pend
 * c0_rx_pend
@@ -787,7 +783,6 @@
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
-   interrupt-parent = <>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
@@ -796,7 +791,6 @@
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
-   interrupt-parent = <>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
-- 
1.9.1

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Re: [U-Boot] [PATCHv2 09/10] net: mvpp2x: remove TX drain from transmit routine

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> TX drain in transmit procedure could cause issues due
> to race between drain procedure and transmition of descriptor
> between AGGR TXQ and physical TXQ.
> TXQ will be cleared before moving to Linux by stop procedure.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Nadav Haklai 
> Reviewed-by: Igal Liberman 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCHv2 10/10] net: mvpp2x: Set BM poll size once during priv probe

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> Set BM poll size once during priv probe and do not
> overwrite it during port probe procedure. Pool is common for
> all CP ports.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Nadav Haklai 
> Reviewed-by: Igal Liberman 

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Re: [U-Boot] [PATCHv2 08/10] net: mvpp2x: Set BM pool high address

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> MVPP22 driver support 64 Bit arch and require BM pool
> high address configuration.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Nadav Haklai 
> Reviewed-by: Igal Liberman 

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Re: [U-Boot] [PATCHv2 07/10] net: mvpp2x: Remove IRQ configuration from U-Boot

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> Remove IRQ configuration from U-Boot PP driver.
> U-Boot don't use interrupts and configuration of IRQ in U-Boot
> caused crashes in Linux shared interrupt mode.
> Also interrupt use is redundant in RX routine since a single RX
> queue is used.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Nadav Haklai 
> Reviewed-by: Igal Liberman 

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Re: [U-Boot] [PATCHv2 06/10] net: mvpp2x: remove MBUS configurations from MvPP22 driver

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> MBUS driver were replaced by AXI in PPv22 and relevant
> only for PPv21.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Nadav Haklai 
> Reviewed-by: Igal Liberman 

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Re: [U-Boot] [PATCHv2 04/10] net: mvpp2x: fix BM configuration overrun issue

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> Issue:
> BM counters were overrun by probe that called per Network interface and
> caused release of wrong number of buffers during remove procedure.
>
> Fix:
> Use probe_done and num_ports to call init and remove procedure
> once per communication controller.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Igal Liberman 

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Re: [U-Boot] [PATCH 5/7] powerpc, 8xx: move FEC Ethernet driver in drivers/net

[Joe Hershberger]

On Thu, Jun 29, 2017 at 11:54 AM, Christophe Leroy
 wrote:
> Signed-off-by: Christophe Leroy 
> ---
>  README | 15 --
>  arch/powerpc/cpu/mpc8xx/Makefile   |  1 -
>  arch/powerpc/cpu/mpc8xx/cpu.c  |  2 +-
>  drivers/net/Kconfig| 58 
> ++
>  drivers/net/Makefile   |  1 +
>  .../cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c   | 18 ---
>  scripts/config_whitelist.txt   |  4 --
>  7 files changed, 60 insertions(+), 39 deletions(-)
>  rename arch/powerpc/cpu/mpc8xx/fec.c => drivers/net/mpc8xx_fec.c (98%)

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Re: [U-Boot] [PATCHv2 05/10] net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNK

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> U-boot use single physical tx queue with size 16 descriptors.
> So aggregated tx queue size should be equal to physical tx queue
> and cpu descriptor chunk(number of descriptors delivered from
> physical tx queue to aggregated tx queue by one chunk) shouldn't be
> larger than physical tx queue.
>
> Fix:
> Set AGGR_TXQ and CPU_DESC_CHUNK to be 16 descriptors, same as
> physical TXQ.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Nadav Haklai 
> Reviewed-by: Igal Liberman 

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[U-Boot] [PATCH v3 4/6] pci: tegra: introduce weak tegra_pcie_board_port_reset() function

[Marcel Ziswiler]

From: Marcel Ziswiler 

Introduce a weak tegra_pcie_board_port_reset() function by default
calling the existing tegra_pcie_port_reset() function. Additionally add
a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe
port index if required. This allows overriding the PCIe port reset
functionality from board specific code as e.g. required for Apalis T30
and Apalis TK1.

Signed-off-by: Marcel Ziswiler 
---

Changes in v3:
- Stick to struct tegra_pcie_port as suggested by Stephen.

Changes in v2:
- Incorporate Stephen's review feedback by introducing a
  tegra_pcie_port_index_of_port() function as well as a board-specific
  reset override function.

 drivers/pci/pci_tegra.c | 25 ++---
 include/pci_tegra.h | 11 +++
 2 files changed, 29 insertions(+), 7 deletions(-)
 create mode 100644 include/pci_tegra.h

diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index cb5cf8b..fba471a 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -893,21 +894,31 @@ static unsigned long tegra_pcie_port_get_pex_ctrl(struct 
tegra_pcie_port *port)
return ret;
 }
 
-static void tegra_pcie_port_reset(struct tegra_pcie_port *port)
+void tegra_pcie_port_reset(struct tegra_pcie_port *port)
 {
unsigned long ctrl = tegra_pcie_port_get_pex_ctrl(port);
unsigned long value;
 
/* pulse reset signel */
-   value = afi_readl(port->pcie, ctrl);
+   value = afi_readl(((struct tegra_pcie_port *)port)->pcie, ctrl);
value &= ~AFI_PEX_CTRL_RST;
-   afi_writel(port->pcie, value, ctrl);
+   afi_writel(((struct tegra_pcie_port *)port)->pcie, value, ctrl);
 
udelay(2000);
 
-   value = afi_readl(port->pcie, ctrl);
+   value = afi_readl(((struct tegra_pcie_port *)port)->pcie, ctrl);
value |= AFI_PEX_CTRL_RST;
-   afi_writel(port->pcie, value, ctrl);
+   afi_writel(((struct tegra_pcie_port *)port)->pcie, value, ctrl);
+}
+
+int tegra_pcie_port_index_of_port(struct tegra_pcie_port *port)
+{
+   return port->index;
+}
+
+void __weak tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
+{
+   tegra_pcie_port_reset(port);
 }
 
 static void tegra_pcie_port_enable(struct tegra_pcie_port *port)
@@ -928,7 +939,7 @@ static void tegra_pcie_port_enable(struct tegra_pcie_port 
*port)
 
afi_writel(pcie, value, ctrl);
 
-   tegra_pcie_port_reset(port);
+   tegra_pcie_board_port_reset(port);
 
if (soc->force_pca_enable) {
value = rp_readl(port, RP_VEND_CTL2);
@@ -979,7 +990,7 @@ static bool tegra_pcie_port_check_link(struct 
tegra_pcie_port *port)
} while (--timeout);
 
 retry:
-   tegra_pcie_port_reset(port);
+   tegra_pcie_board_port_reset(port);
} while (--retries);
 
return false;
diff --git a/include/pci_tegra.h b/include/pci_tegra.h
new file mode 100644
index 000..2bf1f59
--- /dev/null
+++ b/include/pci_tegra.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2017 Toradex, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+struct tegra_pcie_port;
+
+int tegra_pcie_port_index_of_port(struct tegra_pcie_port *port);
+
+void tegra_pcie_port_reset(struct tegra_pcie_port *port);
-- 
2.9.4

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[U-Boot] [PATCH v3 2/6] apalis-tk1: add missing as3722 gpio0 configuration

[Marcel Ziswiler]

From: Marcel Ziswiler 

As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module
explicitly configure it to high-impedance as well.

Signed-off-by: Marcel Ziswiler 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2:
- Add Simon's reviewed-by.

 arch/arm/dts/tegra124-apalis.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts
index 2fc0384..fe08d3e 100644
--- a/arch/arm/dts/tegra124-apalis.dts
+++ b/arch/arm/dts/tegra124-apalis.dts
@@ -1683,9 +1683,9 @@
bias-pull-up;
};
 
-   gpio1_3_4_5_6 {
-   pins = "gpio1", "gpio3", "gpio4",
-  "gpio5", "gpio6";
+   gpio0_1_3_4_5_6 {
+   pins = "gpio0", "gpio1", "gpio3",
+  "gpio4", "gpio5", "gpio6";
bias-high-impedance;
};
};
-- 
2.9.4

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[U-Boot] [PATCH v3 6/6] apalis-tk1: fix pcie reset for reliable gigabit ethernet operation

[Marcel Ziswiler]

From: Marcel Ziswiler 

It turns out that the current PCIe reset implementation in the PCIe
board init function is not quite working reliably due to PCIe reset
timing violations. Fix this by overriding the
tegra_pcie_board_port_reset() function.

Also allow optionally bringing up the PCIe switch as found on the Apalis
Evaluation board. Note however that the Apalis PCIe port is also left
disabled in the device tree by default.

Signed-off-by: Marcel Ziswiler 
---

Changes in v3:
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.

Changes in v2: None

 board/toradex/apalis-tk1/Kconfig  |   8 ++
 board/toradex/apalis-tk1/apalis-tk1.c | 249 +-
 2 files changed, 163 insertions(+), 94 deletions(-)

diff --git a/board/toradex/apalis-tk1/Kconfig b/board/toradex/apalis-tk1/Kconfig
index 05407ad..159b8fb 100644
--- a/board/toradex/apalis-tk1/Kconfig
+++ b/board/toradex/apalis-tk1/Kconfig
@@ -25,6 +25,14 @@ config TDX_CFG_BLOCK_PART
 config TDX_CFG_BLOCK_OFFSET
default "-512"
 
+config APALIS_TK1_PCIE_EVALBOARD_INIT
+   bool "Apalis Evaluation Board PCIe Initialisation"
+   help
+ Bring up the Apalis PCIe port with the PCIe switch as found on the
+ Apalis Evaluation board. Note that by default the PCIe port is also
+ left disabled in the device tree which needs changing as well for this
+ to actually work.
+
 source "board/toradex/common/Kconfig"
 
 endif
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c 
b/board/toradex/apalis-tk1/apalis-tk1.c
index 5de61e7..ca2d61d 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -5,17 +5,26 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 #include "../common/tdx-common.h"
 #include "pinmux-config-apalis-tk1.h"
 
-#define LAN_RESET_N TEGRA_GPIO(S, 2)
+#define LAN_DEV_OFF_N  TEGRA_GPIO(O, 6)
+#define LAN_RESET_NTEGRA_GPIO(S, 2)
+#define LAN_WAKE_N TEGRA_GPIO(O, 5)
+#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
+#define PEX_PERST_NTEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
+#define RESET_MOCI_CTRLTEGRA_GPIO(U, 4)
+#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
 
 int arch_misc_init(void)
 {
@@ -59,123 +68,175 @@ void pinmux_init(void)
 }
 
 #ifdef CONFIG_PCI_TEGRA
-int tegra_pcie_board_init(void)
+/* TODO: Convert to driver model */
+static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
 {
-   /* TODO: Convert to driver model
-   struct udevice *pmic;
int err;
 
-   err = as3722_init();
+   if (sd > 6)
+   return -EINVAL;
+
+   err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
if (err) {
-   error("failed to initialize AS3722 PMIC: %d\n", err);
+   error("failed to update SD control register: %d", err);
return err;
}
 
-   err = as3722_sd_enable(pmic, 4);
-   if (err < 0) {
-   error("failed to enable SD4: %d\n", err);
-   return err;
-   }
+   return 0;
+}
 
-   err = as3722_sd_set_voltage(pmic, 4, 0x24);
-   if (err < 0) {
-   error("failed to set SD4 voltage: %d\n", err);
-   return err;
-   }
+/* TODO: Convert to driver model */
+static int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
+{
+   int err;
+   u8 ctrl_reg = AS3722_LDO_CONTROL0;
 
-   err = as3722_gpio_configure(pmic, 1, AS3722_GPIO_OUTPUT_VDDH |
-AS3722_GPIO_INVERT);
-   if (err < 0) {
-   error("failed to configure GPIO#1 as output: %d\n", err);
-   return err;
-   }
+   if (ldo > 11)
+   return -EINVAL;
 
-   err = as3722_gpio_direction_output(pmic, 2, 1);
-   if (err < 0) {
-   error("failed to set GPIO#2 high: %d\n", err);
-   return err;
+   if (ldo > 7) {
+   ctrl_reg = AS3722_LDO_CONTROL1;
+   ldo -= 8;
}
-   */
 
-   /* Reset I210 Gigabit Ethernet Controller */
-   gpio_request(LAN_RESET_N, "LAN_RESET_N");
-   gpio_direction_output(LAN_RESET_N, 0);
-
-   /*
-* Make sure we don't get any back feeding from LAN_WAKE_N resp.
-* DEV_OFF_N
-*/
-   gpio_request(TEGRA_GPIO(O, 5), "LAN_WAKE_N");
-   gpio_direction_output(TEGRA_GPIO(O, 5), 0);
-
-   gpio_request(TEGRA_GPIO(O, 6), "LAN_DEV_OFF_N");
-   gpio_direction_output(TEGRA_GPIO(O, 6), 0);
-
-   /* Make sure LDO9 and LDO10 are initially enabled @ 0V */
-   /* TODO: Convert to driver model
-   err = as3722_ldo_enable(pmic, 9);
-   if (err < 0) {
-   error("failed to enable LDO9: %d\n", err);
-   return err;
- 

[U-Boot] [PATCH v3 0/6] fix apalis-tk1 pcie gigabit ethernet operation

[Marcel Ziswiler]

This series addresses a gigabit Ethernet reliability issue as observed
on Apalis TK1 related to a PCIe reset timing violation.

This series depends on Simon's work available at u-boot-dm/master plus
my previous series "move apalis t30/tk1, colibri t20/t30 to livetree".

This series is available at 
http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next

Changes in v3:
- Stick to struct tegra_pcie_port as suggested by Stephen.
- Introduce proper CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT Kconfig option
  as suggested by Stephen.

Changes in v2:
- Add Simon's reviewed-by.
- New bug fix.
- Incorporate Stephen's review feedback by introducing a
  tegra_pcie_port_index_of_port() function as well as a board-specific
  reset override function.

Marcel Ziswiler (5):
  apalis-tk1: add missing as3722 gpio0 configuration
  power: as3722: fix ldo_get/set_enable for ldo index bigger than 7
  pci: tegra: introduce weak tegra_pcie_board_port_reset() function
  power: as3722: add as3722_ldo_set_voltage signature to header file
  apalis-tk1: fix pcie reset for reliable gigabit ethernet operation

Sanchayan Maity (1):
  configs: apalis-tk1: fix boot failure using ext4 rootfs

 arch/arm/dts/tegra124-apalis.dts   |   6 +-
 board/toradex/apalis-tk1/Kconfig   |   8 +
 board/toradex/apalis-tk1/apalis-tk1.c  | 249 ++---
 drivers/pci/pci_tegra.c|  25 ++-
 drivers/power/regulator/as3722_regulator.c |  16 +-
 include/configs/apalis-tk1.h   |   4 +-
 include/pci_tegra.h|  11 ++
 include/power/as3722.h |   4 +-
 8 files changed, 214 insertions(+), 109 deletions(-)
 create mode 100644 include/pci_tegra.h

-- 
2.9.4

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[U-Boot] [PATCH v3 3/6] power: as3722: fix ldo_get/set_enable for ldo index bigger than 7

[Marcel Ziswiler]

From: Marcel Ziswiler 

Fix ldo_get_enable() and ldo_set_enable() functions for LDOs with an
index > 7. Turns out there are actually two separate AS3722_LDO_CONTROL
registers AS3722_LDO_CONTROL0 and AS3722_LDO_CONTROL1. Actually make use
of both. While at it also actually use the enable parameter of the
ldo_set_enable() function which now truly allows disabling as opposed to
only enabling LDOs.

Signed-off-by: Marcel Ziswiler 
---

Changes in v3: None
Changes in v2:
- New bug fix.

 drivers/power/regulator/as3722_regulator.c | 16 ++--
 include/power/as3722.h |  3 ++-
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/power/regulator/as3722_regulator.c 
b/drivers/power/regulator/as3722_regulator.c
index 3e1e6f1..eb4c465 100644
--- a/drivers/power/regulator/as3722_regulator.c
+++ b/drivers/power/regulator/as3722_regulator.c
@@ -69,10 +69,16 @@ static int ldo_set_value(struct udevice *dev, int uvolt)
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
struct udevice *pmic = dev_get_parent(dev);
+   u8 ctrl_reg = AS3722_LDO_CONTROL0;
int ldo = dev->driver_data;
int ret;
 
-   ret = pmic_clrsetbits(pmic, AS3722_LDO_CONTROL, 0, 1 << ldo);
+   if (ldo > 7) {
+   ctrl_reg = AS3722_LDO_CONTROL1;
+   ldo -= 8;
+   }
+
+   ret = pmic_clrsetbits(pmic, ctrl_reg, !enable << ldo, enable << ldo);
if (ret < 0) {
debug("%s: failed to write LDO control register: %d", __func__,
  ret);
@@ -85,10 +91,16 @@ static int ldo_set_enable(struct udevice *dev, bool enable)
 static int ldo_get_enable(struct udevice *dev)
 {
struct udevice *pmic = dev_get_parent(dev);
+   u8 ctrl_reg = AS3722_LDO_CONTROL0;
int ldo = dev->driver_data;
int ret;
 
-   ret = pmic_reg_read(pmic, AS3722_LDO_CONTROL);
+   if (ldo > 7) {
+   ctrl_reg = AS3722_LDO_CONTROL1;
+   ldo -= 8;
+   }
+
+   ret = pmic_reg_read(pmic, ctrl_reg);
if (ret < 0) {
debug("%s: failed to read SD control register: %d", __func__,
  ret);
diff --git a/include/power/as3722.h b/include/power/as3722.h
index cb4b188..b3dc7b6 100644
--- a/include/power/as3722.h
+++ b/include/power/as3722.h
@@ -14,7 +14,8 @@
 #define AS3722_SD_VOLTAGE(n) (0x00 + (n))
 #define AS3722_LDO_VOLTAGE(n) (0x10 + (n))
 #define AS3722_SD_CONTROL 0x4d
-#define AS3722_LDO_CONTROL 0x4e
+#define AS3722_LDO_CONTROL0 0x4e
+#define AS3722_LDO_CONTROL1 0x4f
 #define AS3722_ASIC_ID1 0x90
 #define AS3722_ASIC_ID2 0x91
 
-- 
2.9.4

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[U-Boot] [PATCH v3 5/6] power: as3722: add as3722_ldo_set_voltage signature to header file

[Marcel Ziswiler]

From: Marcel Ziswiler 

Just like the already present as3722_sd_set_voltage() add the currently
missing signature of the as3722_ldo_set_voltage() function to its header
file.

Signed-off-by: Marcel Ziswiler 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2:
- Add Simon's reviewed-by.

 include/power/as3722.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/power/as3722.h b/include/power/as3722.h
index b3dc7b6..128df49 100644
--- a/include/power/as3722.h
+++ b/include/power/as3722.h
@@ -26,5 +26,6 @@
 #define AS3722_GPIO_CONTROL_INVERT (1 << 7)
 
 int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value);
+int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value);
 
 #endif /* __POWER_AS3722_H__ */
-- 
2.9.4

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[U-Boot] [PATCH v3 1/6] configs: apalis-tk1: fix boot failure using ext4 rootfs

[Marcel Ziswiler]

From: Sanchayan Maity 

Trying to boot from an ext4 rootfs fails due to us defaulting to ext3.
While the downstream T20/T30 L4T kernel has issues with ext4 later TK1
L4T should work just fine with it. Hence enable ext4 for sdboot and
usbboot on TK1.

Signed-off-by: Sanchayan Maity 
Acked-by: Marcel Ziswiler 
---

Changes in v3: None
Changes in v2: None

 include/configs/apalis-tk1.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h
index d6b226c..bb46768 100644
--- a/include/configs/apalis-tk1.h
+++ b/include/configs/apalis-tk1.h
@@ -87,7 +87,7 @@
"&& setenv dtbparam ${fdt_addr_r}\0"
 
 #define SD_BOOTCMD \
-   "sdargs=ip=off root=/dev/mmcblk1p2 rw rootfstype=ext3 rootwait\0" \
+   "sdargs=ip=off root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait\0" \
"sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${setupargs} " \
"${vidargs}; echo Booting from SD card in 8bit slot...; " \
"run sddtbload; load mmc 1:1 ${kernel_addr_r} " \
@@ -98,7 +98,7 @@
"&& setenv dtbparam ${fdt_addr_r}\0"
 
 #define USB_BOOTCMD \
-   "usbargs=ip=off root=/dev/sda2 rw rootfstype=ext3 rootwait\0" \
+   "usbargs=ip=off root=/dev/sda2 rw rootfstype=ext4 rootwait\0" \
"usbboot=run setup; setenv bootargs ${defargs} ${setupargs} " \
"${usbargs} ${vidargs}; echo Booting from USB stick...; " \
"usb start && run usbdtbload; load usb 0:1 ${kernel_addr_r} " \
-- 
2.9.4

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Re: [U-Boot] [PATCHv2 03/10] net: mvpp2x: Enable GoP packet padding in TX

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> This patch enables padding of packets shorter than 64B in TX(set by default).
> Disabling of padding causes crashes on MACCIATO board.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Igal Liberman 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCHv2 02/10] net: mvpp2x: fix phy connected to wrong mdio issue

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> A8K marvell SoC has two South Bridge communication controllers(CP0 and CP1).
> Each communication controller has packet processor ports and MDIO.
> On MACHIATOBin board ports from CP1 are connected to mdio on CP0.
>
> Issue:
> Wrong base address is assigned to MDIO interface during probe.
>
> Fix:
> Get MDIO address from PHY handler parent base address.
>
> This should be refined in the future when MDIO driver is implemented.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Igal Liberman 

Acked-by: Joe Hershberger 
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Re: [U-Boot] [PATCHv2 01/10] net: mvpp2x: Add GPIO configuration support

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,   wrote:
> From: Stefan Chulski 
>
> This patch add GPIO configuration support in mvpp2x driver.
> Driver will handle 10G SFP gpio reset and SFP TX disable. GPIO pins should
> be set in device tree.
>
> Signed-off-by: Stefan Chulski 
> Tested-by: iSoC Platform CI 
> Reviewed-by: Kostya Porotchkin 
> Reviewed-by: Igal Liberman 

When a former version of a patch has been Acked, you should include it
in the next version.

Acked-by: Joe Hershberger 

> ---
>  drivers/net/mvpp2.c | 31 +++
>  1 file changed, 31 insertions(+)
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Re: [U-Boot] [PATCH 00/10] This patch set represent Marvell mvpp2 driver fixes

[Joe Hershberger]

On Wed, Aug 9, 2017 at 12:56 AM, Stefan Roese  wrote:
> Hi Joe,
>
> On 08.08.2017 17:57, Joe Hershberger wrote:
>>
>> Hi Stefan (and Stefan),
>>
>> On Tue, Aug 8, 2017 at 7:05 AM, Stefan Roese  wrote:
>>>
>>> Hi Joe,
>>>
>>> On 11.07.2017 10:04, Stefan Roese wrote:


 On 21.06.2017 10:31, stef...@malvell.com wrote:
>>
>>
>> Huh? Sent from a typo email address?
>
>
> Where is the problem with the Stefan Chulski's email address?
> Sorry, I can't spot it.

Just above and in the reply-to of the messages: stefanc@ma>l> That's pretty tedious. I
>> recommend fixing your git config. And if that's fine, I recommend
>> using patman so this won't happen again.
>>
>
> From: Stefan Chulski 
>
> Issues were found during internal QA phase.
>
> Stefan Chulski (10):
> net: mvpp2x: Add GPIO configuration support
> net: mvpp2x: fix phy connected to wrong mdio issue
> net: mvpp2x: Enable GoP packet padding in TX
> net: mvpp2x: fix BM configuration overrun issue
> net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNK
> net: mvpp2x: remove MBUS configurations from MvPP22 driver
> net: mvpp2x: Remove IRQ configuration from u-boot
> net: mvpp2x: Set BM pool high address
> net: mvpp2x: remove TX drain from transmit routine
> net: mvpp2x: Set BM poll size once during priv probe
>
>drivers/net/mvpp2.c | 189
> ++--
>1 file changed, 94 insertions(+), 95 deletions(-)



 Joe, do you have any comments on these mvpp2 patches?
>>>
>>>
>>>
>>> Gently ping on these patches again. Joe, do you have any comments
>>> on these? Do you want to take these patches via your tree? Or
>>> should I push them if you don't have any objections?
>>
>>
>> Reviewing now. I generally use patchwork to remember what I have to
>> do. I guess if I didn't rely on that I would set up better work queue
>> email filters. Sorry for the delay.
>>
>> I figured since the series is assigned to you in PW, that you wanted
>> it through your tree. I'm fine either way.
>
>
> I assume that Tom assigned them to me (I didn't do it at least).
> But I can definitely pull these patches via the Marvell tree, once
> all open issues are resolved and all patches have your Acked-by
> tag.

Sounds good!

> Thanks for the review!
>
> Thanks,
> Stefan
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Re: [U-Boot] Please pull u-boot-cfi-flash/master

[Tom Rini]

On Tue, Aug 08, 2017 at 02:32:27PM +0200, Stefan Roese wrote:

> Hi Tom,
> 
> please pull the following small cleanup from Marek in the
> flash.h header.
> 
> Thanks,
> Stefan
> 
> 
> The following changes since commit eaa90e5df2a4a1cb12fb73571978a9379242d0b5:
> 
>   common/env_embedded.c: rename PPCENV/PPCTEXT macros (2017-08-04 20:38:39 
> -0400)
> 
> are available in the git repository at:
> 
>   git://www.denx.de/git/u-boot-cfi-flash.git 
> 
> for you to fetch changes up to bd2d489e248dada86a557c8d2ee4f914a2b0c8eb:
> 
>   mtd: cfi: Zap CFI_FLASH_SHIFT_WIDTH redefinition (2017-08-08 14:29:48 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Please pull u-boot-x86

[Tom Rini]

On Tue, Aug 08, 2017 at 09:29:19PM +0800, Bin Meng wrote:

> Hi Tom,
> 
> The following changes since commit eaa90e5df2a4a1cb12fb73571978a9379242d0b5:
> 
>   common/env_embedded.c: rename PPCENV/PPCTEXT macros (2017-08-04
> 20:38:39 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-x86.git
> 
> for you to fetch changes up to 6a5691e297fc44a7c963b15903828fed33d40ba0:
> 
>   x86: Add defconfig for theadorable-x86-conga with PCIe x4 blobs
> (2017-08-08 21:13:07 +0800)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] Please pull u-boot-marvell/master

[Tom Rini]

On Tue, Aug 08, 2017 at 02:26:59PM +0200, Stefan Roese wrote:

> Hi Tom,
> 
> please pull the following mvebu board fix from Marek.
> 
> Thanks,
> Stefan
> 
> 
> The following changes since commit eaa90e5df2a4a1cb12fb73571978a9379242d0b5:
> 
>   common/env_embedded.c: rename PPCENV/PPCTEXT macros (2017-08-04 20:38:39 
> -0400)
> 
> are available in the git repository at:
> 
>   git://www.denx.de/git/u-boot-marvell.git 
> 
> for you to fetch changes up to 8daa3468b52f89e069bca469a68b866c2583a4a5:
> 
>   mvebu: turris_omnia: Fix PEX vs SATA detection for board topology 
> (2017-08-08 14:20:26 +0200)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] [PATCH 00/39] dm: sata: Complete driver-model support for SATA

[Tom Rini]

On Fri, Aug 04, 2017 at 03:34:10AM -0600, Simon Glass wrote:
> Hi Jaehoon,
> 
> On 30 July 2017 at 20:46, Jaehoon Chung  wrote:
> > Hi Simon,
> >
> > On 07/28/2017 11:40 PM, Simon Glass wrote:
> >> Hi Jaehoon,
> >>
> >> On 28 July 2017 at 06:25, Jaehoon Chung  wrote:
> >>> Dear Simon,
> >>>
> >>> On 07/27/2017 11:43 AM, Jaehoon Chung wrote:
>  On 07/23/2017 02:15 AM, Simon Glass wrote:
> > (pruning the cc list a bit)
> >
> > Hi Jaehoon,
> >
> > On 4 July 2017 at 13:48, Simon Glass  wrote:
> >> This series completes the conversion of SATA to driver model.
> >>
> >> Previous work converted SCSI including the SCSI-based SATA driver. This
> >> series converts the AHCI uclass itself, adding operations and adjusting
> >> the 'sata' command to work correctly.
> >>
> >> An existing board (Compulab Utilite) is used for this work. It uses 
> >> SATA
> >> without the SCSI layer. Unfortunately this board does not currently use
> >> driver model for MMC or USB, nor does it include a device tree. 
> >> Therefore
> >> additional patches are included in this series to convert this over. 
> >> Note
> >> that USB is rendered inoperative since the relevant device-tree nodes 
> >> are
> >> disabled. Further work is needed here (e.g. by the board maintainer) 
> >> but
> >> it is well beyond the objective of this series.
> >>
> >> A long-standing niggle with MMC has been the CONFIG_DM_MMC_OPS option.
> >> This was introduced to allow driver model to handle MMC operations 
> >> rather
> >> than having them in struct mmc. This was needed since the original 
> >> uclass
> >> did not have support for operations.
> >>
> >> At present i.MX is the only SoC that defines CONFIG_DM_MMC without
> >> CONFIG_DM_MMC_OPS. With this driver converted, the option is no longer
> >> necessary so this series takes the opportunity to drop that option.
> >
> > Are you planning to review / apply this series please? It is assigned
> > to you in patchwork. I'd like to resolve this because I have two other
> > series depending on it
> 
>  Sorry..I had holidays..will check this week.
> >>>
> >>> Apologized for late..I'm checking this patchset and testing with my board.
> >>> (But there is some conflict...so i needs to check more...what i missed.)
> >>
> >> If you like I could rebase it and resend. The series is at
> >> u-boot-dm/ata2-working.
> >
> > Thanks for resending v2!
> 
> Do you think this can go in soon? Are there any problems / comments to 
> address?
> 
> We are already after rc1 so I am getting a bit nervous!

Yes, I would like to see this come in ASAP, thanks!

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Re: [U-Boot] [U-Boot, v0, 07/20] vsprintf.c: add wide string (%ls) support

[Rob Clark]

On Wed, Aug 9, 2017 at 9:48 AM, Alexander Graf  wrote:
>
>
>> Am 09.08.2017 um 14:38 schrieb Rob Clark :
>>
>>> On Tue, Aug 8, 2017 at 6:03 PM, Heinrich Schuchardt  
>>> wrote:
 On 08/04/2017 09:31 PM, Rob Clark wrote:

 @@ -528,8 +549,13 @@ repeat:
  continue;

  case 's':
 - str = string(str, end, va_arg(args, char *),
 -  field_width, precision, flags);
 + if (qualifier == 'l') {
>>>
>>> %ls refers to wchar with implementation dependent width in the C standard.
>>> There is no qualifier for 16-bit wchar. Couldn't we use %us here in
>>> reference to the u-notation ( u'MyString' ). This would leave the path
>>> open for a standard compliant '%ls'.
>>>
>>
>> So two drawbacks I'm running into when converting to c11 u"string"
>> style, compared to the -fshort-wchar:
>>
>> 1) with -fshort-wchar plus %ls, gcc knows how to typecheck the
>> printf/sprintf/etc args
>> 2) introducing a non-standard conversion character (since there
>> doesn't seem to be a standard one) means we need to drop -Wformat
>>
>> So far, afaict, the only argument against -fshort-wchar seems to be
>> that someday ext4 might support utf32 filenames?  (And really
>> -fshort-wchar doesn't preclude that.  So I'm not sure this is a valid
>> argument.)
>>
>> So independent of c11 (which might be a good idea for other reasons),
>> I'm back to thinking we should use -fshort-wchar.  Possibly as a
>> kconfig option that EFI_LOADER selects.. or possibly just
>> unconditionally.
>>
>> Thoughts?
>
> If we select it, I'd rather have it be unconditional, to not oprn potential 
> for undetected breakage.
>

I could go either way on kconfig option vs unconditional
-fshort-wchar.  Although as far as breakage, that seems pretty
solvable by adding a fallback.efi -> grub.efi test, and maybe
something that exercises device-path-to-text, in travis.

I suppose it might be useful, for example, for TINY_PRINTF to depend
on !CC_SHORT_WCHAR?  Not sure.

I'll include a patch w/ kconfig option in my patchset for now, but
happy to drop it if folks want to do -fshort-wchar unconditionally.

BR,
-R
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Re: [U-Boot] [PATCH] ARM: dts: ethernut5: Fix the build warning

[Tom Rini]

On Tue, Aug 08, 2017 at 08:50:33AM +0800, Wenyou Yang wrote:

> Fix the building warning as below:

Reviewed-by: Tom Rini 

But you need to submit this for Linux as well, thanks!

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Re: [U-Boot] [U-Boot, v0, 07/20] vsprintf.c: add wide string (%ls) support

[Alexander Graf]

> Am 09.08.2017 um 14:38 schrieb Rob Clark :
> 
>> On Tue, Aug 8, 2017 at 6:03 PM, Heinrich Schuchardt  
>> wrote:
>>> On 08/04/2017 09:31 PM, Rob Clark wrote:
>>> 
>>> @@ -528,8 +549,13 @@ repeat:
>>>  continue;
>>> 
>>>  case 's':
>>> - str = string(str, end, va_arg(args, char *),
>>> -  field_width, precision, flags);
>>> + if (qualifier == 'l') {
>> 
>> %ls refers to wchar with implementation dependent width in the C standard.
>> There is no qualifier for 16-bit wchar. Couldn't we use %us here in
>> reference to the u-notation ( u'MyString' ). This would leave the path
>> open for a standard compliant '%ls'.
>> 
> 
> So two drawbacks I'm running into when converting to c11 u"string"
> style, compared to the -fshort-wchar:
> 
> 1) with -fshort-wchar plus %ls, gcc knows how to typecheck the
> printf/sprintf/etc args
> 2) introducing a non-standard conversion character (since there
> doesn't seem to be a standard one) means we need to drop -Wformat
> 
> So far, afaict, the only argument against -fshort-wchar seems to be
> that someday ext4 might support utf32 filenames?  (And really
> -fshort-wchar doesn't preclude that.  So I'm not sure this is a valid
> argument.)
> 
> So independent of c11 (which might be a good idea for other reasons),
> I'm back to thinking we should use -fshort-wchar.  Possibly as a
> kconfig option that EFI_LOADER selects.. or possibly just
> unconditionally.
> 
> Thoughts?

If we select it, I'd rather have it be unconditional, to not oprn potential for 
undetected breakage.

Alex

> 
> BR,
> -R

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Re: [U-Boot] [PATCH 1/1] i2c: add i2c driver for stm32

[Patrice CHOTARD]

Hi Heiko

On 08/09/2017 06:10 AM, Heiko Schocher wrote:
> Hi Simon, Patrice,
> 
> Am 06.08.2017 um 07:15 schrieb Simon Glass:
>> Hi Patrice,
>>
>> On 25 July 2017 at 10:02,   wrote:
>>> From: Patrice Chotard 
>>>
>>> Add i2c driver which can be used on both STM32F7 and STM32H7.
>>> This I2C block supports the following features:
>>>   _ Slave and master modes
>>>   _ Multimaster capability
>>>   _ Standard-mode (up to 100 kHz)
>>>   _ Fast-mode (up to 400 kHz)
>>>   _ Fast-mode Plus (up to 1 MHz)
>>>   _ 7-bit and 10-bit addressing mode
>>>   _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable 
>>> mask)
>>>   _ All 7-bit addresses acknowledge mode
>>>   _ General call
>>>   _ Programmable setup and hold times
>>>   _ Easy to use event management
>>>   _ Optional clock stretching
>>>   _ Software reset
>>>
>>> Signed-off-by: Christophe Kerello 
>>> Signed-off-by: Patrice Chotard 
>>> ---
>>>   doc/device-tree-bindings/i2c/i2c-stm32.txt |  30 ++
>>>   drivers/i2c/Kconfig|   7 +
>>>   drivers/i2c/Makefile   |   1 +
>>>   drivers/i2c/stm32f7_i2c.c  | 839 
>>> +
>>>   4 files changed, 877 insertions(+)
>>>   create mode 100644 doc/device-tree-bindings/i2c/i2c-stm32.txt
>>>   create mode 100644 drivers/i2c/stm32f7_i2c.c
>>>
> [...]
>>> diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
>>> new file mode 100644
>>> index 000..255b38a
>>> --- /dev/null
>>> +++ b/drivers/i2c/stm32f7_i2c.c
>>> @@ -0,0 +1,839 @@
>>> +/*
>>> + * (C) Copyright 2017 STMicroelectronics
>>> + *
>>> + * SPDX-License-Identifier:GPL-2.0+
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#include 
>>> +#include 
>>> +
>>> +/* STM32 I2C registers */
>>> +struct stm32_i2c_regs {
>>> +   u32 cr1;/* I2C control register 1 */
>>> +   u32 cr2;/* I2C control register 2 */
>>> +   u32 oar1;   /* I2C own address 1 register */
>>> +   u32 oar2;   /* I2C own address 2 register */
>>> +   u32 timingr;/* I2C timing register */
>>> +   u32 timeoutr;   /* I2C timeout register */
>>> +   u32 isr;/* I2C interrupt and status register */
>>> +   u32 icr;/* I2C interrupt clear register */
>>> +   u32 pecr;   /* I2C packet error checking register */
>>> +   u32 rxdr;   /* I2C receive data register */
>>> +   u32 txdr;   /* I2C transmit data register */
>>> +};
>>> +
>>> +#define STM32_I2C_CR1  0x00
>>> +#define STM32_I2C_CR2  0x04
>>
>> Do you really need these STM32_I2C prefixes?
> 
> Why not? I think this makes it clearer reading the drivers code.
> Beside of this, I am in sync with Simons comments.
> 
> @Patrice: Can you prepare a v2 please? Thanks!

V2 is in the pipe ;-)

Thanks

Patrice

> 
> bye,
> Heiko
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Re: [U-Boot] [U-Boot, v0, 07/20] vsprintf.c: add wide string (%ls) support

[Rob Clark]

On Tue, Aug 8, 2017 at 6:03 PM, Heinrich Schuchardt  wrote:
> On 08/04/2017 09:31 PM, Rob Clark wrote:
>>
>> @@ -528,8 +549,13 @@ repeat:
>>   continue;
>>
>>   case 's':
>> - str = string(str, end, va_arg(args, char *),
>> -  field_width, precision, flags);
>> + if (qualifier == 'l') {
>
> %ls refers to wchar with implementation dependent width in the C standard.
> There is no qualifier for 16-bit wchar. Couldn't we use %us here in
> reference to the u-notation ( u'MyString' ). This would leave the path
> open for a standard compliant '%ls'.
>

So two drawbacks I'm running into when converting to c11 u"string"
style, compared to the -fshort-wchar:

1) with -fshort-wchar plus %ls, gcc knows how to typecheck the
printf/sprintf/etc args
2) introducing a non-standard conversion character (since there
doesn't seem to be a standard one) means we need to drop -Wformat

So far, afaict, the only argument against -fshort-wchar seems to be
that someday ext4 might support utf32 filenames?  (And really
-fshort-wchar doesn't preclude that.  So I'm not sure this is a valid
argument.)

So independent of c11 (which might be a good idea for other reasons),
I'm back to thinking we should use -fshort-wchar.  Possibly as a
kconfig option that EFI_LOADER selects.. or possibly just
unconditionally.

Thoughts?

BR,
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[U-Boot] [PATCH 1/1] stm32f1: remove stm32f1 support

[patrice.chotard]

From: Patrice Chotard 

A few years ago STM32F1 SoCs support has been added :
0144caf22ce6acd5c  gpio: stm32: add stm32f1 support
2d18ef2364fd3561a  ARMv7M: add STM32F1 support

But neither STM32F1 dedicated defconfig nor board was
associated to these commits.

Got confirmation from Tom Rini and Matt Porter to remove
all this code [1]

[1] http://u-boot.10912.n7.nabble.com/Remove-STM32F1-support-td301603.html

Signed-off-by: Patrice Chotard 
---
 arch/arm/include/asm/arch-stm32f1/gpio.h  | 118 --
 arch/arm/include/asm/arch-stm32f1/stm32.h | 124 ---
 arch/arm/mach-stm32/Kconfig   |   4 -
 arch/arm/mach-stm32/Makefile  |   1 -
 arch/arm/mach-stm32/stm32f1/Kconfig   |   3 -
 arch/arm/mach-stm32/stm32f1/Makefile  |  14 ---
 arch/arm/mach-stm32/stm32f1/clock.c   | 196 --
 arch/arm/mach-stm32/stm32f1/flash.c   | 180 ---
 arch/arm/mach-stm32/stm32f1/soc.c |  36 --
 arch/arm/mach-stm32/stm32f1/timer.c   | 121 --
 drivers/gpio/stm32_gpio.c |  94 --
 include/flash.h   |   1 -
 12 files changed, 892 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-stm32f1/gpio.h
 delete mode 100644 arch/arm/include/asm/arch-stm32f1/stm32.h
 delete mode 100644 arch/arm/mach-stm32/stm32f1/Kconfig
 delete mode 100644 arch/arm/mach-stm32/stm32f1/Makefile
 delete mode 100644 arch/arm/mach-stm32/stm32f1/clock.c
 delete mode 100644 arch/arm/mach-stm32/stm32f1/flash.c
 delete mode 100644 arch/arm/mach-stm32/stm32f1/soc.c
 delete mode 100644 arch/arm/mach-stm32/stm32f1/timer.c

diff --git a/arch/arm/include/asm/arch-stm32f1/gpio.h 
b/arch/arm/include/asm/arch-stm32f1/gpio.h
deleted file mode 100644
index 8e8712f..000
--- a/arch/arm/include/asm/arch-stm32f1/gpio.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * (C) Copyright 2011
- * Yuri Tikhonov, Emcraft Systems, y...@emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, 
- *
- * Copyright 2015 ATS Advanced Telematics Systems GmbH
- * Copyright 2015 Konsulko Group, Matt Porter 
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-
-enum stm32_gpio_port {
-   STM32_GPIO_PORT_A = 0,
-   STM32_GPIO_PORT_B,
-   STM32_GPIO_PORT_C,
-   STM32_GPIO_PORT_D,
-   STM32_GPIO_PORT_E,
-   STM32_GPIO_PORT_F,
-   STM32_GPIO_PORT_G,
-};
-
-enum stm32_gpio_pin {
-   STM32_GPIO_PIN_0 = 0,
-   STM32_GPIO_PIN_1,
-   STM32_GPIO_PIN_2,
-   STM32_GPIO_PIN_3,
-   STM32_GPIO_PIN_4,
-   STM32_GPIO_PIN_5,
-   STM32_GPIO_PIN_6,
-   STM32_GPIO_PIN_7,
-   STM32_GPIO_PIN_8,
-   STM32_GPIO_PIN_9,
-   STM32_GPIO_PIN_10,
-   STM32_GPIO_PIN_11,
-   STM32_GPIO_PIN_12,
-   STM32_GPIO_PIN_13,
-   STM32_GPIO_PIN_14,
-   STM32_GPIO_PIN_15
-};
-
-enum stm32_gpio_icnf {
-   STM32_GPIO_ICNF_AN = 0,
-   STM32_GPIO_ICNF_IN_FLT,
-   STM32_GPIO_ICNF_IN_PUD,
-   STM32_GPIO_ICNF_RSVD
-};
-
-enum stm32_gpio_ocnf {
-   STM32_GPIO_OCNF_GP_PP = 0,
-   STM32_GPIO_OCNF_GP_OD,
-   STM32_GPIO_OCNF_AF_PP,
-   STM32_GPIO_OCNF_AF_OD
-};
-
-enum stm32_gpio_pupd {
-   STM32_GPIO_PUPD_DOWN = 0,
-   STM32_GPIO_PUPD_UP,
-};
-
-enum stm32_gpio_mode {
-   STM32_GPIO_MODE_IN = 0,
-   STM32_GPIO_MODE_OUT_10M,
-   STM32_GPIO_MODE_OUT_2M,
-   STM32_GPIO_MODE_OUT_50M
-};
-
-enum stm32_gpio_af {
-   STM32_GPIO_AF0 = 0,
-   STM32_GPIO_AF1,
-   STM32_GPIO_AF2,
-   STM32_GPIO_AF3,
-   STM32_GPIO_AF4,
-   STM32_GPIO_AF5,
-   STM32_GPIO_AF6,
-   STM32_GPIO_AF7,
-   STM32_GPIO_AF8,
-   STM32_GPIO_AF9,
-   STM32_GPIO_AF10,
-   STM32_GPIO_AF11,
-   STM32_GPIO_AF12,
-   STM32_GPIO_AF13,
-   STM32_GPIO_AF14,
-   STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
-   enum stm32_gpio_portport;
-   enum stm32_gpio_pin pin;
-};
-
-struct stm32_gpio_ctl {
-   enum stm32_gpio_icnficnf;
-   enum stm32_gpio_ocnfocnf;
-   enum stm32_gpio_modemode;
-   enum stm32_gpio_pupdpupd;
-   enum stm32_gpio_af  af;
-};
-
-static inline unsigned stm32_gpio_to_port(unsigned gpio)
-{
-   return gpio / 16;
-}
-
-static inline unsigned stm32_gpio_to_pin(unsigned gpio)
-{
-   return gpio % 16;
-}
-
-int stm32_gpio_config(const struct stm32_gpio_dsc *gpio_dsc,
-   const struct stm32_gpio_ctl *gpio_ctl);
-int stm32_gpout_set(const struct stm32_gpio_dsc *gpio_dsc, int state);
-
-#endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f1/stm32.h 
b/arch/arm/include/asm/arch-stm32f1/stm32.h
deleted file mode 100644
index 1af73c5..000
--- a/arch/arm/include/asm/arch-stm32f1/stm32.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2011
- * Yuri 

[U-Boot] [patch v2 05/13] imx: introduce mkimage_fit.sh

[Peng Fan]

Introduce mkimage_fit.sh which is modifed from
board/sunxi/mksunxi_fit_atf.sh.
ATF is dropped and modified for arm32 arch.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 arch/arm/mach-imx/mkimage_fit.sh | 63 
 1 file changed, 63 insertions(+)
 create mode 100755 arch/arm/mach-imx/mkimage_fit.sh

diff --git a/arch/arm/mach-imx/mkimage_fit.sh b/arch/arm/mach-imx/mkimage_fit.sh
new file mode 100755
index 000..18628de
--- /dev/null
+++ b/arch/arm/mach-imx/mkimage_fit.sh
@@ -0,0 +1,63 @@
+#!/bin/sh
+#
+# script to generate FIT image source for 32-bit imx boards with
+# multiple device trees (given on the command line)
+#
+# usage: $0  [ [;
+
+   images {
+   uboot@1 {
+   description = "U-Boot (32-bit)";
+   data = /incbin/("u-boot-nodtb.bin");
+   type = "standalone";
+   arch = "arm32";
+   compression = "none";
+   load = <0x1780>;
+   };
+__HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+   cat << __FDT_IMAGE_EOF
+   fdt@$cnt {
+   description = "$(basename $dtname .dtb)";
+   data = /incbin/("$dtname");
+   type = "flat_dt";
+   compression = "none";
+   };
+__FDT_IMAGE_EOF
+   cnt=$((cnt+1))
+done
+
+cat << __CONF_HEADER_EOF
+   };
+   configurations {
+   default = "config@1";
+
+__CONF_HEADER_EOF
+
+cnt=1
+for dtname in $*
+do
+   cat << __CONF_SECTION_EOF
+   config@$cnt {
+   description = "$(basename $dtname .dtb)";
+   firmware = "uboot@1";
+   fdt = "fdt@$cnt";
+   };
+__CONF_SECTION_EOF
+   cnt=$((cnt+1))
+done
+
+cat << __ITS_EOF
+   };
+};
+__ITS_EOF
-- 
2.6.2

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Re: [U-Boot] [PATCH] scripts: spl: fix typo

[Peng Fan]

> -Original Message-
> From: Peng Fan
> Sent: Tuesday, August 08, 2017 9:31 AM
> To: tr...@konsulko.com
> Cc: van.free...@gmail.com; u-boot@lists.denx.de; Peng Fan
> 
> Subject: [PATCH] scripts: spl: fix typo
> 
> Typo fix: CONIFG->CONFIG

Drop this patch. It is included in patchset "imx: mx6sabresd: support SPL FIT"

Thanks,
Peng.
> 
> Signed-off-by: Peng Fan 
> Cc: Tom Rini 
> ---
>  scripts/Makefile.uncmd_spl | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl index
> 15d0836..b399411 100644
> --- a/scripts/Makefile.uncmd_spl
> +++ b/scripts/Makefile.uncmd_spl
> @@ -9,7 +9,7 @@ ifdef CONFIG_SPL_BUILD
>  ifndef CONFIG_SPL_DM
>  CONFIG_DM_SERIAL=
>  CONFIG_DM_GPIO=
> -CONIFG_DM_I2C=
> +CONFIG_DM_I2C=
>  CONFIG_DM_SPI=
>  CONFIG_DM_SPI_FLASH=
>  endif
> --
> 2.6.2

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[U-Boot] [patch v2 13/13] imx: mx6sabresd: update README

[Peng Fan]

Update README since we use FIT now.

Signed-off-by: Peng Fan 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 board/freescale/mx6sabresd/README | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/board/freescale/mx6sabresd/README 
b/board/freescale/mx6sabresd/README
index 4b4df06..8b10fe7 100644
--- a/board/freescale/mx6sabresd/README
+++ b/board/freescale/mx6sabresd/README
@@ -21,15 +21,15 @@ $ make mx6sabresd_defconfig
 
 $ make
 
-This will generate the SPL and u-boot.img binaries.
+This will generate the SPL and u-boot.itb binaries.
 
 - Flash the SPL binary into the SD card:
 
 $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync
 
-- Flash the u-boot.img binary into the SD card:
+- Flash the u-boot.itb binary into the SD card:
 
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync
+$ sudo dd if=u-boot.itb of=/dev/sdX bs=1K seek=69 && sync
 
 
 2. Booting from eMMC
@@ -39,7 +39,7 @@ $ make mx6sabresd_defconfig
 
 $ make
 
-This will generate the SPL and u-boot.img binaries.
+This will generate the SPL and u-boot.itb binaries.
 
 - Boot first from SD card as shown in the previous section
 
@@ -51,10 +51,10 @@ Mount the eMMC in the host PC:
 
 => ums 0 mmc 2
 
-- Flash SPL and u-boot.img binaries into the eMMC:
+- Flash SPL and u-boot.itb binaries into the eMMC:
 
 $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 && sync
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 && sync
+$ sudo dd if=u-boot.itb of=/dev/sdX bs=1K seek=69 && sync
 
 Set SW6 to eMMC 8-bit boot: 11010110
 
@@ -65,15 +65,15 @@ Set SW6 to eMMC 8-bit boot: 11010110
 $ make mx6sabresd_defconfig
 $ make
 
-This will generate the SPL image called SPL and the u-boot.img.
+This will generate the SPL image called SPL and the u-boot.itb.
 
 - Flash the SPL image into the SD card:
 
 $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 oflag=sync status=none && sync
 
-- Flash the u-boot.img image into the SD card:
+- Flash the u-boot.itb image into the SD card:
 
-$ sudo dd if=u-boot.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none && 
sync
+$ sudo dd if=u-boot.itb of=/dev/sdX bs=1K seek=69 oflag=sync status=none && 
sync
 
 Create a partition for root file system and extract it there:
 
-- 
2.6.2

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[U-Boot] [patch v2 11/13] board: freescale: common: add pfuze dm code

[Peng Fan]

Add pfuze dm code, this code does the same thing as pfuze.c, but
only effects when CONFIG_$(SPL_)DM_PMIC_PFUZE100 enabled.

Signed-off-by: Peng Fan 
Cc: York Sun 
Cc: Jaehoon Chung 
Cc: Stefano Babic 
---
 board/freescale/common/Makefile   |  1 +
 board/freescale/common/pfuze.h|  5 +++
 board/freescale/common/pfuze_dm.c | 89 +++
 3 files changed, 95 insertions(+)
 create mode 100644 board/freescale/common/pfuze_dm.c

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 1c53fb6..620dced 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_VSC_CROSSBAR)+= vsc3316_3308.o
 obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
 obj-$(CONFIG_ZM7300)   += zm7300.o
 obj-$(CONFIG_POWER_PFUZE100)   += pfuze.o
+obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100)   += pfuze_dm.o
 obj-$(CONFIG_POWER_MC34VR500)  += mc34vr500.o
 
 obj-$(CONFIG_LS102XA_STREAM_ID)+= ls102xa_stream_id.o
diff --git a/board/freescale/common/pfuze.h b/board/freescale/common/pfuze.h
index 53cfc99..9c4c92a 100644
--- a/board/freescale/common/pfuze.h
+++ b/board/freescale/common/pfuze.h
@@ -7,7 +7,12 @@
 #ifndef __PFUZE_BOARD_HELPER__
 #define __PFUZE_BOARD_HELPER__
 
+#if CONFIG_IS_ENABLED(DM_PMIC_PFUZE100)
+struct udevice *pfuze_common_init(void);
+int pfuze_mode_init(struct udevice *dev, u32 mode);
+#else
 struct pmic *pfuze_common_init(unsigned char i2cbus);
 int pfuze_mode_init(struct pmic *p, u32 mode);
+#endif
 
 #endif
diff --git a/board/freescale/common/pfuze_dm.c 
b/board/freescale/common/pfuze_dm.c
new file mode 100644
index 000..c6af627
--- /dev/null
+++ b/board/freescale/common/pfuze_dm.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+int pfuze_mode_init(struct udevice *dev, u32 mode)
+{
+   unsigned char offset, i, switch_num;
+   u32 id;
+   int ret;
+
+   id = pmic_reg_read(dev, PFUZE100_DEVICEID);
+   id = id & 0xf;
+
+   if (id == 0) {
+   switch_num = 6;
+   offset = PFUZE100_SW1CMODE;
+   } else if (id == 1) {
+   switch_num = 4;
+   offset = PFUZE100_SW2MODE;
+   } else {
+   printf("Not supported, id=%d\n", id);
+   return -EINVAL;
+   }
+
+   ret = pmic_reg_write(dev, PFUZE100_SW1ABMODE, mode);
+   if (ret < 0) {
+   printf("Set SW1AB mode error!\n");
+   return ret;
+   }
+
+   for (i = 0; i < switch_num - 1; i++) {
+   ret = pmic_reg_write(dev, offset + i * SWITCH_SIZE, mode);
+   if (ret < 0) {
+   printf("Set switch 0x%x mode error!\n",
+  offset + i * SWITCH_SIZE);
+   return ret;
+   }
+   }
+
+   return ret;
+}
+
+struct udevice *pfuze_common_init(void)
+{
+   struct udevice *dev;
+   int ret;
+   unsigned int reg, dev_id, rev_id;
+
+   ret = pmic_get("pfuze100", );
+   if (ret == -ENODEV)
+   return NULL;
+
+   dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
+   rev_id = pmic_reg_read(dev, PFUZE100_REVID);
+   printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
+
+   /* Set SW1AB stanby volage to 0.975V */
+   reg = pmic_reg_read(dev, PFUZE100_SW1ABSTBY);
+   reg &= ~SW1x_STBY_MASK;
+   reg |= SW1x_0_975V;
+   pmic_reg_write(dev, PFUZE100_SW1ABSTBY, reg);
+
+   /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+   reg = pmic_reg_read(dev, PFUZE100_SW1ABCONF);
+   reg &= ~SW1xCONF_DVSSPEED_MASK;
+   reg |= SW1xCONF_DVSSPEED_4US;
+   pmic_reg_write(dev, PFUZE100_SW1ABCONF, reg);
+
+   /* Set SW1C standby voltage to 0.975V */
+   reg = pmic_reg_read(dev, PFUZE100_SW1CSTBY);
+   reg &= ~SW1x_STBY_MASK;
+   reg |= SW1x_0_975V;
+   pmic_reg_write(dev, PFUZE100_SW1CSTBY, reg);
+
+   /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+   reg = pmic_reg_read(dev, PFUZE100_SW1CCONF);
+   reg &= ~SW1xCONF_DVSSPEED_MASK;
+   reg |= SW1xCONF_DVSSPEED_4US;
+   pmic_reg_write(dev, PFUZE100_SW1CCONF, reg);
+
+   return dev;
+}
-- 
2.6.2

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[U-Boot] [patch v2 06/13] imx: mx6sabresd: implement board_fit_config_name_match

[Peng Fan]

Implement board_fit_config_name_match.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Fabio Estevam 
---
 board/freescale/mx6sabresd/mx6sabresd.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index e416042..ff99a30 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -734,6 +734,19 @@ int spl_start_uboot(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+   if (is_mx6dq() && !strcmp(name, "imx6q-sabresd"))
+   return 0;
+   else if (is_mx6sdl() && !strcmp(name, "imx6dl-sabresd"))
+   return 0;
+   else if (is_mx6dqp() && !strcmp(name, "imx6qp-sabresd"))
+   return 0;
+   return -EINVAL;
+}
+#endif
+
 static void ccgr_init(void)
 {
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-- 
2.6.2

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[U-Boot] [patch v2 12/13] imx: mx6sabresd: enable dm drivers

[Peng Fan]

Enable DM MMC/I2C/PMIC/GPIO/REGULATOR.

Signed-off-by: Peng Fan 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 board/freescale/mx6sabresd/mx6sabresd.c | 326 +---
 configs/mx6sabresd_defconfig|  15 ++
 include/configs/mx6sabresd.h|  15 +-
 3 files changed, 146 insertions(+), 210 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c 
b/board/freescale/mx6sabresd/mx6sabresd.c
index ff99a30..845b5b5 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -24,7 +23,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include "../common/pfuze.h"
@@ -46,14 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
  PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
 
-#define I2C_PAD_CTRL  (PAD_CTL_PUS_100K_UP |   \
-   PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |   \
-   PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
-#define I2C_PMIC   1
-
-#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
-
 #define DISP0_PWR_EN   IMX_GPIO_NR(1, 21)
 
 #define KEY_VOL_UP IMX_GPIO_NR(1, 4)
@@ -93,6 +83,7 @@ static void setup_iomux_enet(void)
 {
SETUP_IOMUX_PADS(enet_pads);
 
+   gpio_request(IMX_GPIO_NR(1, 25), "phy_rst");
/* Reset AR8031 PHY */
gpio_direction_output(IMX_GPIO_NR(1, 25) , 0);
mdelay(10);
@@ -100,47 +91,6 @@ static void setup_iomux_enet(void)
udelay(100);
 }
 
-static iomux_v3_cfg_t const usdhc2_pads[] = {
-   IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_NANDF_D4__SD2_DATA4  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_NANDF_D5__SD2_DATA5  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_NANDF_D6__SD2_DATA6  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_NANDF_D7__SD2_DATA7  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), 
/* CD */
-};
-
-static iomux_v3_cfg_t const usdhc3_pads[] = {
-   IOMUX_PADS(PAD_SD3_CLK__SD3_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_CMD__SD3_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_NANDF_D0__GPIO2_IO00| MUX_PAD_CTRL(NO_PAD_CTRL)), /* 
CD */
-};
-
-static iomux_v3_cfg_t const usdhc4_pads[] = {
-   IOMUX_PADS(PAD_SD4_CLK__SD4_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_CMD__SD4_CMD   | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-   IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-};
-
 static iomux_v3_cfg_t const ecspi1_pads[] = {
IOMUX_PADS(PAD_KEY_COL0__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)),
IOMUX_PADS(PAD_KEY_COL1__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)),
@@ -187,6 +137,7 @@ static iomux_v3_cfg_t const bl_pads[] = {
 static void enable_backlight(void)
 {
SETUP_IOMUX_PADS(bl_pads);
+   gpio_request(DISP0_PWR_EN, "disp0_pwr_en");
gpio_direction_output(DISP0_PWR_EN, 1);
 }
 
@@ -201,32 +152,6 @@ static void enable_lvds(struct display_info_t const *dev)
enable_backlight();
 }
 
-static struct i2c_pads_info mx6q_i2c_pad_info1 = {
-   .scl = {
-   .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
- 

[U-Boot] [patch v2 08/13] scripts: spl: Disable DM MMC when SPL DM not enabled

[Peng Fan]

Disable DM MMC when SPL DM not enabled.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Simon Glass 
---
 scripts/Makefile.uncmd_spl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl
index b399411..983686f 100644
--- a/scripts/Makefile.uncmd_spl
+++ b/scripts/Makefile.uncmd_spl
@@ -12,6 +12,7 @@ CONFIG_DM_GPIO=
 CONFIG_DM_I2C=
 CONFIG_DM_SPI=
 CONFIG_DM_SPI_FLASH=
+CONFIG_DM_MMC=
 endif
 
 endif
-- 
2.6.2

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[U-Boot] [patch v2 10/13] power: pmic.h: include dm/ofnode.h

[Peng Fan]

Include dm/ofnode.h.

Signed-off-by: Peng Fan 
Cc: Simon Glass 
Cc: Stefano Babic 
---
 include/power/pmic.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/power/pmic.h b/include/power/pmic.h
index 4b34316..f2fe537 100644
--- a/include/power/pmic.h
+++ b/include/power/pmic.h
@@ -11,6 +11,7 @@
 #ifndef __CORE_PMIC_H_
 #define __CORE_PMIC_H_
 
+#include 
 #include 
 #include 
 #include 
-- 
2.6.2

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[U-Boot] [patch v2 09/13] mmc: fsl_esdhc: switch to use CONFIG_IS_ENABLED

[Peng Fan]

Switch to use CONFIG_IS_ENABLED.

Signed-off-by: Peng Fan 
Cc: Jaehoon Chung 
Cc: Stefano Babic 
---
 drivers/mmc/fsl_esdhc.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3abd2d3..5a1c7aa 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -107,7 +107,7 @@ struct fsl_esdhc_priv {
int non_removable;
int wp_enable;
int vs18_enable;
-#ifdef CONFIG_DM_GPIO
+#if CONFIG_IS_ENABLED(DM_GPIO)
struct gpio_desc cd_gpio;
struct gpio_desc wp_gpio;
 #endif
@@ -690,10 +690,10 @@ static int esdhc_getcd(struct mmc *mmc)
return 1;
 #endif
 
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
if (priv->non_removable)
return 1;
-#ifdef CONFIG_DM_GPIO
+#if CONFIG_IS_ENABLED(DM_GPIO)
if (dm_gpio_is_valid(>cd_gpio))
return dm_gpio_get_value(>cd_gpio);
 #endif
@@ -825,7 +825,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)
return 0;
 }
 
-#ifndef CONFIG_DM_MMC
+#if !CONFIG_IS_ENABLED(DM_MMC)
 static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg,
 struct fsl_esdhc_priv *priv)
 {
@@ -956,7 +956,7 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
 }
 #endif
 
-#ifdef CONFIG_DM_MMC
+#if CONFIG_IS_ENABLED(DM_MMC)
 #include 
 __weak void init_clk_usdhc(u32 index)
 {
@@ -992,7 +992,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->non_removable = 1;
 } else {
priv->non_removable = 0;
-#ifdef CONFIG_DM_GPIO
+#if CONFIG_IS_ENABLED(DM_GPIO)
gpio_request_by_name_nodev(offset_to_ofnode(node), "cd-gpios",
   0, >cd_gpio, GPIOD_IS_IN);
 #endif
@@ -1000,7 +1000,7 @@ static int fsl_esdhc_probe(struct udevice *dev)
 
priv->wp_enable = 1;
 
-#ifdef CONFIG_DM_GPIO
+#if CONFIG_IS_ENABLED(DM_GPIO)
ret = gpio_request_by_name_nodev(offset_to_ofnode(node), "wp-gpios", 0,
 >wp_gpio, GPIOD_IS_IN);
if (ret)
-- 
2.6.2

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