Re: [U-Boot] [PATCH v8 4/7] arm: socfpga: Enable FPGA driver on SPL

On 06/19/2017 05:32 AM, Chee, Tien Fong wrote: > On Sel, 2017-06-13 at 11:05 +0200, Marek Vasut wrote: >> On 06/13/2017 05:26 AM, Chee, Tien Fong wrote: >>> >>> On Isn, 2017-06-12 at 16:38 +0800, Chee, Tien Fong wrote: >>>> >>>> O

Re: [U-Boot] [PATCH 05/20] usb: hub: Update handling connect status/change in usb_scan_port()

nh, maybe he can test it on SoCFPGA. > I tested this patch on a SoCFPGA Atlas/DE0-Nano board, and USB is still working fine. Feel free to add: Tested-by: Dinh Nguyen <dingu...@kernel.org> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [PATCH v10 5/6] drivers: Enable FPGA driver build on SPL

On 06/07/2017 11:33 PM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Enable FPGA driver build for SPL because FPGA driver is needed for SPL > to configure and getting DDR up before loading U-boot into DDR and > booting from there. > > FPGA driver build

Re: [U-Boot] [PATCH v5 3/5] arm: socfpga: Enable FPGA driver on SPL

On 05/23/2017 01:25 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Enable FPGA driver build for SPL. FPGA driver is needed for SPL > to configure and getting DDR up before loading U-boot into DDR and > booting from there. > > Signed-off-by: Tien Fong

Re: [U-Boot] [PATCH v6 0/6] Add Intel Arria 10 SoC FPGA driver

On 05/23/2017 09:24 PM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > This is the 6th version of patchset to adds support for Intel Arria 10 SoC > FPGA > driver. This version mainly resolved comments from Dinh in [v5]. > This series is working on top of

Re: [U-Boot] [PATCH v6 0/6] Add Intel Arria 10 SoC FPGA driver

On 05/26/2017 03:48 AM, Chee, Tien Fong wrote: >> >> So the patch for using CONFIG_SPL_FPGA_SUPPORT is causing this build >> error. Please investigate. >> >> Dinh > > Hi Dinh, > > I have tried with both u-boot.git and u-boot-socfpga.git lastest > version, i can't still reproduce the issue u

Re: [U-Boot] [PATCH v4 3/5] arm: socfpga: Enable FPGA driver on SPL

On 05/18/2017 11:14 PM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Enable FPGA driver build for SPL. FPGA driver is needed for SPL > to configure and getting DDR up before loading U-boot into DDR and > booting from there. > > Signed-off-by: Tien Fong

Re: [U-Boot] [PATCH v4 3/5] arm: socfpga: Enable FPGA driver on SPL

On 05/22/2017 09:23 AM, Dinh Nguyen wrote: > > > On 05/18/2017 11:14 PM, tien.fong.c...@intel.com wrote: >> From: Tien Fong Chee <tien.fong.c...@intel.com> >> >> Enable FPGA driver build for SPL. FPGA driver is needed for SPL >> to configure and gettin

Re: [U-Boot] [PATCH v4 2/5] arm: socfpga: Restructure FPGA driver in the preparation to support A10.

On 05/18/2017 11:14 PM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Move FPGA driver which is Gen5 specific code into Gen5 driver file > and keeping common FPGA driver er intact. All the changes are still keeping remove the 'er'. Also remove the

Re: [U-Boot] [PATCH v6 0/6] Add Intel Arria 10 SoC FPGA driver

On 05/25/2017 03:53 AM, Chee, Tien Fong wrote: > On Rab, 2017-05-24 at 09:56 -0500, Dinh Nguyen wrote: >> >> On 05/23/2017 09:24 PM, tien.fong.c...@intel.com wrote: >>> >>> From: Tien Fong Chee <tien.fong.c...@intel.com> >>> >>> This is th

Re: [U-Boot] [PATCH v7 0/6] Add Intel Arria 10 SoC FPGA driver

100644 arch/arm/mach-socfpga/fpga_manager.c > create mode 100644 arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h > copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h => > fpga_manager_gen5.h} (57%) > create mode 100644 drivers/fpga/socfpga_arria10.c > copy drivers/

Re: [U-Boot] [PATCH v8 4/7] arm: socfpga: Enable FPGA driver on SPL

On 06/09/2017 03:25 AM, Marek Vasut wrote: > > I didn't really look since we still have a discussion open on V8 . There > is no point in sending new versions while discussion is still open. > Also, I'd like some review from Ley/Dinh I've reviewed v6 and gave my Reviewed-by. Now I see there's a

Re: [U-Boot] [PATCH v2 03/14] arm: socfpga: stratix10: Add Reset Manager driver for Stratix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add Reset Manager driver support for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/Makefile | 1 +

Re: [U-Boot] [PATCH v2 02/14] arm: socfpga: stratix10: Add Clock Manager driver for Stratix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add Clock Manager driver support for Stratix SoC > > Signed-off-by: Chin Liang See > -- > Changes in v2 > - Declared defines for constant value used >

Re: [U-Boot] [PATCH v2 04/14] arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC

nmux_config_s10.c | 55 +++ > 5 files changed, 321 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h > create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c > create mode 100644 arch/arm/mach-socfpga/wrap_pi

Re: [U-Boot] [PATCH v2 05/14] arm: socfpga: stratix10: Add misc support for Stratix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add misc support such as EMAC and cpu info printout for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/Makefile

Re: [U-Boot] [PATCH v2 06/14] arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add mailbox support for Stratix SoC > > Signed-off-by: Ley Foon Tan > Signed-off-by: Chin Liang See > --- >

Re: [U-Boot] [PATCH v2 08/14] arm: dts: Add dts for Stratix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Device tree for Stratix10 SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/dts/Makefile| 3 +- >

Re: [U-Boot] [PATCH v3 03/20] arm: socfpga: Add Arria 10 SoCFPGA programming interface

Please run get_maintainer on this patch. I think you need to include a few more people. On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Add code necessary into the FPGA driver framework in U-Boot > so it can be used via the 'fpga'

Re: [U-Boot] [PATCH v3 07/20] arm: socfpga: Fix with the correct polling status bit

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") > Polling the wrong status bit. Fix with correct polling status bit. This message doesn't reflect what the

Re: [U-Boot] [PATCH v3 08/20] arm: socfpga: Add drivers for programing FPGA from flash

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > These drivers handle FPGA program operation from flash loading > RBF to memory and then to program FPGA. > > Signed-off-by: Tien Fong Chee > --- >

Re: [U-Boot] [PATCH v2 11/14] arm: socfpga: stratix10: Add timer support for Stratix10 SoC

++- > 1 file changed, 16 insertions(+), 1 deletion(-) > Reviewed-by: Dinh Nguyen <dingu...@kernel.org> Dinh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [PATCH v2 09/14] arm: socfpga: Restructure the SPL file

46 > 3 files changed, 109 insertions(+), 47 deletions(-) > create mode 100644 arch/arm/mach-socfpga/spl_a10.c > rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (83%) > Reviewed-by: Dinh Nguyen <dingu...@kernel.org> Dinh __

Re: [U-Boot] [PATCH v2 10/14] arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC

On 10/05/2017 08:07 AM, chin.liang@intel.com wrote: > From: Chin Liang See > > Add SPL driver support for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/Makefile| 4 + >

Re: [U-Boot] [PATCH v2 06/14] arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC

On 10/05/2017 08:07 AM, chin.liang@intel.com wrote: > From: Chin Liang See > > Add mailbox support for Stratix SoC > > Signed-off-by: Ley Foon Tan > Signed-off-by: Chin Liang See > --- >

Re: [U-Boot] [PATCH v3 12/20] configs: Add DDR Kconfig support for Arria 10

onfig | 1 + > drivers/ddr/altera/Kconfig| 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Dinh Nguyen <dingu...@kernel.org> Dinh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [PATCH v3 13/20] arm: socfpga: Enable SPL memory allocation

lt;tien.fong.c...@intel.com> > --- > include/configs/socfpga_common.h | 22 +- > 1 file changed, 21 insertions(+), 1 deletion(-) > Reviewed-by: Dinh Nguyen <dingu...@kernel.org> Dinh ___ U-Boot mailing list U-B

Re: [U-Boot] [PATCH v3 11/20] arm: socfpga: Add DDR driver for Arria 10

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Add DDR driver suppport for Arria 10. s/suppport/support > > Signed-off-by: Tien Fong Chee > --- > arch/arm/mach-socfpga/include/mach/sdram.h |

Re: [U-Boot] [PATCH v3 06/20] common: Generic firmware loader for file system

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Generic firmware loader framework contains some common functionality > which is reusable by any specific file system firmware loader. > > Signed-off-by: Tien Fong Chee

Re: [U-Boot] [PATCH 02/14] arm: dts: Add dts for Stratix10 SoC

On Tue, Sep 19, 2017 at 4:22 AM, wrote: > From: Chin Liang See > > Device tree for Stratix10 SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/dts/Makefile| 3 +- >

Re: [U-Boot] [PATCH 03/14] arm: socfpga: stratix10: Add Clock Manager driver for Stratix10 SoC

On Tue, Sep 19, 2017 at 4:22 AM, wrote: > From: Chin Liang See > > Add Clock Manager driver support for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/Makefile | 4

Re: [U-Boot] [PATCH 02/14] arm: dts: Add dts for Stratix10 SoC

On Tue, Sep 19, 2017 at 4:22 AM, wrote: > From: Chin Liang See > > Device tree for Stratix10 SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/dts/Makefile| 3 +- >

Re: [U-Boot] [PATCH 04/14] arm: socfpga: stratix10: Add Reset Manager driver for Stratix10 SoC

On Tue, Sep 19, 2017 at 4:22 AM, wrote: > From: Chin Liang See > > Add Reset Manager driver support for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/Makefile | 1

Re: [U-Boot] [PATCH 06/14] arm: socfpga: stratix10: Add misc support for Stratix10 SoC

On Tue, Sep 19, 2017 at 4:22 AM, wrote: > From: Chin Liang See > > Add misc support for Stratix SoC Just because the file is call misc.c doesn't mean you can just keep the commit message that simple. Can you add what functions are you adding?

Re: [U-Boot] [PATCH 04/14] arm: socfpga: stratix10: Add Reset Manager driver for Stratix10 SoC

On Fri, Sep 29, 2017 at 7:53 AM, See, Chin Liang <chin.liang@intel.com> wrote: > On Tue, 2017-09-26 at 17:08 -0500, Dinh Nguyen wrote: >> On Tue, Sep 19, 2017 at 4:22 AM, <chin.liang@intel.com> wrote: >> > >> > From: Chin Liang See <chin.liang.

Re: [U-Boot] [PATCH v2 01/14] arm: socfpga: stratix10: Add base address map for Statix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add the base address map for Statix10 SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 56 >

Re: [U-Boot] [PATCH v2 13/14] board: altera: stratix10: Add socdk board support for Stratix10 SoC

-socdk/MAINTAINERS > @@ -0,0 +1,7 @@ > +SOCFPGA BOARD > +M: Chin-Liang See <chin.liang@intel.com> > +M: Dinh Nguyen <dinh.ngu...@intel.com> Use dingu...@kernel.org please. Dinh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [PATCH v2 12/14] ddr: altera: stratix10: Add DDR support for Stratix10 SoC

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add DDR support for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/mach-socfpga/include/mach/sdram_s10.h | 333 +

Re: [U-Boot] [PATCH v2 14/14] arm: socfpga: stratix10: Enable Stratix10 SoC build

On Thu, Oct 5, 2017 at 8:07 AM, wrote: > From: Chin Liang See > > Add build support for Stratix SoC > > Signed-off-by: Chin Liang See > --- > arch/arm/Kconfig | 8 +- >

Re: [U-Boot] [PATCH v2 06/14] arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC

On Wed, Oct 11, 2017 at 4:33 AM, Dinh Nguyen <dingu...@kernel.org> wrote: > > > On 10/05/2017 08:07 AM, chin.liang@intel.com wrote: >> From: Chin Liang See <chin.liang@intel.com> >> >> Add mailbox support for Stratix SoC >> >> Signed-off-

Re: [U-Boot] dwc2: usb: Unable to clear channel error

On 10/23/2017 09:03 AM, Minas Harutyunyan wrote: > On 10/19/2017 5:35 PM, Dinh Nguyen wrote: >> >> >> On 10/19/2017 06:55 AM, Grigor Tovmasyan wrote: >>> On 10/18/2017 6:07 PM, Marek Vasut wrote: >>>> On 10/18/2017 04:05 PM, Dinh Nguyen wrote: >>&g

Re: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree

On 10/19/2017 10:51 AM, Marek Vasut wrote: > On 10/19/2017 05:36 PM, Eugeniy Paltsev wrote: >> On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote: >>> On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin >>> wrote: Hi Jagan, > -Original Message-

Re: [U-Boot] [PATCH] ARM SOCFPGA: add resetmgr command so reset can be deasserted in bootcmd (for example on peripheral dma interfaces after fpga has been programmed).

Hi Frank, Thanks for the patch. Just a few notes: Please reformat your patch to a commit header and commit message. For example, this patch should be like this: arm: socfpga: add resetmgr command Add resetmgr command so reset can be deasserted in bootcmd (for example on peripheral dma

Re: [U-Boot] [PATCH v2 0/3] drivers: Add reset ctrl to drivers

On Fri, May 4, 2018 at 5:49 AM, Ley Foon Tan wrote: > Add reset ctrl to dwmmc socfpga, designware Ethernet and ns16550 serial > drivers. > > A reset property is an optional feature, so only print out a warning and > do not fail if a reset property is not present. > > If a

Re: [U-Boot] [RFC] spl: dw_mmc_socfpga: udevice structure is NULL in SPL

On 04/25/2018 09:26 PM, Ley Foon Tan wrote: > On Thu, Apr 26, 2018 at 10:24 AM, Dinh Nguyen <dingu...@kernel.org> wrote: >> Hi, >> >> I am trying to add support for the sdmmc driver to use the reset manager >> driver in SPL. But I'm noticing that t

Re: [U-Boot] [U-Boot, v3, 1/3] mmc: dwmmc: socfpga: Add reset ctrl to driver

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/25/2018 06:16 AM, Tom Rini wrote: > On Fri, May 25, 2018 at 10:45:53AM +0800, Ley Foon Tan wrote: >> On Thu, May 24, 2018 at 8:39 PM, Tom Rini >> wrote: >>> On Tue, May 08, 2018 at 11:19:24AM +0800, Ley Foon Tan wrote: >>> Add code to

[U-Boot] [RFC] spl: dw_mmc_socfpga: udevice structure is NULL in SPL

Hi, I am trying to add support for the sdmmc driver to use the reset manager driver in SPL. But I'm noticing that the udevice struct dev that passed into socfpga_dwmmc_probe() is NULL, thus, I can't use the reset_get_by_() functions to get the reset information because it needs the dev structure

Re: [U-Boot] [PATCH v3 18/20] arm: socfpga: Enable function visible to other file

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Enable function visible to other file, so it can be used by other > functions from other file. Huh? What function? What other file? Why? Please bear in mind for future patches, when

Re: [U-Boot] [PATCH v3 14/20] arm: socfpga: Improve comments for Intel SoCFPGA program header

nclude/mach/boot0.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Dinh Nguyen <dingu...@kernel.org> Dinh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [PATCH v3 17/20] arm: socfpga: Adding SoCFPGA info for both SPL and U-boot

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > SoC FPGA info is required in both SPL and U-boot. s/SoC FPGA/SocFPGA to be consistent. s/U-boot/U-Boot > > Signed-off-by: Tien Fong Chee > --- >

Re: [U-Boot] [PATCH v3 15/20] arm: socfpga: Enhance Intel SoCFPGA program header to support Arria 10

; > Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com> > --- > arch/arm/mach-socfpga/include/mach/boot0.h | 7 +++ > 1 file changed, 7 insertions(+) > Reviewed-by: Dinh Nguyen <dingu...@kernel.org> Dinh ___

Re: [U-Boot] [PATCH v3 16/20] arm: socfpga: Adding clock frequency info for U-boot

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Clock frequency info is required in U-boot. We know this patch is for U-Boot, don't need to state it in the commit message. Also, it's "U-Boot", not "U-boot". > > Signed-off-by: Tien

Re: [U-Boot] [PATCH v3 20/20] arm: socfpga: Enable SPL booting U-boot

On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Enable SPL successfully boot to U-boot. s/U-boot/U-Boot > > Signed-off-by: Tien Fong Chee > --- > configs/socfpga_arria10_defconfig | 57 >

Re: [U-Boot] [PATCH v3 19/20] arm: socfpga: Enable DDR working

Please update your commit header. On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > SPL configures DDR by programming peripheral raw binary file > and calibrating DDR. > > Signed-off-by: Tien Fong Chee > ---

Re: [U-Boot] [PATCH v3 18/20] arm: socfpga: Enable function visible to other file

On 10/23/2017 03:19 AM, Chee, Tien Fong wrote: > On Jum, 2017-10-20 at 09:39 -0500, Dinh Nguyen wrote: >> >> On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote: >>> >>> From: Tien Fong Chee <tien.fong.c...@intel.com> >>> >>> Enable f

Re: [U-Boot] [PATCH 5/5] arm: dts: socfpga: stratix10: update pdma

On 07/10/2018 08:11 AM, Chee, Tien Fong wrote: > On Mon, 2018-07-09 at 22:28 +0200, Marek Vasut wrote: >> On 07/09/2018 08:03 PM, Dinh Nguyen wrote: >>> >>> >>> >>> On 05/31/2018 03:08 AM, tien.fong.c...@intel.com wrote: >>>> &g

Re: [U-Boot] [PATCH] ARM: dts: socfpga: Adjust NAND register layout on Arria10

On 05/29/2018 11:36 AM, Marek Vasut wrote: > Adjust the NAND register size on Arria10 to reflect reality. > > Signed-off-by: Marek Vasut > Cc: Chin Liang See > Cc: Dinh Nguyen > --- > arch/arm/dts/socfpga_arria10.dtsi | 4 ++-- > 1 file changed, 2 insertions(+),

Re: [U-Boot] [PATCH 5/5] arm: dts: socfpga: stratix10: update pdma

On 05/31/2018 03:08 AM, tien.fong.c...@intel.com wrote: > From: Tien Fong Chee > > Update pdma properties for Stratix 10 > > Signed-off-by: Tien Fong Chee > --- > arch/arm/dts/socfpga_stratix10.dtsi | 20 > 1 file changed, 20 insertions(+) > > diff --git

Re: [U-Boot] [PATCH] arm: socfpga: gen5: Enabling cache and TLB maintenance broadcast

On 03/08/2018 08:01 AM, See, Chin Liang wrote: > On Thu, 2018-03-01 at 17:17 +0100, Marek Vasut wrote: >> On 02/28/2018 06:12 AM, chin.liang@intel.com wrote: >>> >>> From: Chin Liang See >>> >>> Enabling cache and TLB maintenance broadcast through ACTLR as >>>

[U-Boot] [PATCH 1/3] arm: socfpga: stratix10: Add base address map for Statix10 SoC

From: Chin Liang See <chin.liang@intel.com> Add the base address map for Statix10 SoC Signed-off-by: Chin Liang See <chin.liang@intel.com> Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- v2: removed addresses that can be part of the fdt --- arch/arm/mach-so

[U-Boot] [PATCH 0/3] ARM: stratix10: initial small patchset

a larger patchset with for SPL and U-Boot, I figure we start out small first, and allow for a couple of medium size patchset later for further support. Thanks, Dinh Chin Liang See (1): arm: socfpga: stratix10: Add base address map for Statix10 SoC Dinh Nguyen (2): ARM64: stratix10: add reset

[U-Boot] [PATCH 3/3] ARM: dts: stratix10: Add base dtsi and devkit dts

From the Linux v4.16-rc4, add the base dtsi and devkit dts files for the Stratix10 SoCFPGA platform. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- arch/arm/dts/Makefile| 1 + arch/arm/dts/socfpga_stratix10.dtsi | 381 +++ arch/a

[U-Boot] [PATCH 2/3] ARM64: stratix10: add reset manager includes

Pulled from linux v4.16-rc4. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- include/dt-bindings/reset/altr,rst-mgr-s10.h | 97 1 file changed, 97 insertions(+) create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h diff --git a/include/dt-bi

[U-Boot] [PATCHv2 1/6] reset: socfpga: add reset driver for SoCFPGA platform

Add a DM compatible reset driver for the SoCFPGA platform. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- v2: use setbits_le32 and clrbits_le32 --- drivers/reset/Kconfig | 7 +++ drivers/reset/Makefile| 1 + drivers/reset/reset-socfpga.c

[U-Boot] [PATCH 5/6] i2c: designware: add reset ctrl to driver

out of reset. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/i2c/designware_i2c.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index 8cfed21..419d021 100644 --- a/drivers/i2c/designware_i2c.c

[U-Boot] [PATCH 3/6] arm: dts: socfpga: enables i2c0 in socfpga_de0_nano

Add all the appropriate i2c alias in the base socfpga dtsi and enables the i2c node on the DE0 NANO board. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- arch/arm/dts/socfpga.dtsi | 4 arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 12 2

[U-Boot] [PATCH 4/6] arm: dts: socfpga: add reset property

Add reset dts property to the i2c nodes. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- arch/arm/dts/socfpga.dtsi | 8 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index f34dd9d..ead0560 100644 --- a/arch/arm/dts/socfpg

[U-Boot] [PATCH 2/6] configs: socfpga: convert i2c to dm

Enable DM I2C driver on SoCFPGA platforms. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + c

[U-Boot] [PATCH 6/6] configs: socfpga: add DM_RESET

Add the DM reset driver to socfpga defconfigs. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- configs/socfpga_arria5_defconfig | 1 + configs/socfpga_cyclone5_defconfig | 1 + configs/socfpga_dbm_soc1_defconfig | 1 + configs/socfpga_de0_nano_soc_defconfig | 1 + c

[U-Boot] [PATCH 0/6] reset: add reset driver for SoCFPGA

in the i2c dts node, and deassert the reset the IP if found. - Adds CONFIG_DM_RESET to all the SoCFPGA defconfigs For this patchset, I'm only enabling the i2c in the DTS for the Terasic DE-0 Atlas board. I'll look to enable the other boards in the near future. Dinh Dinh Nguyen (6): reset

[U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

Hi, I'm seeking advice with an observation that I'm seeing on the Cyclone5 devkit/sockit. I'm working with U-Boot version v2018.05-rc1. Building the u-boot-with-spl.sfp, then writing the sfp file to the 0xa2 partition on the SD card, does not boot, all I get is this: U-Boot SPL 2018.05-rc1 (Apr

[U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

Hi, I'm seeking advice with an observation that I'm seeing on the Cyclone5 devkit/sockit. I'm working with U-Boot version v2018.05-rc1. Building the u-boot-with-spl.sfp, then writing the sfp file to the 0xa2 partition on the SD card, does not boot, all I get is this: U-Boot SPL 2018.05-rc1 (Apr

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On 04/10/2018 01:29 PM, Marek Vasut wrote: > On 04/10/2018 08:28 PM, Dinh Nguyen wrote: >> Hi, >> >> I'm seeking advice with an observation that I'm seeing on the Cyclone5 >> devkit/sockit. >> >> I'm working with U-Boot version v2018.05-rc1. Building t

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On 04/10/2018 02:25 PM, Marek Vasut wrote: > On 04/10/2018 08:56 PM, Dinh Nguyen wrote: >> >> >> On 04/10/2018 01:29 PM, Marek Vasut wrote: >>> On 04/10/2018 08:28 PM, Dinh Nguyen wrote: >>>> Hi, >>>> >>>> I'm seeking advice with

Re: [U-Boot] [PATCHv2 1/6] reset: socfpga: add reset driver for SoCFPGA platform

v On 04/04/2018 05:56 PM, Marek Vasut wrote: > On 04/05/2018 12:18 AM, Dinh Nguyen wrote: >> Add a DM compatible reset driver for the SoCFPGA platform. >> >> Signed-off-by: Dinh Nguyen <dingu...@kernel.org> > > [...] > >> +static int socfpga

Re: [U-Boot] [PATCHv2 1/6] reset: socfpga: add reset driver for SoCFPGA platform

On 04/05/2018 09:12 AM, Dinh Nguyen wrote: > v > > On 04/04/2018 05:56 PM, Marek Vasut wrote: >> On 04/05/2018 12:18 AM, Dinh Nguyen wrote: >>> Add a DM compatible reset driver for the SoCFPGA platform. >>> >>> Signed-off-by: Dinh Nguyen <dingu.

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On Wed, Apr 11, 2018 at 7:55 AM, Alexander Graf <ag...@suse.de> wrote: > On 04/11/2018 02:37 PM, Marek Vasut wrote: >> >> On 04/11/2018 02:26 PM, Tom Rini wrote: >>> >>> On Wed, Apr 11, 2018 at 10:12:42AM +0200, Marek Vasut wrote: >>>

[U-Boot] [PATCH] configs: socfpga: disable EFI and ISO partition types

None of the SoCFPGA platforms will support EFI/ISO partition types that is needed for DISTRO_DEFAULTS. SoCFPGA bootroom will only support 0xa2 partition type. This is needed to help limit the size of the SPL to within the 64k limit that is required for SoCFPGA. Signed-off-by: Dinh Nguyen <di

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On 04/12/2018 04:43 AM, Marek Vasut wrote: > On 04/12/2018 11:42 AM, Alexander Graf wrote: > [...] None of it is enabled in SPL :). The „efi partition“ option is a misnomer - it really just enables GPT partition table support which are widely in use with Android for example. >>> I

Re: [U-Boot] [PATCHv2 1/6] reset: socfpga: add reset driver for SoCFPGA platform

On Thu, Apr 5, 2018 at 11:28 AM, Marek Vasut <ma...@denx.de> wrote: > On 04/05/2018 04:46 PM, Dinh Nguyen wrote: >> >> >> On 04/05/2018 09:12 AM, Dinh Nguyen wrote: >>> v >>> >>> On 04/04/2018 05:56 PM, Marek Vasut wrote: >>>> On

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On 04/10/2018 05:37 PM, Marek Vasut wrote: > On 04/10/2018 11:36 PM, Dinh Nguyen wrote: >> >> >> On 04/10/2018 02:25 PM, Marek Vasut wrote: >>> On 04/10/2018 08:56 PM, Dinh Nguyen wrote: >>>> >>>> >>>> On 04/10/2018 01:29 PM,

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On 04/10/2018 09:21 PM, Dinh Nguyen wrote: > > > On 04/10/2018 05:37 PM, Marek Vasut wrote: >> On 04/10/2018 11:36 PM, Dinh Nguyen wrote: >>> >>> >>> On 04/10/2018 02:25 PM, Marek Vasut wrote: >>>> On 04/10/2018 08:56 PM, Dinh Nguyen wrote:

Re: [U-Boot] arm: socfpga: unable to boot cyclone5 devkit or SocKit

On 04/10/2018 09:45 PM, Dinh Nguyen wrote: > > > On 04/10/2018 09:21 PM, Dinh Nguyen wrote: >> >> >> On 04/10/2018 05:37 PM, Marek Vasut wrote: >>> On 04/10/2018 11:36 PM, Dinh Nguyen wrote: >>>> >>>> >>>> On 04/10/201

[U-Boot] [PATCHv1 12/14] usb: ehci/ohci: remove reset_free function

The call to free the reset control line is a deadend call that doesn't lead to any reset control functionality. Also the reset_free() function will be remove in a subsequent patch, so remove it here. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/usb/host/ehci-generic

[U-Boot] [PATCHv1 09/14] reset: sandbox: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/sandbox-reset.c | 25 ++--- 1 file changed, 6 insertions(+), 19 deletions(-)

[U-Boot] [PATCHv1 03/14] reset: uniphier: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/reset-uniphier.c | 12 1 file changed, 12 deletions(-) diff --git a/drivers/reset

[U-Boot] [PATCHv1 08/14] reset: socfpga: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/reset-socfpga.c | 18 -- 1 file changed, 18 deletions(-) diff --git a/drivers

[U-Boot] [PATCHv1 04/14] reset: rockchip: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/reset-rockchip.c | 26 +++--- 1 file changed, 3 insertions(+), 23 del

[U-Boot] [PATCHv1 02/14] reset: sti: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/sti-reset.c | 12 drivers/reset/stm32-reset.c | 12 2 files chang

[U-Boot] [PATCHv1 01/14] reset: tegra: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/tegra-car-reset.c | 24 +--- drivers/reset/tegra186-reset.c

[U-Boot] [PATCHv1 13/14] reset: test: remove sandbox_reset_test_free function

Remove sandbox_reset_test_free() because it calls reset_free, which is being removed. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- arch/sandbox/include/asm/reset.h | 1 - drivers/reset/sandbox-reset-test.c | 7 --- test/dm/reset.c| 2 -- 3 files chang

[U-Boot] [PATCHv1 10/14] net: dwc_eth_qos: remove reset_free from driver

The call to free the reset control line is a deadend call that doesn't lead to any reset control functionality. Also the reset_free() function will be remove in a subsequent patch, so remove it here. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/net/dwc_eth_qos.c | 4

[U-Boot] [PATCHv1 00/14] reset: remove request and free functions

implementation of request/free. The next 4 patches remove the global reset_free() and reset_request() functions from drivers that are calling them, specifically, dwc_eth_qos, phy, and usb. The final patch removes the request/free functions from the reset manager driver itself. Dinh Dinh Nguyen (14

[U-Boot] [PATCHv1 06/14] reset: bcm6345: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/reset-bcm6345.c | 21 ++--- 1 file changed, 6 insertions(+), 15 deletions(-)

[U-Boot] [PATCHv1 07/14] reset: ast2500: remove request function

The request reset function is not really used for any useful purpose except for debugging. We can safely remove it. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/ast2500-reset.c | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/reset/ast2500-res

[U-Boot] [PATCHv1 05/14] reset: meson: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/reset-meson.c | 18 +++--- 1 file changed, 3 insertions(+), 15 deletions(-) diff

[U-Boot] [PATCHv1 14/14] reset: remove request and free functions

The request and free reset functions are not really used for any useful purpose but for debugging. We can safely remove them. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/reset/reset-uclass.c | 28 include/reset-uclass.h

[U-Boot] [PATCHv1 11/14] phy: bcm63xx: remove reset_free function

The call to free the reset control line is a deadend call that doesn't lead to any reset control functionality. Also the reset_free() function will be remove in a subsequent patch, so remove it here. Signed-off-by: Dinh Nguyen <dingu...@kernel.org> --- drivers/phy/bcm6318-usbh-phy

Re: [U-Boot] [PATCHv1 14/14] reset: remove request and free functions

On 04/16/2018 01:43 PM, Simon Glass wrote: > +Stephen for comment > > Hi Dinh, > > On 14 April 2018 at 12:51, Dinh Nguyen <dingu...@kernel.org> wrote: >> The request and free reset functions are not really used for any useful >> purpose but for deb

Re: [U-Boot] [PATCHv1 14/14] reset: remove request and free functions

On 04/16/2018 01:51 PM, Stephen Warren wrote: > On 04/16/2018 12:43 PM, Simon Glass wrote: >> +Stephen for comment >> >> Hi Dinh, >> >> On 14 April 2018 at 12:51, Dinh Nguyen <dingu...@kernel.org> wrote: >>> The request and free reset function

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