In message <[EMAIL PROTECTED]>, Bruce Griffiths writes: >Poul-Henning Kamp wrote: >> In message <[EMAIL PROTECTED]>, Bruce Griffiths writes: >> >> You guys could save a lot of time if you read my paper where all >> this is described in detail: >> >> http://phk.freebsd.dk/pubs/timecounter.pdf > >This paper addresses virtually none of the hardware design issues at all.
That was not the main focus. The signals were indeed clocked through 3 D flipflops clocked on the global clock, to handle metastability, before they latched the count latches. I probably still have the VHDL somewhere... -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 [EMAIL PROTECTED] | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
