tcutting;600175 Wrote: > OK... I'm going to dive in to where I shouldn't tread, not being fully > versed in the digital interface to the DACs, but here goes anyway... > > The ethernet connection has error correction as noted before, and also > has buffering, and is asynchronous. The data is pulled-in fast enough > to keep the buffer nearly full. Any errors in transmission can get > fixed by the protocols which allow re-transmission (if there is > actually error correction coding, which I don't know, the errors could > theoretically be corrected without re-transmission). The key issue, > though, is that the timing is not critical - the data is transferred in > bursts. > > The digital audio interface, however, is completely synchronous. I > suppose there could be digital errors introduced into the 1's and 0's > transmitted, but if that's the case I would say there is an issue with > the physical interface. More important, however, would be the timing. > These issues would be impacted by both ends of the interface... if the > clock on the transmit side (the Squeezebox) is poor, then likely the > received clock will be poor, resulting in some form of jitter which > could effect the resulting analog conversion. I imagine some DACs go > to great pains to provide clock recovery mechanisms to minimize this > effect (some type of phase-locked loop with low phase noise clock > oscillators). As mentioned, if the signal quality is lacking, this > will also impact this clock recovery and introduce additional clock > noise (jitter) into the the signal, which is likely passed on through > the DAC into the analog stream.
Yep something like that . http://en.wikipedia.org/wiki/S/PDIF It's completely synchronues with no separate clock signal so clock is to be recovered from the bit pattern itself (biphase mark code), as the dac is tied to that clock, it must be like that otherwise the buffer could go empty or to full. But this means that not only the 1 and 0 are important but also the shift 1>0 or 0>1 to get good clock recovery the signal must resemble a good square wave . However clock recovery techniques has improved over the years in digital reciever chips it is no the issue it used to be . As tcutting said pll loop with fifo buffer now usually dual pll loops and dual buffers and re-clocking the signal and even more advanced techniques that i cant describe. But you still don't get rid of it completely in ideal world the clock crystals in source and dac should have the same frequency and be stable . Yes the 44.1kHz in the DAC and source are not really the "same" . The best solution is to let the DAC clockslave the source with another cable. I found a nice paper by wolfson the guys that makes DAC's it's a shameless ad for their own circuits but in the paper is a really good description of the proplem with spdif . http://www.wolfsonmicro.com/documents/uploads/misc/en/Jitter_performance_of_spdif_digital_interface_transceivers.pdf here is one by TNT audio, but beware TNT is audiphools so be sceptical, articles on that site can be 100% correct or 100% nonsense. http://www.tnt-audio.com/clinica/jitter1_e.html -- Mnyb -------------------------------------------------------------------- Main hifi: Touch + CIA PS +MeridianG68J MeridianHD621 MeridianG98DH and assorted amps SiriuS, Classe' Primare and Dynadio speakers, Contour 4 Contour Center, and Contour 1.3SE rear ch. Rel Stadium 3 sub. Bedroom/Office: Boom Kitchen: SB3 + powered Fostex PM0.4 Misc use: Radio (with battery) PLEASE FIX BUG 112 http://bugs.slimdevices.com/show_bug.cgi?id=112 ------------------------------------------------------------------------ Mnyb's Profile: http://forums.slimdevices.com/member.php?userid=4143 View this thread: http://forums.slimdevices.com/showthread.php?t=84507 _______________________________________________ Touch mailing list [email protected] http://lists.slimdevices.com/mailman/listinfo/touch
