Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-13 Thread Joachim Franek
On Wednesday 12 September 2012 13:18:27 Michael Haberler wrote:
 did you actually install headers and the non-kernel xenomai support to 
 compile applications? I'm a bit lost there

Finding in xenomai source code .../xenomai-2.6.1/examples/native
and typing make I get:

jjf@jedPI:/.../XenoPi/xenomai-2.6.1/examples/native$ ls -l
-rw-r--r-- 1 jjf xenomai 2360 14 janv.  2012 Makefile
-rwxr-xr-x 1 jjf xenomai 7642 13 sept. 08:14 rtprint
-rw-r--r-- 1 jjf xenomai 1130  9 nov.   2011 rtprint.c
-rwxr-xr-x 1 jjf xenomai 8254 13 sept. 08:14 sigdebug
-rw-r--r-- 1 jjf xenomai 2086  9 nov.   2011 sigdebug.c
-rwxr-xr-x 1 jjf xenomai 7290 13 sept. 08:14 trivial-periodic
-rw-r--r-- 1 jjf xenomai 1453 14 janv.  2012 trivial-periodic.c

jjf@jedPI:/.../XenoPi/xenomai-2.6.1/examples/native$ sudo ./trivial-periodic 
Time since last turn: 1000.01 ms
Time since last turn: 1000.005000 ms
Time since last turn: 1000.00 ms
Time since last turn: 999.999000 ms
Time since last turn: 1000.00 ms
Time since last turn: 1000.00 ms
Time since last turn: 999.999000 ms
Time since last turn: 1000.002000 ms
Time since last turn: 999.999000 ms
Time since last turn: 1000.002000 ms
Time since last turn: 999.997000 ms
Time since last turn: 1000.002000 ms
Time since last turn: 999.998000 ms
Time since last turn: 1000.00 ms
Time since last turn: 999.999000 ms
Time since last turn: 1000.001000 ms
Time since last turn: 1000.00 ms
Time since last turn: 1000.00 ms
Time since last turn: 1000.00 ms
Time since last turn: 1000.00 ms
Time since last turn: 1000.00 ms
Time since last turn: 1000.001000 ms
Time since last turn: 999.999000 ms
Time since last turn: 1000.001000 ms
Time since last turn: 999.999000 ms
Time since last turn: 1000.003000 ms
Time since last turn: 999.998000 ms
Time since last turn: 1000.002000 ms


Joachim

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-12 Thread Joachim Franek
Using the image (xenomai.img 8Gb) from
http://powet.eu/2012/07/25/raspberry-pi-xenomai/
I can reproduce the latency values.

Also values from:
http://www.blaess.fr/christophe/2012/08/27/xenomai-sur-raspberry-pi/

Joachim

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-12 Thread Michael Haberler

Am 12.09.2012 um 12:40 schrieb Joachim Franek:

 Using the image (xenomai.img 8Gb) from
 http://powet.eu/2012/07/25/raspberry-pi-xenomai/
 I can reproduce the latency values.
 
 Also values from:
 http://www.blaess.fr/christophe/2012/08/27/xenomai-sur-raspberry-pi/
 
 Joachim

Joachim - great!

I got so far as to booting xenomai

did you actually install headers and the non-kernel xenomai support to compile 
applications? I'm a bit lost there

- Michael
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-12 Thread Joachim Franek

On Wednesday 12 September 2012 13:18:27 Michael Haberler wrote:
 did you actually install headers and the non-kernel xenomai support to 
 compile applications? I'm a bit lost there

Michael,

I know near nothing about xenomai. 

But looking to
/usr/xenomai
there is 
/usr/xenomai/bin
/usr/xenomai/include
/usr/xenomai/lib
/usr/xenomai/sbin

I assume, it is possibel to build rt applications.

Did you have a xenomai-text.c?
 
Joachim 


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread Joachim Franek
On Monday 10 September 2012 16:45:59 Michael Haberler wrote:
 Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
   16   0.66  90.91%   3.03%   6.06%  35440.860
   32   1.33  88.72%   3.01%   8.27%  36021.858
   64   2.64  88.26%   2.65%   9.09%  36622.222
  128   5.28  89.58%   3.22%   7.20%  35874.830
  256  10.56  88.92%   3.12%   7.95%  36170.096

I can reproduce your results with exactly the same values.

But there is a DSP on the chip, but with no documentation yet.
From:
http://elinux.org/RPi_Hardware
DSP core: There is a DSP, but there isn't currently a public API

Joachim 


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread andy pugh
On 11 September 2012 05:51, EBo e...@sandien.com wrote:

 An open source solution for FPGA would be fascinating to me, but the
 problem might have already been solved

My understanding is that Mesa's Hostmot2 is Open-Source, and there is
already extensive driver support in LinuxCNC.
At least one chap is using the Mesa firmwares in his own hardware.

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http://www.ifixit.com/Manifesto

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread Michael Haberler

Am 11.09.2012 um 10:20 schrieb Joachim Franek:
...
 I have no trouble with a setup of 3 steppers with this cpu.

to take the guessing out of the is motion a FP bottleneck? question, one 
could try a setup with just motion and not much else, and take timings like so

addf togglepin # hypothetical component function
addf togglepin # to measure the baseline delay

addf togglepin # measure from here
addf motion..
addf togglepin # to here and substract baseline

there is time stamp counter support in rtapi, but I'd rather trust a LA

- m


 
 Joachim 
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread Joachim Franek
What about halscope?

Joachim

On Tuesday 11 September 2012 11:56:58 Michael Haberler wrote:
 
 Am 11.09.2012 um 10:20 schrieb Joachim Franek:
 ...
  I have no trouble with a setup of 3 steppers with this cpu.
 
 to take the guessing out of the is motion a FP bottleneck? question, one 
 could try a setup with just motion and not much else, and take timings like so
 
 addf togglepin # hypothetical component function
 addf togglepin # to measure the baseline delay
 
 addf togglepin # measure from here
 addf motion..
 addf togglepin # to here and substract baseline
 
 there is time stamp counter support in rtapi, but I'd rather trust a LA
 

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread Michael Haberler

Am 11.09.2012 um 13:40 schrieb Joachim Franek:

 What about halscope?

doable in principle, but the bound on the sampling period is the fastest thread 
period, which is a bit coarse for measurements

 Joachim
 
 On Tuesday 11 September 2012 11:56:58 Michael Haberler wrote:
 
 Am 11.09.2012 um 10:20 schrieb Joachim Franek:
 ...
 I have no trouble with a setup of 3 steppers with this cpu.
 
 to take the guessing out of the is motion a FP bottleneck? question, one 
 could try a setup with just motion and not much else, and take timings like 
 so
 
 addf togglepin # hypothetical component function
 addf togglepin # to measure the baseline delay
 
 addf togglepin # measure from here
 addf motion..
 addf togglepin # to here and substract baseline
 
 there is time stamp counter support in rtapi, but I'd rather trust a LA
 
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread Eric Keller
On Mon, Sep 10, 2012 at 12:07 PM, Kent A. Reed kentallanr...@gmail.comwrote:


 I will kick in the benchmarks I run on my BeagleBoardXM and ASUS
 AT5NM10-I while I wait.

 Have you set up a BeagleboardXM with a rt-preempt kernel?  I have been
using a stock kernel on our BeagleboardXM's, I'm a little curious about
building and testing the rt-preempt kernel on them
Eric
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-11 Thread Kent A. Reed
On 9/11/2012 9:37 AM, Eric Keller wrote:
 On Mon, Sep 10, 2012 at 12:07 PM, Kent A. Reed kentallanr...@gmail.comwrote:

 I will kick in the benchmarks I run on my BeagleBoardXM and ASUS
 AT5NM10-I while I wait.

 Have you set up a BeagleboardXM with a rt-preempt kernel?  I have been
 using a stock kernel on our BeagleboardXM's, I'm a little curious about
 building and testing the rt-preempt kernel on them
 Eric


Hi, Eric.

Short answer---no. When I said run I mean run the floating-point 
benchmark suites on a stock Linux kernel, just as Michael did.

Long answer---I've been waiting on the RT PREEMPT crowd (don't ya love 
the lack of common nomenclature; the RT PREEMPT crowd is working with 
CONFIG_PREEMPT_RT). The sticking point seems to be the high-resolution 
timer.

 From their HOW_TO page 
(https://rt.wiki.kernel.org/index.php/RT_PREEMPT_HOWTO) [apology in 
advance if page markup gets messed up]

 The most default configurations here are ok as-they-are. However you 
 should make sure that you have

   * enable CONFIG_PREEMPT_RT
   * activated the High-Resolution-Timer Option (Attention, the amount
 of supported platforms by the HR timer is still very limited.
 Right now the option is only supported on x86 systems, PowerPC and
 ARM Support are however in queue.)
   * disabled all Power Management Options like ACPI or APM (not all
 ACPI functions are bad, but you will have to check very
 carefully to find out which function will affect your real time
 system. Thus it's better to simply disable them all if you don't
 need them. APM, however, is a no-go.) NOTE: Since rt patch
 2.6.18-rt6 you will probably have to activate ACPI option to
 activate high resolution timer. Since the TSC timer on PC
 platforms, as used in the previous versions, are now marked as
 unsuitable for hrt mode due to many lacks of functionalities and
 reliabilities, you will need i.E. pm_timer as provided by ACPI to
 use as clock source. To activate the pm_timer, you can just
 activate the ACPI_SUPPORT in menuconfig and deactivate all other
 sub modules like fan, processor or button. If you have an
 old pc, which lacks ACPI support, you might have problems using
 the high resolution timer.


 From another of their pages 
(https://rt.wiki.kernel.org/index.php/Frequently_Asked_Questions#What_sort_of_real-time_performance_should_I_expect.3F)

 Which architectures does the CONFIG_PREEMPT_RT patch support?
 There are systems representing the x86, x86_64, ARM, MIPS, and Power 
 architectures using the CONFIG_PREEMPT_RT patch. However, in many ways 
 this is the wrong question. Support for real-time is not just about 
 the instruction set architecture, but also about supporting the high 
 resolution timer provided by the CPU and/or CPU support chipset, the 
 device drivers for the system being well behaved, etc. So just because 
 an ARM system from company A may work quite well with the -rt 
 patchset, it does not guarantee that another ARM system from Company B 
 will work as well; it might have some longer latency problems or it 
 might not work at all. It is true that overall design and architecture 
 of the -rt patch tends to avoid the need for device-driver specific 
 changes, but there are always software bugs as well as hardware design 
 bugs.
 Please refer toplatforms tested and in use with CONFIG_PREEMT_RT 
 https://rt.wiki.kernel.org/index.php/CONFIG_PREEMPT_RT_Patch#Platforms_Tested_and_in_Use_with_CONFIG_PREEMPT_RTsection
  
 in this wiki for a list of platforms that members of the -rt community 
 have used successfully. The list is not exhaustive, of course, but it 
 should give a flavor of the sorts of packages that have had enjoyed 
 success using the -rt patch.

There has been activity on the OMAP patching that is required in 
addition to the CONFIG_PREEMPT_RT patching 
(http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap.git;a=summary). 
I just haven't had time to try out their work.

I hope someone will shout out that I'm wrong and that all necessary 
patches are ready now for various popular ARM-based boards like 
BeagleBoard, BeagleBoardXM, BeagleBone, and Raspberry Pi.

Regards,
Kent

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Michael Haberler
here's linpack figures for the Rpi and an Intel D525. 

the D5252 is almost a factor of 6 faster than the Rpi for this benchmark

(pull test code with wget http://www.netlib.org/benchmark/linpackc.new)

pi@raspberrypi ~/tests $ gcc -O linpackc.c -lm -olinpackc
pi@raspberrypi ~/tests $ ./linpackc 
Enter array size (q to quit) [200]:  
Memory required:  315K.


LINPACK benchmark, Double precision.
Machine precision:  15 digits.
Array size 200 X 200.
Average rolled and unrolled performance:

Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS

  16   0.66  90.91%   3.03%   6.06%  35440.860
  32   1.33  88.72%   3.01%   8.27%  36021.858
  64   2.64  88.26%   2.65%   9.09%  36622.222
 128   5.28  89.58%   3.22%   7.20%  35874.830
 256  10.56  88.92%   3.12%   7.95%  36170.096


mah@atom:~/src$ gcc -O linpackc.c  -lm
linpackc.c: In function 'main':
linpackc.c:78: warning: ignoring return value of '€˜fgets'€™, declared with 
attribute warn_unused_result
mah@atom:~/src$ ./a.out 
Enter array size (q to quit) [200]:  
Memory required:  315K.


LINPACK benchmark, Double precision.
Machine precision:  15 digits.
Array size 200 X 200.
Average rolled and unrolled performance:

Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS

 128   0.96  86.46%   3.12%  10.42%  204403.101
 256   1.91  87.96%   1.05%  10.99%  206807.843
 512   3.82  87.43%   2.62%   9.95%  204403.101
1024   7.63  87.68%   2.36%   9.96%  204700.631
2048  15.26  87.42%   2.82%   9.76%  204254.660





Am 09.09.2012 um 23:35 schrieb Jon Elson:

 Kent A. Reed wrote:
 On 9/9/2012 1:54 PM, Jon Elson wrote:
 
 ... I have not reported any thread latencies for the Beagle.
 
 
 Sorry, Jon. Looking back I see you were talking about how fast one could 
 drive GPIO pins. My memory is getting rustier by the day.
 
 And, mine isn't getting better by the day, either.
 You've mentioned floating-point performance in the past. Do we have any 
 benchmarking for that?
 
 There certainly are standard benchmarks that can be run on Linux systems 
 that could be
 quite useful.  I haven't seen anybody post numbers, but likely they 
 already exist on
 the web, somewhere.  A quick search didn't show any published results 
 comparing
 say, the Beagle Board's OMAP 3430 against an Intel Atom, for instance, 
 which would
 be a good comparison.
 ... As for interrupts and timers, if you accept that
 you have to add FPGA hardware to the CPU for step generation, encoder 
 counting
 or whatever, then you can have that add-on produce the interrupts for the 
 RT thread
 at any rate you choose.
 
 
 In my philosophy, Horatio, this is a perfectly acceptable requirement 
 and I look forward to products from you and Peter. I accept as well that 
 they may have to be tailored to specific ARM-based systems for the 
 reasons just mentioned.
 
 I have built an adapter to connect my boards to the Beagle and emulate 
 the IEEE-1284 par port in
 software.  It worked, and wasn't horribly slow, compared to a PC.  I 
 didn't worry about the
 interrupt line, but on the Beagle, at least, ANY GPIO pin can be set up 
 as an interrupt.
 I have not even looked at the code required to make that actually work 
 (especially since the
 lack of RTAI was the reason work in that direction stopped.)
 
 Jon
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Kent A. Reed
On 9/10/2012 10:45 AM, Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525.

 the D5252 is almost a factor of 6 faster than the Rpi for this benchmark

 (pull test code with wget http://www.netlib.org/benchmark/linpackc.new)

 pi@raspberrypi ~/tests $ gcc -O linpackc.c -lm -olinpackc
 pi@raspberrypi ~/tests $ ./linpackc
 Enter array size (q to quit) [200]:
 Memory required:  315K.


 LINPACK benchmark, Double precision.
 Machine precision:  15 digits.
 Array size 200 X 200.
 Average rolled and unrolled performance:

  Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
16   0.66  90.91%   3.03%   6.06%  35440.860
32   1.33  88.72%   3.01%   8.27%  36021.858
64   2.64  88.26%   2.65%   9.09%  36622.222
   128   5.28  89.58%   3.22%   7.20%  35874.830
   256  10.56  88.92%   3.12%   7.95%  36170.096


 mah@atom:~/src$ gcc -O linpackc.c  -lm
 linpackc.c: In function 'main':
 linpackc.c:78: warning: ignoring return value of '€˜fgets'€™, declared with 
 attribute warn_unused_result
 mah@atom:~/src$ ./a.out
 Enter array size (q to quit) [200]:
 Memory required:  315K.


 LINPACK benchmark, Double precision.
 Machine precision:  15 digits.
 Array size 200 X 200.
 Average rolled and unrolled performance:

  Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
   128   0.96  86.46%   3.12%  10.42%  204403.101
   256   1.91  87.96%   1.05%  10.99%  206807.843
   512   3.82  87.43%   2.62%   9.95%  204403.101
  1024   7.63  87.68%   2.36%   9.96%  204700.631
  2048  15.26  87.42%   2.82%   9.76%  204254.660





 Am 09.09.2012 um 23:35 schrieb Jon Elson:

 Kent A. Reed wrote:
 ...
 You've mentioned floating-point performance in the past. Do we have any
 benchmarking for that?

 There certainly are standard benchmarks that can be run on Linux systems
 that could be
 quite useful.  I haven't seen anybody post numbers, but likely they
 already exist on
 the web, somewhere.  A quick search didn't show any published results
 comparing
 say, the Beagle Board's OMAP 3430 against an Intel Atom, for instance,
 which would
 be a good comparison.

 ...

Thanks, Michael.

I'm *still* waiting for my RPi so I spent some time looking up 
benchmarking info regarding ARM vs the world. (Caveat: I know very well 
that benchmarking is the art of lying with confidence.)

Because of my FORTRAN upbringing I have a tendency to rely on the 
Whetstone benchmark but the choice of suite may not matter as much as 
the choice of compiler, even more so with ARMs because of the 
compromises made by software folks with different versions of the 
instruction set.

To start, are you running Raspbian Linux or Debian Linux? versions?

I will kick in the benchmarks I run on my BeagleBoardXM and ASUS 
AT5NM10-I while I wait.

Regards,
Kent


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Jon Elson
Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525. 

 the D5252 is almost a factor of 6 faster than the Rpi for this benchmark
   
Thanks much for doing this!  Not a great result, though.  My feeling is 
that the
Atom processors are marginal for LinuxCNC, especially in cases with long
programs or contouring, where the slowness would be more obvious.
So, if the Pi is 1/6th that speed, that will not be good at all.
Exactly how this compares on LinuxCNC, where there is also a lot of
non-FP code, isn't clear.  If LinuxCNC was run with the GUI on another
system, it might be OK, and for special projects which are not typical
machines, it might be fine.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Michael Haberler

Am 10.09.2012 um 18:07 schrieb Kent A. Reed:

 On 9/10/2012 10:45 AM, Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525.
 
 ...
 
 Thanks, Michael.
 
 I'm *still* waiting for my RPi so I spent some time looking up 
 benchmarking info regarding ARM vs the world. (Caveat: I know very well 
 that benchmarking is the art of lying with confidence.)
 
 Because of my FORTRAN upbringing I have a tendency to rely on the 
 Whetstone benchmark but the choice of suite may not matter as much as 
 the choice of compiler, even more so with ARMs because of the 
 compromises made by software folks with different versions of the 
 instruction set.
 
 To start, are you running Raspbian Linux or Debian Linux? versions?

Raspbian. This looks very complete in terms of packages available.

This kernel is stock:
Linux raspberrypi 3.2.27+ #102 PREEMPT Sat Sep 1 01:00:50 BST 2012 armv6l 
GNU/Linux

I'm just cross-compiling the kernel to see how that goes, it might be agonizing 
on the Rpi;looks good so far

-m

 
 I will kick in the benchmarks I run on my BeagleBoardXM and ASUS 
 AT5NM10-I while I wait.
 
 Regards,
 Kent
 
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Kenneth Lerman
Point of view is everything.

You said:

the D5252 is almost a factor of 6 faster than the Rpi for this benchmark

I would have said

the Rpi is only a factor of 6 slower for this benchmark

:-)

It's also a factor of 20 smaller (a guess) and uses a factor of 20 less power 
(also a guess).

Regards,

Ken



On 9/10/2012 10:45 AM, Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525.

 the D5252 is almost a factor of 6 faster than the Rpi for this benchmark

 (pull test code with wget http://www.netlib.org/benchmark/linpackc.new)

 pi@raspberrypi ~/tests $ gcc -O linpackc.c -lm -olinpackc
 pi@raspberrypi ~/tests $ ./linpackc
 Enter array size (q to quit) [200]:
 Memory required:  315K.


 LINPACK benchmark, Double precision.
 Machine precision:  15 digits.
 Array size 200 X 200.
 Average rolled and unrolled performance:

  Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
16   0.66  90.91%   3.03%   6.06%  35440.860
32   1.33  88.72%   3.01%   8.27%  36021.858
64   2.64  88.26%   2.65%   9.09%  36622.222
   128   5.28  89.58%   3.22%   7.20%  35874.830
   256  10.56  88.92%   3.12%   7.95%  36170.096


 mah@atom:~/src$ gcc -O linpackc.c  -lm
 linpackc.c: In function 'main':
 linpackc.c:78: warning: ignoring return value of '€˜fgets'€™, declared with 
 attribute warn_unused_result
 mah@atom:~/src$ ./a.out
 Enter array size (q to quit) [200]:
 Memory required:  315K.


 LINPACK benchmark, Double precision.
 Machine precision:  15 digits.
 Array size 200 X 200.
 Average rolled and unrolled performance:

  Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
   128   0.96  86.46%   3.12%  10.42%  204403.101
   256   1.91  87.96%   1.05%  10.99%  206807.843
   512   3.82  87.43%   2.62%   9.95%  204403.101
  1024   7.63  87.68%   2.36%   9.96%  204700.631
  2048  15.26  87.42%   2.82%   9.76%  204254.660





 Am 09.09.2012 um 23:35 schrieb Jon Elson:

 Kent A. Reed wrote:
 On 9/9/2012 1:54 PM, Jon Elson wrote:

 ... I have not reported any thread latencies for the Beagle.


 Sorry, Jon. Looking back I see you were talking about how fast one could
 drive GPIO pins. My memory is getting rustier by the day.

 And, mine isn't getting better by the day, either.
 You've mentioned floating-point performance in the past. Do we have any
 benchmarking for that?

 There certainly are standard benchmarks that can be run on Linux systems
 that could be
 quite useful.  I haven't seen anybody post numbers, but likely they
 already exist on
 the web, somewhere.  A quick search didn't show any published results
 comparing
 say, the Beagle Board's OMAP 3430 against an Intel Atom, for instance,
 which would
 be a good comparison.
 ... As for interrupts and timers, if you accept that
 you have to add FPGA hardware to the CPU for step generation, encoder 
 counting
 or whatever, then you can have that add-on produce the interrupts for the 
 RT thread
 at any rate you choose.

 In my philosophy, Horatio, this is a perfectly acceptable requirement
 and I look forward to products from you and Peter. I accept as well that
 they may have to be tailored to specific ARM-based systems for the
 reasons just mentioned.

 I have built an adapter to connect my boards to the Beagle and emulate
 the IEEE-1284 par port in
 software.  It worked, and wasn't horribly slow, compared to a PC.  I
 didn't worry about the
 interrupt line, but on the Beagle, at least, ANY GPIO pin can be set up
 as an interrupt.
 I have not even looked at the code required to make that actually work
 (especially since the
 lack of RTAI was the reason work in that direction stopped.)

 Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Michael Haberler

Alex dug this out on Xenomai on the Rpi and it is an interesting read: 
http://www.raspberrypi.org/phpBB3/viewtopic.php?t=12368p=154691

 A quick (very quick) test shows typical latencies in the order of 20-30uS and 
 peaking at ~70uS for user space tasks. The kernel space latencies are even 
 better and look pretty solid at around 15uS.

That could mean Rpi+Xenomai is actually usable with soft stepgen (assuming it 
doesnt run out of steam on doing FP in motion)

also it seems this kernel has the hires timer issue resolved:

 If power management is enabled, the 1MHz System Timer will be used. If power 
 management is disabled, the ARM Timer, configured to run at 250MHz, will be 
 used instead.

-m

Am 10.09.2012 um 18:48 schrieb Jon Elson:

 Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525. 
 
 the D5252 is almost a factor of 6 faster than the Rpi for this benchmark
 
 Thanks much for doing this!  Not a great result, though.  My feeling is 
 that the
 Atom processors are marginal for LinuxCNC, especially in cases with long
 programs or contouring, where the slowness would be more obvious.
 So, if the Pi is 1/6th that speed, that will not be good at all.
 Exactly how this compares on LinuxCNC, where there is also a lot of
 non-FP code, isn't clear.  If LinuxCNC was run with the GUI on another
 system, it might be OK, and for special projects which are not typical
 machines, it might be fine.
 
 Jon
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread EBo
I took a moment and looked at that thread.  Those numbers are worst 
case.  Another posted ~2us with little load.  It would be nice to set up 
a latency tester which artificially mucked with some threads to get 
realistic numbers.

Hmmm... is there any instrumentation in the simulation code to 
calculate latency statistics with actual setups and configurations?  
That would be rather interesting...

On Mon, 10 Sep 2012 19:55:58 +0200, Michael Haberler wrote:
 Alex dug this out on Xenomai on the Rpi and it is an interesting
 read: 
 http://www.raspberrypi.org/phpBB3/viewtopic.php?t=12368p=154691

 A quick (very quick) test shows typical latencies in the order of 
 20-30uS and peaking at ~70uS for user space tasks. The kernel space 
 latencies are even better and look pretty solid at around 15uS.

 That could mean Rpi+Xenomai is actually usable with soft stepgen
 (assuming it doesnt run out of steam on doing FP in motion)

 also it seems this kernel has the hires timer issue resolved:

 If power management is enabled, the 1MHz System Timer will be used. 
 If power management is disabled, the ARM Timer, configured to run at 
 250MHz, will be used instead.

 -m

 Am 10.09.2012 um 18:48 schrieb Jon Elson:

 Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525.

 the D5252 is almost a factor of 6 faster than the Rpi for this 
 benchmark

 Thanks much for doing this!  Not a great result, though.  My feeling 
 is
 that the
 Atom processors are marginal for LinuxCNC, especially in cases with 
 long
 programs or contouring, where the slowness would be more obvious.
 So, if the Pi is 1/6th that speed, that will not be good at all.
 Exactly how this compares on LinuxCNC, where there is also a lot of
 non-FP code, isn't clear.  If LinuxCNC was run with the GUI on 
 another
 system, it might be OK, and for special projects which are not 
 typical
 machines, it might be fine.

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread Kent A. Reed
On 9/10/2012 10:45 AM, Michael Haberler wrote:
 here's linpack figures for the Rpi and an Intel D525.

 the D5252 is almost a factor of 6 faster than the Rpi for this benchmark

 (pull test code with wget http://www.netlib.org/benchmark/linpackc.new)

 pi@raspberrypi ~/tests $ gcc -O linpackc.c -lm -olinpackc
 pi@raspberrypi ~/tests $ ./linpackc
 Enter array size (q to quit) [200]:
 Memory required:  315K.


 LINPACK benchmark, Double precision.
 Machine precision:  15 digits.
 Array size 200 X 200.
 Average rolled and unrolled performance:

  Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
16   0.66  90.91%   3.03%   6.06%  35440.860
32   1.33  88.72%   3.01%   8.27%  36021.858
64   2.64  88.26%   2.65%   9.09%  36622.222
   128   5.28  89.58%   3.22%   7.20%  35874.830
   256  10.56  88.92%   3.12%   7.95%  36170.096


 mah@atom:~/src$ gcc -O linpackc.c  -lm
 linpackc.c: In function 'main':
 linpackc.c:78: warning: ignoring return value of '€˜fgets'€™, declared with 
 attribute warn_unused_result
 mah@atom:~/src$ ./a.out
 Enter array size (q to quit) [200]:
 Memory required:  315K.


 LINPACK benchmark, Double precision.
 Machine precision:  15 digits.
 Array size 200 X 200.
 Average rolled and unrolled performance:

  Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
 
   128   0.96  86.46%   3.12%  10.42%  204403.101
   256   1.91  87.96%   1.05%  10.99%  206807.843
   512   3.82  87.43%   2.62%   9.95%  204403.101
  1024   7.63  87.68%   2.36%   9.96%  204700.631
  2048  15.26  87.42%   2.82%   9.76%  204254.660



I wanted to point to http://elinux.org/Rpi_Performance earlier but I 
couldn't remember where I had seen the numbers.

They reported marginally (ca 15 percent) better LINPACK performance with 
their RPi at 700MHz and managed ca 60KFLOPS by overclocking to 1000MHz.

Your numbers also don't seem out of line with 
http://www.ptxdist.org/development/kernel/arm-benchmarks-20100729_en.html, 
although they tested a BeagleBoard.

I remember feeling ok in the Spring about my BeagleBoard-XM because I 
knew the Raspberry Pi ARM11 cpu uses the older ARMv6 instruction set*; 
then I felt queazy when I realized the RPi includes VFP; now I am 
bemused to read the following (from 
http://vanshardware.com/2010/08/mirror-the-coming-war-arm-versus-x86/ 
which tested yet another ARM system)

 Oddly enough, during our performance optimization experiments, Neon 
 generated the same level of double-precision performance as the VFP, 
 while doubling the VFP’s single-precision performance. When we asked 
 ARM about this, company representatives replied, “NEON improves FP 
 performance significantly. The compiler should be directed to use NEON 
 over the VFP.”


Finally, from mathtest.c comes this 2004 comment by Paul Comer (drawn 
from notes by Fred Proctor)

 /*
math functions are:

extern double sin(double);used in posemath, siggen,  
 noncartesian kins
extern double cos(double);used in posemath, siggen,  
 noncartesian kins
extern double tan(double);not used in RT
extern double asin(double);   not used in RT
extern double acos(double);   used in posemath  noncartesian kins
extern double atan2(double, double);  used in posemath  noncartesian kins
extern double sinh(double);   not used in RT
extern double cosh(double);   not used in RT
extern double tanh(double);   not used in RT
extern double exp(double);not used in RT
extern double log(double);not used in RT
extern double log10(double);  not used in RT
extern double pow(double, double);not used in RT
extern double sqrt(double);   used in tc, segmot,  noncartesean 
 kins.
extern double ceil(double);   used in segmot  emcpid
extern double floor(double);  used by siggen  segmot
extern double fabs(double);   used a lot in RT
extern double ldexp(double, int); not used in RT

extern double sincos(double, double *, double *); Is called at four places 
 in
  posemath - None of the 
 resulting
  functions are used in 
 EMC.
Extras:

extern int isnan(double); Not used directly in RT - But is 
 called
  by several (all ?) of the floating 
 point
   math functions.
 */

Obviously, this ignores the pedestrian functions like add, subtract, 
multiply, divide, negate, and compare, but do you suppose this is still 
an accurate accounting of the floating-point math functions used in 
LinuxCNC?

Regards,
Kent


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread dave
On Mon, 2012-09-10 at 16:41 -0400, Kent A. Reed wrote:
 On 9/10/2012 10:45 AM, Michael Haberler wrote:
  here's linpack figures for the Rpi and an Intel D525.
 
  the D5252 is almost a factor of 6 faster than the Rpi for this benchmark
 
  (pull test code with wget http://www.netlib.org/benchmark/linpackc.new)
 
  pi@raspberrypi ~/tests $ gcc -O linpackc.c -lm -olinpackc
  pi@raspberrypi ~/tests $ ./linpackc
  Enter array size (q to quit) [200]:
  Memory required:  315K.
 
 
  LINPACK benchmark, Double precision.
  Machine precision:  15 digits.
  Array size 200 X 200.
  Average rolled and unrolled performance:
 
   Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
  
 16   0.66  90.91%   3.03%   6.06%  35440.860
 32   1.33  88.72%   3.01%   8.27%  36021.858
 64   2.64  88.26%   2.65%   9.09%  36622.222
128   5.28  89.58%   3.22%   7.20%  35874.830
256  10.56  88.92%   3.12%   7.95%  36170.096
 
 
  mah@atom:~/src$ gcc -O linpackc.c  -lm
  linpackc.c: In function 'main':
  linpackc.c:78: warning: ignoring return value of '€˜fgets'€™, declared with 
  attribute warn_unused_result
  mah@atom:~/src$ ./a.out
  Enter array size (q to quit) [200]:
  Memory required:  315K.
 
 
  LINPACK benchmark, Double precision.
  Machine precision:  15 digits.
  Array size 200 X 200.
  Average rolled and unrolled performance:
 
   Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
  
128   0.96  86.46%   3.12%  10.42%  204403.101
256   1.91  87.96%   1.05%  10.99%  206807.843
512   3.82  87.43%   2.62%   9.95%  204403.101
   1024   7.63  87.68%   2.36%   9.96%  204700.631
   2048  15.26  87.42%   2.82%   9.76%  204254.660
 
 
 
 I wanted to point to http://elinux.org/Rpi_Performance earlier but I 
 couldn't remember where I had seen the numbers.
 
 They reported marginally (ca 15 percent) better LINPACK performance with 
 their RPi at 700MHz and managed ca 60KFLOPS by overclocking to 1000MHz.
 
 Your numbers also don't seem out of line with 
 http://www.ptxdist.org/development/kernel/arm-benchmarks-20100729_en.html, 
 although they tested a BeagleBoard.
 
 I remember feeling ok in the Spring about my BeagleBoard-XM because I 
 knew the Raspberry Pi ARM11 cpu uses the older ARMv6 instruction set*; 
 then I felt queazy when I realized the RPi includes VFP; now I am 
 bemused to read the following (from 
 http://vanshardware.com/2010/08/mirror-the-coming-war-arm-versus-x86/ 
 which tested yet another ARM system)

A most interesting link! It does look like ARM8 does need to pick up
some processing power. The really interesting thing was the embedded
crypto capability of a couple of the chips. Too bad we don't need that
kind of power. ;-) Still the only thing that really counts is enough
speed to handle motion. We should be able to pass the GUI off to a
dedicated X-term and likewise boards from Jon and Peter are clearly
capable of driving the steppers/servos and handling discrete I/O.
Better cpu's seem to be coming; the tough part is in the waiting. :-)

Dave 

 
  Oddly enough, during our performance optimization experiments, Neon 
  generated the same level of double-precision performance as the VFP, 
  while doubling the VFP’s single-precision performance. When we asked 
  ARM about this, company representatives replied, “NEON improves FP 
  performance significantly. The compiler should be directed to use NEON 
  over the VFP.”
 
 
 Finally, from mathtest.c comes this 2004 comment by Paul Comer (drawn 
 from notes by Fred Proctor)
 
  /*
 math functions are:
 
 extern double sin(double);used in posemath, siggen,  
  noncartesian kins
 extern double cos(double);used in posemath, siggen,  
  noncartesian kins
 extern double tan(double);not used in RT
 extern double asin(double);   not used in RT
 extern double acos(double);   used in posemath  noncartesian 
  kins
 extern double atan2(double, double);  used in posemath  noncartesian 
  kins
 extern double sinh(double);   not used in RT
 extern double cosh(double);   not used in RT
 extern double tanh(double);   not used in RT
 extern double exp(double);not used in RT
 extern double log(double);not used in RT
 extern double log10(double);  not used in RT
 extern double pow(double, double);not used in RT
 extern double sqrt(double);   used in tc, segmot,  noncartesean 
  kins.
 extern double ceil(double);   used in segmot  emcpid
 extern double floor(double);  used by siggen  segmot
 extern double fabs(double);   used a lot in RT
 extern double ldexp(double, int); not used in RT
 
 extern double sincos(double, double *, double *); Is called at four 
  places in
 

Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-10 Thread EBo
Artec has built a 6 dof NURB in FPGA, and hacked EMC2 (sim) to feed it. 
An open source solution for FPGA would be fascinating to me, but the 
problem might have already been solved.  What do you want to do that is 
different than their solution?

On Tue, 11 Sep 2012 00:23:44 +0300, Topi Rinkinen wrote:
 Hi,

 I have RPi playing Internet radio, and another one waiting for some 
 fun
 activities.
 I have been thinking integrating a small FPGA or CPLD with RPi,
 especially targeted to CNC or motor control applications.
 For starters one could use Lattice's MachXO2 based evaluation kits 
 (USD
 30), and connect it to GPIO connector of RPi.

 But I don't know anything about EMC2 software architecture, so I 
 cannot
 start easily.

 My background is in FPGA design, and I think I can quite quickly 
 develop
 a library of needed VHDL modules to be run on CPLD/FPGA.
 If someone other could compile a list of activities that need FPGA's
 realtime and rough specifications, I can start coding the modules.

 BR, -Topi


 On Mon, 2012-09-10 at 16:41 -0400, Kent A. Reed wrote:
 On 9/10/2012 10:45 AM, Michael Haberler wrote:
  here's linpack figures for the Rpi and an Intel D525.
 
  the D5252 is almost a factor of 6 faster than the Rpi for this 
 benchmark
 
  (pull test code with wget 
 http://www.netlib.org/benchmark/linpackc.new)
 
  pi@raspberrypi ~/tests $ gcc -O linpackc.c -lm -olinpackc
  pi@raspberrypi ~/tests $ ./linpackc
  Enter array size (q to quit) [200]:
  Memory required:  315K.
 
 
  LINPACK benchmark, Double precision.
  Machine precision:  15 digits.
  Array size 200 X 200.
  Average rolled and unrolled performance:
 
   Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
  
 16   0.66  90.91%   3.03%   6.06%  35440.860
 32   1.33  88.72%   3.01%   8.27%  36021.858
 64   2.64  88.26%   2.65%   9.09%  36622.222
128   5.28  89.58%   3.22%   7.20%  35874.830
256  10.56  88.92%   3.12%   7.95%  36170.096
 
 
  mah@atom:~/src$ gcc -O linpackc.c  -lm
  linpackc.c: In function 'main':
  linpackc.c:78: warning: ignoring return value of '€˜fgets'€™, 
 declared with attribute warn_unused_result
  mah@atom:~/src$ ./a.out
  Enter array size (q to quit) [200]:
  Memory required:  315K.
 
 
  LINPACK benchmark, Double precision.
  Machine precision:  15 digits.
  Array size 200 X 200.
  Average rolled and unrolled performance:
 
   Reps Time(s) DGEFA   DGESL  OVERHEADKFLOPS
  
128   0.96  86.46%   3.12%  10.42%  204403.101
256   1.91  87.96%   1.05%  10.99%  206807.843
512   3.82  87.43%   2.62%   9.95%  204403.101
   1024   7.63  87.68%   2.36%   9.96%  204700.631
   2048  15.26  87.42%   2.82%   9.76%  204254.660
 


 I wanted to point to http://elinux.org/Rpi_Performance earlier but I
 couldn't remember where I had seen the numbers.

 They reported marginally (ca 15 percent) better LINPACK performance 
 with
 their RPi at 700MHz and managed ca 60KFLOPS by overclocking to 
 1000MHz.

 Your numbers also don't seem out of line with
 
 http://www.ptxdist.org/development/kernel/arm-benchmarks-20100729_en.html,
 although they tested a BeagleBoard.

 I remember feeling ok in the Spring about my BeagleBoard-XM because 
 I
 knew the Raspberry Pi ARM11 cpu uses the older ARMv6 instruction 
 set*;
 then I felt queazy when I realized the RPi includes VFP; now I am
 bemused to read the following (from
 
 http://vanshardware.com/2010/08/mirror-the-coming-war-arm-versus-x86/
 which tested yet another ARM system)

  Oddly enough, during our performance optimization experiments, 
 Neon
  generated the same level of double-precision performance as the 
 VFP,
  while doubling the VFP’s single-precision performance. When we 
 asked
  ARM about this, company representatives replied, “NEON improves FP
  performance significantly. The compiler should be directed to use 
 NEON
  over the VFP.”


 Finally, from mathtest.c comes this 2004 comment by Paul Comer 
 (drawn
 from notes by Fred Proctor)

  /*
 math functions are:
 
 extern double sin(double);used in posemath, siggen, 
  noncartesian kins
 extern double cos(double);used in posemath, siggen, 
  noncartesian kins
 extern double tan(double);not used in RT
 extern double asin(double);   not used in RT
 extern double acos(double);   used in posemath  
 noncartesian kins
 extern double atan2(double, double);  used in posemath  
 noncartesian kins
 extern double sinh(double);   not used in RT
 extern double cosh(double);   not used in RT
 extern double tanh(double);   not used in RT
 extern double exp(double);not used in RT
 extern double log(double);not used in RT
 extern double log10(double);  not used in RT
 extern double pow(double, double); 

Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-09 Thread Kent A. Reed
On 9/8/2012 3:18 PM, Michael Haberler wrote:
 also, this was a stock kernel and I dont know if the configure options are 
 great or useless

 maybe somebody aware of rt-preempt configuration can look over 
 this:http://git.mah.priv.at/gitweb/raspberry-test.git/blob/7791f6c3f5c37242334511fda7187a2d0bddda54:/proc_config_gz.txt

 - Michael

I haven't even worked my way through all the kernel configuration 
options for x86 CPUs.

What with the differences between different IP cores from ARM Holdings, 
different CPUs from licensees of the IP cores, and different boards 
integrating lots of other stuff to these CPUs from folks like 
BeagleBoard, the Raspberry Foundation, etc., I am in a state of 
perpetual confusion:-)

It's nice that the latencies you are seeing with your Raspberry PI seem 
comparable to the latencies Jon Elson reported earlier for his 
BeagleBoard so maybe we are slouching toward daylight.

I'm still waiting for my first R-PI order to be fulfilled here in the 
USA at a time when I can get other ARM-based boards in the blink of an 
eye. Nice to see Farnell has completed arrangements to start up 
production in the UK.


Regards,
Kent


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-09 Thread Jon Elson
Kent A. Reed wrote:

 What with the differences between different IP cores from ARM Holdings, 
 different CPUs from licensees of the IP cores, and different boards 
 integrating lots of other stuff to these CPUs from folks like 
 BeagleBoard, the Raspberry Foundation, etc., I am in a state of 
 perpetual confusion:-)

   
Yes, you really have to select one, based on insufficient info, and try 
to make it do something
useful.  There will be a new board every couple months (like Beagle now 
has 3 products,
all significantly different.)
 It's nice that the latencies you are seeing with your Raspberry PI seem 
 comparable to the latencies Jon Elson reported earlier for his 
 BeagleBoard so maybe we are slouching toward daylight.
   
I have not reported any thread latencies for the Beagle.  I do know 
quite a bit about using
the GPIO and the bare performance of that.  I have never run an RT 
kernel on the
Beagle, but would be very interested to know about the latency and also 
floating
point performance of the system.  As for interrupts and timers, if you 
accept that
you have to add FPGA hardware to the CPU for step generation, encoder 
counting
or whatever, then you can have that add-on produce the interrupts for 
the RT thread
at any rate you choose.  If you are going to use the 10 KHz timer of the 
Pi, then you
could divide down and only do the servo thread every 2, 5 or 10 ticks of the
timer.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-09 Thread Kent A. Reed
On 9/9/2012 1:54 PM, Jon Elson wrote:
 ... I have not reported any thread latencies for the Beagle.


Sorry, Jon. Looking back I see you were talking about how fast one could 
drive GPIO pins. My memory is getting rustier by the day.

 ... I have never run an RT kernel on the
 Beagle, but would be very interested to know about the latency and also
 floating point performance of the system.

You've mentioned floating-point performance in the past. Do we have any 
benchmarking for that?

 ... As for interrupts and timers, if you accept that
 you have to add FPGA hardware to the CPU for step generation, encoder counting
 or whatever, then you can have that add-on produce the interrupts for the RT 
 thread
 at any rate you choose.

In my philosophy, Horatio, this is a perfectly acceptable requirement 
and I look forward to products from you and Peter. I accept as well that 
they may have to be tailored to specific ARM-based systems for the 
reasons just mentioned.

Regards,
Kent


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-09 Thread Jon Elson
Kent A. Reed wrote:
 On 9/9/2012 1:54 PM, Jon Elson wrote:
   
 ... I have not reported any thread latencies for the Beagle.

 
 Sorry, Jon. Looking back I see you were talking about how fast one could 
 drive GPIO pins. My memory is getting rustier by the day.
 
And, mine isn't getting better by the day, either.
 You've mentioned floating-point performance in the past. Do we have any 
 benchmarking for that?
   
There certainly are standard benchmarks that can be run on Linux systems 
that could be
quite useful.  I haven't seen anybody post numbers, but likely they 
already exist on
the web, somewhere.  A quick search didn't show any published results 
comparing
say, the Beagle Board's OMAP 3430 against an Intel Atom, for instance, 
which would
be a good comparison.
 ... As for interrupts and timers, if you accept that
 you have to add FPGA hardware to the CPU for step generation, encoder 
 counting
 or whatever, then you can have that add-on produce the interrupts for the RT 
 thread
 at any rate you choose.
 

 In my philosophy, Horatio, this is a perfectly acceptable requirement 
 and I look forward to products from you and Peter. I accept as well that 
 they may have to be tailored to specific ARM-based systems for the 
 reasons just mentioned.
   
I have built an adapter to connect my boards to the Beagle and emulate 
the IEEE-1284 par port in
software.  It worked, and wasn't horribly slow, compared to a PC.  I 
didn't worry about the
interrupt line, but on the Beagle, at least, ANY GPIO pin can be set up 
as an interrupt.
I have not even looked at the code required to make that actually work 
(especially since the
lack of RTAI was the reason work in that direction stopped.)

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-09 Thread Darren Conway
Hi
If the Raspberry is to difficult to run as a CNC controller, maybe it 
would be suited as the basis of a pendant?

Regards

Darren Conway

On 10/09/2012 9:35 a.m., Jon Elson wrote:
 Kent A. Reed wrote:
 On 9/9/2012 1:54 PM, Jon Elson wrote:

 ... I have not reported any thread latencies for the Beagle.

  
 Sorry, Jon. Looking back I see you were talking about how fast one could
 drive GPIO pins. My memory is getting rustier by the day.
  
 And, mine isn't getting better by the day, either.
 You've mentioned floating-point performance in the past. Do we have any
 benchmarking for that?

 There certainly are standard benchmarks that can be run on Linux systems
 that could be
 quite useful.  I haven't seen anybody post numbers, but likely they
 already exist on
 the web, somewhere.  A quick search didn't show any published results
 comparing
 say, the Beagle Board's OMAP 3430 against an Intel Atom, for instance,
 which would
 be a good comparison.
 ... As for interrupts and timers, if you accept that
 you have to add FPGA hardware to the CPU for step generation, encoder 
 counting
 or whatever, then you can have that add-on produce the interrupts for the 
 RT thread
 at any rate you choose.
  
 In my philosophy, Horatio, this is a perfectly acceptable requirement
 and I look forward to products from you and Peter. I accept as well that
 they may have to be tailored to specific ARM-based systems for the
 reasons just mentioned.

 I have built an adapter to connect my boards to the Beagle and emulate
 the IEEE-1284 par port in
 software.  It worked, and wasn't horribly slow, compared to a PC.  I
 didn't worry about the
 interrupt line, but on the Beagle, at least, ANY GPIO pin can be set up
 as an interrupt.
 I have not even looked at the code required to make that actually work
 (especially since the
 lack of RTAI was the reason work in that direction stopped.)

 Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Michael Haberler
I've done some bit-bang timing measurements for the Raspberry GPIO pins

see 
http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062

I'm not saying the Pi has many cycles left at 220nS transition spacing, but the 
'slow ARM IO myth' seems to be just that, memory mapped IO is roughly an order 
of magnitude faster than I ever got with a PC parport driven from a user 
process; interrupt latency is another issue but GPIO in this style doesnt use it

- Michael


Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.
 
 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.
 
 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.
 
 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).
 
 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.
 
 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.
 
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.
 
 - -- 
 Charles Steinkuehler
 char...@steinkuehler.net
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (MingW32)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
 
 iEYEARECAAYFAlAJa6IACgkQLywbqEHdNFyNjwCfTVchMrwrcmA2RZ78hoYM0OEa
 zn0AoOyTZa74B1MnFaDOL2HqUxG5LwOH
 =Dmby
 -END PGP SIGNATURE-
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Kenneth Lerman
Michael,

I took a quick look at the code and am wondering why there is a call to 
delay within the loop. The delay function is called with a value of n 
(default value is ten) which causes a loop incrementing a counter n 
times.  What effect does the delay constant have on the timing?

It's also worth noting that depending on the compiler and the 
optimization level chosen, the delay function might be optimized out so 
as to have no affect. To avoid such unwanted optimization, the variable 
being counted could be declared global and volatile.

[I recognize that at least part of this code was written by others.]

I've often commented that there is no value in arguing how many angels 
can dance on the head of a pin -- you need to get out there and count 
them. Thank you for doing that.

Regards,

Ken


On 9/8/2012 6:43 AM, Michael Haberler wrote:
 I've done some bit-bang timing measurements for the Raspberry GPIO pins

 see 
 http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062

 I'm not saying the Pi has many cycles left at 220nS transition spacing, but 
 the 'slow ARM IO myth' seems to be just that, memory mapped IO is roughly an 
 order of magnitude faster than I ever got with a PC parport driven from a 
 user process; interrupt latency is another issue but GPIO in this style 
 doesnt use it

 - Michael


 Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1

 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.

 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.
 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.

 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).

 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.

 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.

 - -- 
 Charles Steinkuehler
 char...@steinkuehler.net
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (MingW32)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/

 iEYEARECAAYFAlAJa6IACgkQLywbqEHdNFyNjwCfTVchMrwrcmA2RZ78hoYM0OEa
 zn0AoOyTZa74B1MnFaDOL2HqUxG5LwOH
 =Dmby
 -END PGP SIGNATURE-

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Michael Haberler

Am 08.09.2012 um 16:48 schrieb Kenneth Lerman:

 Michael,
 
 I took a quick look at the code and am wondering why there is a call to 
 delay within the loop. The delay function is called with a value of n 
 (default value is ten) which causes a loop incrementing a counter n 
 times.  What effect does the delay constant have on the timing?

I know it's a hack (this aint our hal_gpio merge candidate just yet ;) - the 
reason: 

clock_nanosleep() is pretty useless at least on my current kernel (stock; Linux 
raspberrypi 3.2.27+ #102 PREEMPT Sat Sep 1 01:00:50 BST 2012 armv6l GNU/Linux) 
- it gave a minimum delay of some 25usec 

I've tried adapting the swave.c example from the RT linux wiki - same thing: 
http://git.mah.priv.at/gitweb/raspberry-test.git/shortlog/refs/heads/rt-gpio

see e.g. http://www.raspberrypi.org/phpBB3/viewtopic.php?f=29t=9882

one would have to dig, eg in 
https://github.com/raspberrypi/linux/blob/rpi-patches/arch/arm/mach-bcm2708/bcm2708.c
 to find out if corners were taken which are fixable or the architecture wont 
support acceptable precision timing 

if anything this seems to be the issue with the Rpi as an LinuxCNC realtime 
outboard, not io path latency

still great for the sprinkler application though


 
 It's also worth noting that depending on the compiler and the 
 optimization level chosen, the delay function might be optimized out so 
 as to have no affect. To avoid such unwanted optimization, the variable 
 being counted could be declared global and volatile.
 
 [I recognize that at least part of this code was written by others.]
 
 I've often commented that there is no value in arguing how many angels 
 can dance on the head of a pin -- you need to get out there and count 
 them. Thank you for doing that.

yeah, my armchair expert detector started wailing, and I cant credibly bitch 
about 'musings and conjecture' without actually doing it myself, so I had to 
cook this up: http://static.mah.priv.at/public/rpi-lport.jpg ;)

is your German good enough for Wer misst, misst Mist!? I appreciate the look 
over the shoulder.

- Michael

 
 Regards,
 
 Ken
 
 
 On 9/8/2012 6:43 AM, Michael Haberler wrote:
 I've done some bit-bang timing measurements for the Raspberry GPIO pins
 
 see 
 http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062
 
 I'm not saying the Pi has many cycles left at 220nS transition spacing, but 
 the 'slow ARM IO myth' seems to be just that, memory mapped IO is roughly an 
 order of magnitude faster than I ever got with a PC parport driven from a 
 user process; interrupt latency is another issue but GPIO in this style 
 doesnt use it
 
 - Michael
 
 
 Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:
 
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.
 
 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.
 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.
 
 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).
 
 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.
 
 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.
 
 - -- 
 Charles Steinkuehler
 char...@steinkuehler.net
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (MingW32)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
 
 iEYEARECAAYFAlAJa6IACgkQLywbqEHdNFyNjwCfTVchMrwrcmA2RZ78hoYM0OEa
 zn0AoOyTZa74B1MnFaDOL2HqUxG5LwOH
 =Dmby
 -END PGP SIGNATURE-
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Michael Haberler
I forgot to mention:

with a delay counter  10 there's no signal output at all; obviously the CPU 
overwhelms the IO path in that case

-m

Am 08.09.2012 um 17:41 schrieb Michael Haberler:

 
 Am 08.09.2012 um 16:48 schrieb Kenneth Lerman:
 
 Michael,
 
 I took a quick look at the code and am wondering why there is a call to 
 delay within the loop. The delay function is called with a value of n 
 (default value is ten) which causes a loop incrementing a counter n 
 times.  What effect does the delay constant have on the timing?
 
 I know it's a hack (this aint our hal_gpio merge candidate just yet ;) - the 
 reason: 
 
 clock_nanosleep() is pretty useless at least on my current kernel (stock; 
 Linux raspberrypi 3.2.27+ #102 PREEMPT Sat Sep 1 01:00:50 BST 2012 armv6l 
 GNU/Linux) - it gave a minimum delay of some 25usec 
 
 I've tried adapting the swave.c example from the RT linux wiki - same thing: 
 http://git.mah.priv.at/gitweb/raspberry-test.git/shortlog/refs/heads/rt-gpio
 
 see e.g. http://www.raspberrypi.org/phpBB3/viewtopic.php?f=29t=9882
 
 one would have to dig, eg in 
 https://github.com/raspberrypi/linux/blob/rpi-patches/arch/arm/mach-bcm2708/bcm2708.c
  to find out if corners were taken which are fixable or the architecture wont 
 support acceptable precision timing 
 
 if anything this seems to be the issue with the Rpi as an LinuxCNC realtime 
 outboard, not io path latency
 
 still great for the sprinkler application though
 
 
 
 It's also worth noting that depending on the compiler and the 
 optimization level chosen, the delay function might be optimized out so 
 as to have no affect. To avoid such unwanted optimization, the variable 
 being counted could be declared global and volatile.
 
 [I recognize that at least part of this code was written by others.]
 
 I've often commented that there is no value in arguing how many angels 
 can dance on the head of a pin -- you need to get out there and count 
 them. Thank you for doing that.
 
 yeah, my armchair expert detector started wailing, and I cant credibly bitch 
 about 'musings and conjecture' without actually doing it myself, so I had to 
 cook this up: http://static.mah.priv.at/public/rpi-lport.jpg ;)
 
 is your German good enough for Wer misst, misst Mist!? I appreciate the 
 look over the shoulder.
 
 - Michael
 
 
 Regards,
 
 Ken
 
 
 On 9/8/2012 6:43 AM, Michael Haberler wrote:
 I've done some bit-bang timing measurements for the Raspberry GPIO pins
 
 see 
 http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062
 
 I'm not saying the Pi has many cycles left at 220nS transition spacing, but 
 the 'slow ARM IO myth' seems to be just that, memory mapped IO is roughly 
 an order of magnitude faster than I ever got with a PC parport driven from 
 a user process; interrupt latency is another issue but GPIO in this style 
 doesnt use it
 
 - Michael
 
 
 Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:
 
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.
 
 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.
 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.
 
 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).
 
 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.
 
 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.
 
 - -- 
 Charles Steinkuehler
 char...@steinkuehler.net
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (MingW32)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
 
 iEYEARECAAYFAlAJa6IACgkQLywbqEHdNFyNjwCfTVchMrwrcmA2RZ78hoYM0OEa
 zn0AoOyTZa74B1MnFaDOL2HqUxG5LwOH
 =Dmby
 -END PGP 

Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Kenneth Lerman
google translate helped me with the translation in your previous email. :-)
My High School German studies ended over fifty years ago -- and I wasn't 
very good at it then.

I'd be interested in seeing what the data sheet says about the need for 
that delay.

Ken

On 9/8/2012 11:46 AM, Michael Haberler wrote:
 I forgot to mention:

 with a delay counter  10 there's no signal output at all; obviously the CPU 
 overwhelms the IO path in that case

 -m

 Am 08.09.2012 um 17:41 schrieb Michael Haberler:

 Am 08.09.2012 um 16:48 schrieb Kenneth Lerman:

 Michael,

 I took a quick look at the code and am wondering why there is a call to
 delay within the loop. The delay function is called with a value of n
 (default value is ten) which causes a loop incrementing a counter n
 times.  What effect does the delay constant have on the timing?
 I know it's a hack (this aint our hal_gpio merge candidate just yet ;) - the 
 reason:

 clock_nanosleep() is pretty useless at least on my current kernel (stock; 
 Linux raspberrypi 3.2.27+ #102 PREEMPT Sat Sep 1 01:00:50 BST 2012 armv6l 
 GNU/Linux) - it gave a minimum delay of some 25usec

 I've tried adapting the swave.c example from the RT linux wiki - same thing: 
 http://git.mah.priv.at/gitweb/raspberry-test.git/shortlog/refs/heads/rt-gpio

 see e.g. http://www.raspberrypi.org/phpBB3/viewtopic.php?f=29t=9882

 one would have to dig, eg in 
 https://github.com/raspberrypi/linux/blob/rpi-patches/arch/arm/mach-bcm2708/bcm2708.c
  to find out if corners were taken which are fixable or the architecture 
 wont support acceptable precision timing

 if anything this seems to be the issue with the Rpi as an LinuxCNC realtime 
 outboard, not io path latency

 still great for the sprinkler application though


 It's also worth noting that depending on the compiler and the
 optimization level chosen, the delay function might be optimized out so
 as to have no affect. To avoid such unwanted optimization, the variable
 being counted could be declared global and volatile.

 [I recognize that at least part of this code was written by others.]

 I've often commented that there is no value in arguing how many angels
 can dance on the head of a pin -- you need to get out there and count
 them. Thank you for doing that.
 yeah, my armchair expert detector started wailing, and I cant credibly bitch 
 about 'musings and conjecture' without actually doing it myself, so I had to 
 cook this up: http://static.mah.priv.at/public/rpi-lport.jpg ;)

 is your German good enough for Wer misst, misst Mist!? I appreciate the 
 look over the shoulder.

 - Michael

 Regards,

 Ken


 On 9/8/2012 6:43 AM, Michael Haberler wrote:
 I've done some bit-bang timing measurements for the Raspberry GPIO pins

 see 
 http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062

 I'm not saying the Pi has many cycles left at 220nS transition spacing, 
 but the 'slow ARM IO myth' seems to be just that, memory mapped IO is 
 roughly an order of magnitude faster than I ever got with a PC parport 
 driven from a user process; interrupt latency is another issue but GPIO in 
 this style doesnt use it

 - Michael


 Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1

 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.

 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.
 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.

 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).

 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.

 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.

 - -- 
 Charles Steinkuehler
 char...@steinkuehler.net
 

Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Lars Segerlund
 A quick question, youre running preempt-rt on a raspberry pi, I might
be wrong on this, but I think there is a patch for the linux kernel
lowering the latency for context switching by running in a single
virtual adress space  ( ie. the arm doesn't have to copy the
caches when it context switches ). If the patch is appliable to your
cpu it would lower latency MUCH.

 If not I am barking up a tree .. :-D 

 I don't remember much but it was similar to this, worth checking out 
  
http://www.denx.de/en/pub/News/Xum2009AbstractsAndPresentations/The_ARM_Fast_Context_Switch_Extension_for_Linux.pdf

Were talking ARM 5 here 

 / regards, Lars Segerlund.


2012/9/8 Michael Haberler mai...@mah.priv.at:
 I've done some bit-bang timing measurements for the Raspberry GPIO pins

 see 
 http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062

 I'm not saying the Pi has many cycles left at 220nS transition spacing, but 
 the 'slow ARM IO myth' seems to be just that, memory mapped IO is roughly an 
 order of magnitude faster than I ever got with a PC parport driven from a 
 user process; interrupt latency is another issue but GPIO in this style 
 doesnt use it

 - Michael


 Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1

 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.

 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.

 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.

 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).

 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.

 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.

 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.

 - --
 Charles Steinkuehler
 char...@steinkuehler.net
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (MingW32)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/

 iEYEARECAAYFAlAJa6IACgkQLywbqEHdNFyNjwCfTVchMrwrcmA2RZ78hoYM0OEa
 zn0AoOyTZa74B1MnFaDOL2HqUxG5LwOH
 =Dmby
 -END PGP SIGNATURE-

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-09-08 Thread Michael Haberler

Am 08.09.2012 um 21:08 schrieb Lars Segerlund:

 A quick question, youre running preempt-rt on a raspberry pi, I might
 be wrong on this, but I think there is a patch for the linux kernel
 lowering the latency for context switching by running in a single
 virtual adress space  ( ie. the arm doesn't have to copy the
 caches when it context switches ). If the patch is appliable to your
 cpu it would lower latency MUCH.
 
 If not I am barking up a tree .. :-D 
 
 I don't remember much but it was similar to this, worth checking out 
  
 http://www.denx.de/en/pub/News/Xum2009AbstractsAndPresentations/The_ARM_Fast_Context_Switch_Extension_for_Linux.pdf
 
 Were talking ARM 5 here 
 
 / regards, Lars Segerlund.

the problem is precision timer support in the kernel/by hardware I think, so I 
guess that's optimizing the wrong end

also, this was a stock kernel and I dont know if the configure options are 
great or useless

maybe somebody aware of rt-preempt configuration can look over this: 
http://git.mah.priv.at/gitweb/raspberry-test.git/blob/7791f6c3f5c37242334511fda7187a2d0bddda54:/proc_config_gz.txt

- Michael

 


 
 
 2012/9/8 Michael Haberler mai...@mah.priv.at:
 I've done some bit-bang timing measurements for the Raspberry GPIO pins
 
 see 
 http://linuxcnc.org/index.php/english/component/kunena/?func=viewcatid=18id=20514limit=6start=48#24062
 
 I'm not saying the Pi has many cycles left at 220nS transition spacing, but 
 the 'slow ARM IO myth' seems to be just that, memory mapped IO is roughly an 
 order of magnitude faster than I ever got with a PC parport driven from a 
 user process; interrupt latency is another issue but GPIO in this style 
 doesnt use it
 
 - Michael
 
 
 Am 20.07.2012 um 16:30 schrieb Charles Steinkuehler:
 
 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.
 
 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.
 
 I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
 my Pi when it comes in, but I'm not sure what sort of latencies to expect.
 
 On conventional PC hardware, I've gotten decent latency jitter with
 modern systems, but not yet down to the RTAI levels.  On older
 hardware latency with PREEMPT_RT is much worse, particularly on
 single-core systems (although I don't yet know if this is due to not
 having two cores to schedule between or because all my single-core
 systems are pretty ancient).
 
 I'm also hoping on the Arm it might be possible to use the fast IRQ
 and read/write the I/O pins in an ISR which may allow the servo thread
 to run with much higher jitter.
 
 Then there's the problem of gluing these boards to our CNC hardware
 about which I yield to Jon.
 
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.
 
 - --
 Charles Steinkuehler
 char...@steinkuehler.net
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.11 (MingW32)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
 
 iEYEARECAAYFAlAJa6IACgkQLywbqEHdNFyNjwCfTVchMrwrcmA2RZ78hoYM0OEa
 zn0AoOyTZa74B1MnFaDOL2HqUxG5LwOH
 =Dmby
 -END PGP SIGNATURE-
 
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-21 Thread Karl Schmidt
On 07/20/2012 09:38 PM, andy pugh wrote:
 On 21 July 2012 02:47, Charles Steinkuehlerchar...@steinkuehler.net  wrote:
 My understanding is that one of the first things the servo thread does
 when it wakes up is poll for the current position from the appropriate
 lower-level (software step generator, mesa hardware, or whatnot).

 It is, but I think that the problem is that hardware frequency
 generators don't count their pulses.

All depends on the hardware used and how it is configured - there is no reason 
this bit of 
electronics can't support position-counter registers.

Depending on the uP chip - they can have lots of pulse generators - each 
counter has around a dozen 
config registers - they can be set up to count on the pulse outputs from one of 
the other counters 
that is set up to generate the pulses - or you can set it up to count pulses 
via interrupts.  (The 
ARM cortex (thumb ) processors have very fast Interrupts.)

Or using a cheap FPGA - the counter register is just more logic.

The problem of doing this on a PC, is that the code running is not 
deterministic in time - the same 
instruction can take different amounts of time depending on what is going on, 
not only on the system 
level, but even on the micro-code level.

Single chip uP systems are much more deterministic for doing real-time work - 
(even these can have 
differing instruction times - the time to read a flash location can sometimes 
take an extra cycle - 
but there are ways to work around this. )

In my mind, a single chip uP system, with just a small assembly program, could 
do the pulse 
generation busy work and make the position information available to the 
PC-system with time left 
over to play an audio stream.  The question is if there is going to be a 
latency issue of bringing 
that position information back into the PC without any problematic latency - ( 
the outer loop is 
running much slower - so I doubt there is an issue. )





Karl Schmidt  EMail k...@xtronics.com
Transtronics, Inc.  WEB 
http://secure.transtronics.com
3209 West 9th Street Ph (785) 841-3089
Lawrence, KS 66049  FAX (785) 841-0434

Any cat would tell you that you can only wash one paw at a time;
while we try to do everything at once. -kps



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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-21 Thread Jon Elson
Karl Schmidt wrote:

 In my mind, a single chip uP system, with just a small assembly program, 
 could do the pulse 
 generation busy work and make the position information available to the 
 PC-system with time left 
 over to play an audio stream.  The question is if there is going to be a 
 latency issue of bringing 
 that position information back into the PC without any problematic latency - 
 ( the outer loop is 
 running much slower - so I doubt there is an issue. )
   
Yes, and an FPGA can do all that, with much better timing accuracy, and
for all axes in parallel.  All of this has already been done.  I was working
with the Beagle Board a couple years ago and built an adaptor to
connect one to my univeral stepper/PWM controllers, but was stopped by the
lack of an RT kernel.  I sent a Beagle Board to the ARM maintainer for
RTAI and hoped it would only take him a month or two to bring the
ARM version of RTAI up to date, but it hasn't happened.

I'm guessing the preempt kernel might be OK for hardware-assisted
motion systems, but probably not for software-generated stepping.

If somebody wants to try to build a driver for the ARM on-chip
peripherals that would be very interesting.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-21 Thread Jon Elson
Karl Schmidt wrote:
   The question is if there is going to be a latency issue of bringing 
 that position information back into the PC without any problematic latency - 
 ( the outer loop is 
 running much slower - so I doubt there is an issue. )
   
Shouldn't be much problem reading a register.  I have figured out how to
access the ARM GPIO registers and built some embedded systems.
But, the tech reference manual for the Beagle Board's CPU is 1700
pages!  Very hard to decipher.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-21 Thread Jon Elson
Jon Elson wrote:
 If somebody wants to try to build a driver for the ARM on-chip
 peripherals that would be very interesting.
   
Oh, one other problem with most of these systems is that only a VERY 
small portion
of the available package pins are brought out to expansion header pins 
on the board.
If the functions you want to use can only be multiplexed to package 
balls that are
not brought out, you can't use that I/O function.  That has been a big 
problem on
the Beagle Board, it has DOZENS of tantalizing I/O devices, but only about
20 package balls have been brought out to the expansion header.  The 
Beagle Bone
has more pins brought out, it appears the Pi has even less.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread andy pugh
On 20 July 2012 07:38, Darren Conway darren.con...@xtra.co.nz wrote:

 Would the Raspberry Pi be a candidate for running EMC?

Quite possibly, yes.
Some discussion here:
http://www.raspberrypi.org/phpBB3/viewtopic.php?f=7t=1847
and here:
http://www.raspberrypi.org/phpBB3/viewtopic.php?f=2t=2376

When mine arrives it will definitely be something I at least play with.

-- 
atp
If you can't fix it, you don't own it.
http://www.ifixit.com/Manifesto

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Kent A. Reed
On 7/20/2012 4:57 AM, andy pugh wrote:
 On 20 July 2012 07:38, Darren Conway darren.con...@xtra.co.nz wrote:

 Would the Raspberry Pi be a candidate for running EMC?
 Quite possibly, yes.
 Some discussion here:
 http://www.raspberrypi.org/phpBB3/viewtopic.php?f=7t=1847
 and here:
 http://www.raspberrypi.org/phpBB3/viewtopic.php?f=2t=2376

 When mine arrives it will definitely be something I at least play with.


Well, my US vendor tells me my RPi should be shipped finally! in late 
August, so you have at least a month to get LinuxCNC working on it:-)

On a more serious note, as has been discussed on the two emc mail lists, 
the road to ARM is littered with ideas but so far we have little result.

The nicely done miniEMC2 project by Sergey Kaydalov is the most complete 
effort I know of. It employed the higher-latency Xenomi code rather than 
RTAI. Inquiring minds want to know more about the possibility of porting 
this code or something like it to boards like the RPi or BB and about 
the resulting performance attainable. I wish I could have tackled this 
already but I've got too many family issues at the moment.

Then there's the problem of gluing these boards to our CNC hardware 
about which I yield to Jon.

Lay on MacDuff.

Regards,
Kent


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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Charles Steinkuehler
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 7/20/2012 9:11 AM, Kent A. Reed wrote:
 On a more serious note, as has been discussed on the two emc mail
 lists, the road to ARM is littered with ideas but so far we have
 little result.
 
 The nicely done miniEMC2 project by Sergey Kaydalov is the most
 complete effort I know of. It employed the higher-latency Xenomi
 code rather than RTAI. Inquiring minds want to know more about the
 possibility of porting this code or something like it to boards
 like the RPi or BB and about the resulting performance attainable.
 I wish I could have tackled this already but I've got too many
 family issues at the moment.

I'm planning on trying to use the PREEMPT_RT version of LinuxCNC with
my Pi when it comes in, but I'm not sure what sort of latencies to expect.

On conventional PC hardware, I've gotten decent latency jitter with
modern systems, but not yet down to the RTAI levels.  On older
hardware latency with PREEMPT_RT is much worse, particularly on
single-core systems (although I don't yet know if this is due to not
having two cores to schedule between or because all my single-core
systems are pretty ancient).

I'm also hoping on the Arm it might be possible to use the fast IRQ
and read/write the I/O pins in an ISR which may allow the servo thread
to run with much higher jitter.

 Then there's the problem of gluing these boards to our CNC hardware
  about which I yield to Jon.

My current plan is to bit-bang GPIO pins based on code from the
parallel port driver, but adding a bit of electronics would probably
make things much easier.  I'll evaluate that option once I see where I
get with software stepgen.

- -- 
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char...@steinkuehler.net
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Jon Elson
Darren Conway wrote:
 Hi

 Would the Raspberry Pi be a candidate for running EMC?
   
There is no hardware floating point.  I think that would be a major killer.
Software emulation is slow, but the typical RT package probably does not
support the FP emulation for real time kernel modules.

At the glacial pace of RTAI development for the ARM processors, it
might take the rest of this century to get RTAI on the Pi.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Jon Elson

 On 20 July 2012 07:38, Darren Conway darren.con...@xtra.co.nz wrote:

 
 Would the Raspberry Pi be a candidate for running EMC?
   
OOps, the Pi website now shows it DOES have hardware floating point, I'd
swear a few months ago it said there was NO hardware FP.  Well, that helps.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Jon Elson
Charles Steinkuehler wrote:
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would probably
 make things much easier.  I'll evaluate that option once I see where I
 get with software stepgen.
   
Well, it totally depends on the latency performance of whatever kernel 
you are
using.  RTAI when it is good is OK for software step generation, but just
barely, unless you are satisfied with very slow motion.  I've seen some
comments that seem to suggest 100 us latencies might be about as good as it
gets on ARM processors with the preempt-RT kernel.

I'm also hoping on the Arm it might be possible to use the fast IRQ
and read/write the I/O pins in an ISR which may allow the servo thread
to run with much higher jitter.

  

This is unlikely to help any, as that is basically what an RT task is, a 
thread that runs
several kernel modules in response to an interrupt.

Jon



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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread andy pugh
On 20 July 2012 17:31, Jon Elson el...@pico-systems.com wrote:

 There is no hardware floating point.  I think that would be a major killer.
 Software emulation is slow, but the typical RT package probably does not
 support the FP emulation for real time kernel modules.

FPU support is optional in the RTAI config. But I don't know what you
get if you turn it off.

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Alexey Starikovskiy
Debian is just released with hard FP for Raspberry Pi:
http://www.raspberrypi.org/archives/1605

On Fri, Jul 20, 2012 at 8:59 PM, andy pugh bodge...@gmail.com wrote:
 On 20 July 2012 17:31, Jon Elson el...@pico-systems.com wrote:

 There is no hardware floating point.  I think that would be a major killer.
 Software emulation is slow, but the typical RT package probably does not
 support the FP emulation for real time kernel modules.

 FPU support is optional in the RTAI config. But I don't know what you
 get if you turn it off.

 --
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 If you can't fix it, you don't own it.
 http://www.ifixit.com/Manifesto

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Karl Schmidt
On 07/20/2012 11:47 AM, Jon Elson wrote:
 Charles Steinkuehler wrote:
 My current plan is to bit-bang GPIO pins based on code from the parallel 
 port driver, but
 adding a bit of electronics would probably make things much easier.


What would the bit of electronics look like? Most of the single chip uP have 
hardware pulse 
generators built in that could easily generate the stepper pulses without 
jitter. Those chips are 
under $1 these days...

Lattice now has a 1000 logic cell FPGA with built in configuration ROM and lots 
of other goodies for 
less than $2 .. (twice that in single quantities from digikey )  there is 
enough room to put a 
softcore CPU to talk to the controlling system etc..

If I have this pictured correctly - the controlling Linuxemc system would run 
the outer servo loop - 
and the hardware would generate the pulses for steppers?

Hardware cost is no longer an issue.


Karl Schmidt  EMail k...@xtronics.com
Transtronics, Inc.  WEB 
http://secure.transtronics.com
3209 West 9th Street Ph (785) 841-3089
Lawrence, KS 66049  FAX (785) 841-0434

Any cat would tell you that you can only wash one paw at a time;
while we try to do everything at once. -kps



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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Charles Steinkuehler
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 7/20/2012 5:37 PM, Karl Schmidt wrote:
 On 07/20/2012 11:47 AM, Jon Elson wrote:
 Charles Steinkuehler wrote:
 My current plan is to bit-bang GPIO pins based on code from the
 parallel port driver, but adding a bit of electronics would
 probably make things much easier.
 
 What would the bit of electronics look like? Most of the single
 chip uP have hardware pulse generators built in that could easily
 generate the stepper pulses without jitter. Those chips are under
 $1 these days...
 
 Lattice now has a 1000 logic cell FPGA with built in configuration
 ROM and lots of other goodies for less than $2 .. (twice that in
 single quantities from digikey )  there is enough room to put a 
 softcore CPU to talk to the controlling system etc..

Yeah, I've been helping Tim (a mutual friend) write some VHDL code for
the Lattice parts, which look pretty sweet.

I'd probably use some form of programmable FPGA/CPLD under $10 or so,
and right now the Lattice Ice parts are looking like the best bang for
the buck.  Having even a little bit of real hardware makes stepgen and
encoder monitoring a lot simpler than bit-banging in SW.  Plus most of
the micro-controllers don't have real (or very many) encoder inputs,
and can run out of timers fairly quick.

There's still level translation, isolation, and protection to deal
with, but that can be scaled to the task (ie: I'd put a lot more money
into protecting I/O headed to mains-driven servos than a RepRap
powered from the same 12V supply as my CPU).

 If I have this pictured correctly - the controlling Linuxemc system
 would run the outer servo loop - and the hardware would generate
 the pulses for steppers?
 
 Hardware cost is no longer an issue.

...as long as I can get it to work.  If not, you'll have to wait until
the atom class chips get down to the Raspberry Pi pricing level.  :)

- -- 
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char...@steinkuehler.net
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread andy pugh
On 20 July 2012 23:37, Karl Schmidt k...@xtronics.com wrote:
 Lattice now has a 1000 logic cell FPGA with built in configuration ROM and 
 lots of other goodies for
 less than $2 .. (twice that in single quantities from digikey )  there is 
 enough room to put a
 softcore CPU to talk to the controlling system etc..

There is a well-established, open-source, LinuxCNC-supported library
of motion control components for FPGA/VHDL. It is mainly used in the
Mesa cards (because Mesa wrote it) but it has been used by other
people in their own hardware. I think Ariasrobo use a modified version
(in Mesa Hardware) and
https://picasaweb.google.com/lh/photo/Z-qp8MIIrve8EZT6eVVyaNMTjNZETYmyPJy0liipFm0?feat=directlink
Is a board someone is making with Hostmot2 firmware and their own hardware.

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Jon Elson
andy pugh wrote:
 On 20 July 2012 17:31, Jon Elson el...@pico-systems.com wrote:

   
 There is no hardware floating point.  I think that would be a major killer.
 Software emulation is slow, but the typical RT package probably does not
 support the FP emulation for real time kernel modules.
 

 FPU support is optional in the RTAI config. But I don't know what you
 get if you turn it off.
   
The original Pi docs said the HARDWARE did not have floating point 
instructions.
This may have been wrong, or they have moved to a different ARM chip.
The low-end ARMs still do not have FP hardware, and do it by emulation.

The base thread of LinuxCNC does not support FP instructions, this speeds up
context switches and is why the latency is usually better on the base 
thread than
the servo thread.

But, I'm quite sure if you perform an FP instruction in the base thread, 
you will
get an exception.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Jon Elson
Karl Schmidt wrote:
 On 07/20/2012 11:47 AM, Jon Elson wrote:
   
 Charles Steinkuehler wrote:
 
 My current plan is to bit-bang GPIO pins based on code from the parallel 
 port driver, but
 adding a bit of electronics would probably make things much easier.
   

 What would the bit of electronics look like? Most of the single chip uP 
 have hardware pulse 
 generators built in that could easily generate the stepper pulses without 
 jitter.
No, the problem is you need to COUNT your pulses.  There is no way for 
the CPU to
know exactly when a pulse gets issued without counting them, due to 
slight variations
in timing.  Now, on the ARM chips with everything in one, and all 
clocked off the
same crystal, it MAY be possible to keep some kind of sync on the whole 
system,
but it might take some revision of the way LinuxCNC works.  If the rates 
are not
perfectly synched between the pulse generator and the software, small errors
could accumulate to cause large position errors.

Jon

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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread Charles Steinkuehler
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 7/20/2012 8:28 PM, Jon Elson wrote:
 No, the problem is you need to COUNT your pulses.  There is no way 
 for the CPU to know exactly when a pulse gets issued without
 counting them, due to slight variations in timing.  Now, on the ARM
 chips with everything in one, and all clocked off the same crystal,
 it MAY be possible to keep some kind of sync on the whole system,
 but it might take some revision of the way LinuxCNC works.  If the
 rates are not perfectly synched between the pulse generator and the
 software, small errors could accumulate to cause large position
 errors.

My understanding is that one of the first things the servo thread does
when it wakes up is poll for the current position from the appropriate
lower-level (software step generator, mesa hardware, or whatnot).

So assuming the servo thread can actually read the number of counts
generated (by whatever means), there should be no position error
accumulation.  It shouldn't matter _how_ the pulses are generated, as
long as there is something (pulse count, encoder position) feeding
back to the servo thread so it knows what the position is *RIGHT NOW*
and can act accordingly.

Is this mistaken?

- -- 
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char...@steinkuehler.net
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Re: [Emc-developers] Raspberry Pi running EMC ???

2012-07-20 Thread andy pugh
On 21 July 2012 02:47, Charles Steinkuehler char...@steinkuehler.net wrote:

 My understanding is that one of the first things the servo thread does
 when it wakes up is poll for the current position from the appropriate
 lower-level (software step generator, mesa hardware, or whatnot).

It is, but I think that the problem is that hardware frequency
generators don't count their pulses. The Pico/Mesa/Hal functions are
the exceptions.

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