> I am not getting away from powering on, but I can avoid testing in that > situation by resetting on a watchdog timer. But are you telling me > that uPs in general _presume_ a power up reset even when the reset might > be from the watchdog? Bah!
No I didn't mean that. But each does have a sequence that it goes thru at each reset. > Then I have to presume the integrity of the address bus. If I can't get > 0x0000 hex on the address bus, I can't begin. Mind you, if a board is > that badly shot, I'd probably find heat somewhere. A minor point but a number of microprocessors don't go to 0x0000 hex at reset. Reset vectors in some cases are in the 0xFF00 hex page and I believe the Motorola 68xx and the Hitachi 63xx are among those. Come to think of it, I believe that x86 reset goes to 0xFFFF00 hex to get it's first instruction after a reset. > Then, let's think: Another settable address, or a presettable number of > clock cycles for the stop signal? Mebbe factor in ram & rom checks. > > /tries to think it out. fails. > > Better do both cycle count and address recognition for the stop to be > sure to be sure. The quest for stability begins. Guess that's why some companies get big bucks for trying to solve this problem. Not easy to come in after the fact and troubleshoot these things. -=-=-=-=-=-=- "http://www.psyber.com/~dibsed"; -=-=-=-=-=-=- DIBs Electronic Design | Dave Baldwin: [EMAIL PROTECTED] Adapt and overcome. | Buy a book and read it. -=-=--=-=--=-=--=-=--=-=-=-=--=-=--=-=--=-=--=-=--=-=--=-=- -- Author: Dave Baldwin INET: [EMAIL PROTECTED] Fat City Hosting, San Diego, California -- http://www.fatcity.com --------------------------------------------------------------------- To REMOVE yourself from this mailing list, send an E-Mail message to: [EMAIL PROTECTED] (note EXACT spelling of 'ListGuru') and in the message BODY, include a line containing: UNSUB CHIPDIR-L (or the name of mailing list you want to be removed from). You may also send the HELP command for other information (like subscribing).
