On Tue, May 04, 2004 at 11:14:19AM -0800, Dave Baldwin enlightened us
thusly
> > Is there any reason why the behaviour of a uP should vary from reset
> > to reset? I need repeatability over clock cycles for some range;
> > about 10 clock cycles might be enough.
>
> I can think of a lot of reasons from power supply conditions to reset
> circuit variations. Also, what kind of uP? Don't some have to wait
> for internal circuits to settle? Some only sample the reset line
> periodically like they do the interrupts.
>
> > I want to test using clock cycle for clock cycle sampling. The
> > digital signature analysers (HP5004, 5005, & 5006) manufactured by
> > HP offer a checksum of a data stream, but very poor triggering
> > options, which I am seeking to extend :-D.
> >
> > But if the cpu took an extra clock cycle to settle after a reset,
> > the result would be screwed. Is this a possibility?
>
> Note that power on reset can take hundreds to thousands of clock
> cycles waiting for the oscillator/clock to settle, I think it's very
> likely to happen.
>
> > The idea is to take a checksum of the data lines while a board wakes
> > up and checks everything.
>
> That may take a lot to get that idea to work. Lots of variation in
> that process.
If I did the following:
1. Got away from the xtal, and stayed with the reduced clock
usually available on pin 20 or 22 of the eprom,
2. got away from powerup and just used watchdog resets
Then I would have a high on the reduced cpu clock ( 'E' or pin
64 on the HD6303XP & HD6303YP) until the xtal was set going. The time
between end of reset and first clock cycle would be immaterial. The
start of my scan would be the start of the first read cycle.
What I really wanted to avoid was having to stick a clip on the eprom
and trap an opening read at a low address to get the start signal, and
processing also to get a stop.
Any sort of scanning for state seems to point to hardware - gates into
latches with individual resets (Ugh!) or processing (Ugh!). To make it
versatile, I have to throw in a magnitude comparator and a set of dip
switches. But for me, this is definitely worth doing. And the HP5006A
runs at up to 25Mhz :-(.
--
With best Regards,
Declan Moriarty.
--
Author: Declan Moriarty
INET: [EMAIL PROTECTED]
Fat City Hosting, San Diego, California -- http://www.fatcity.com
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