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commit 46179a457dbf8eeb0d0468e76c7eaec4e70b59aa
Author: raiden00pl <[email protected]>
AuthorDate: Sat Oct 10 15:39:12 2026 +0200

    boards/arm/stm32h5: fix APB1 timer input clock
    
    PCLK1 is HCLK / 2 on these boards and TIMPRE is left at its reset value,
    so the APB1 timers are clocked at 2 x PCLK1. Timers on APB1 ran twice
    as fast as configured.
    
    Signed-off-by: raiden00pl <[email protected]>
    Assisted-by: Claude Code
---
 boards/arm/stm32h5/nucleo-h503rb/include/board.h |  8 ++++----
 boards/arm/stm32h5/nucleo-h533re/include/board.h | 14 +++++++-------
 boards/arm/stm32h5/nucleo-h563zi/include/board.h | 18 +++++++++---------
 3 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/boards/arm/stm32h5/nucleo-h503rb/include/board.h 
b/boards/arm/stm32h5/nucleo-h503rb/include/board.h
index fc2fd6b3c12..24527321938 100644
--- a/boards/arm/stm32h5/nucleo-h503rb/include/board.h
+++ b/boards/arm/stm32h5/nucleo-h503rb/include/board.h
@@ -131,10 +131,10 @@
 #define STM32_RCC_CFGR2_PPRE1     RCC_CFGR2_PPRE1_HCLK1d2      /* PCLK1 = HCLK 
/ 2 */
 #define STM32_PCLK1_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
 
-#define STM32_TIM2_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM3_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM6_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM7_CLKIN    (STM32_PCLK1_FREQUENCY)
+#define STM32_TIM2_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM3_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM6_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM7_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
 #define STM32_LPTIM2_CLKIN  (STM32_PCLK1_FREQUENCY)
 
 /* Configure the APB2 prescaler */
diff --git a/boards/arm/stm32h5/nucleo-h533re/include/board.h 
b/boards/arm/stm32h5/nucleo-h533re/include/board.h
index caea7fa53e4..a935d9985f4 100644
--- a/boards/arm/stm32h5/nucleo-h533re/include/board.h
+++ b/boards/arm/stm32h5/nucleo-h533re/include/board.h
@@ -131,13 +131,13 @@
 #define STM32_RCC_CFGR2_PPRE1     RCC_CFGR2_PPRE1_HCLK1d2      /* PCLK1 = HCLK 
/ 2 */
 #define STM32_PCLK1_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
 
-#define STM32_TIM2_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM3_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM4_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM5_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM6_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM7_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM12_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_TIM2_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM3_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM4_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM5_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM6_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM7_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM12_CLKIN   (2 * STM32_PCLK1_FREQUENCY)
 #define STM32_LPTIM2_CLKIN  (STM32_PCLK1_FREQUENCY)
 
 /* Configure the APB2 prescaler */
diff --git a/boards/arm/stm32h5/nucleo-h563zi/include/board.h 
b/boards/arm/stm32h5/nucleo-h563zi/include/board.h
index 187c1bbf6c0..0612da9e478 100644
--- a/boards/arm/stm32h5/nucleo-h563zi/include/board.h
+++ b/boards/arm/stm32h5/nucleo-h563zi/include/board.h
@@ -218,15 +218,15 @@
 #define STM32_RCC_CFGR2_PPRE1     RCC_CFGR2_PPRE1_HCLK1d2      /* PCLK1 = HCLK 
/ 2 */
 #define STM32_PCLK1_FREQUENCY    (STM32_HCLK_FREQUENCY / 2)
 
-#define STM32_TIM2_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM3_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM4_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM5_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM6_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM7_CLKIN    (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM12_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM13_CLKIN   (STM32_PCLK1_FREQUENCY)
-#define STM32_TIM14_CLKIN   (STM32_PCLK1_FREQUENCY)
+#define STM32_TIM2_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM3_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM4_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM5_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM6_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM7_CLKIN    (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM12_CLKIN   (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM13_CLKIN   (2 * STM32_PCLK1_FREQUENCY)
+#define STM32_TIM14_CLKIN   (2 * STM32_PCLK1_FREQUENCY)
 #define STM32_LPTIM2_CLKIN  (STM32_PCLK1_FREQUENCY)
 
 /* Configure the APB2 prescaler */

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