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commit adf5dab36f8b193def00386855db1eba0cc6df34
Author: raiden00pl <[email protected]>
AuthorDate: Sat Oct 10 12:38:48 2026 +0200

    arch/arm/src/stm32wl5: add timer support
    
    Select the timers available on STM32WL5 (TIM1, TIM2, TIM16 and TIM17)
    so the common timer drivers can be enabled. The one-shot, free-running
    and quadrature encoder wrappers are enabled as on the other families
    with the same timer IP.
    
    Signed-off-by: raiden00pl <[email protected]>
    Assisted-by: Claude Code
---
 arch/arm/src/common/stm32/Kconfig.have | 2 +-
 arch/arm/src/common/stm32/Kconfig.tim  | 4 ++--
 arch/arm/src/stm32wl5/Kconfig          | 4 ++++
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm/src/common/stm32/Kconfig.have 
b/arch/arm/src/common/stm32/Kconfig.have
index f30dc209d55..d16b2357c4a 100644
--- a/arch/arm/src/common/stm32/Kconfig.have
+++ b/arch/arm/src/common/stm32/Kconfig.have
@@ -932,7 +932,7 @@ config STM32_HAVE_QENCODER_MAIN
        bool
        default y if STM32_HAVE_IP_TIMERS || STM32_COMMON_F7_H7
        default y if STM32_COMMON_L4_L5_U5
-       default y if ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3
+       default y if ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3 || 
ARCH_CHIP_STM32WL5
 
 config STM32_HAVE_QENCODER_16BIT
        bool
diff --git a/arch/arm/src/common/stm32/Kconfig.tim 
b/arch/arm/src/common/stm32/Kconfig.tim
index 137c10fd567..f4a3ba08d3d 100644
--- a/arch/arm/src/common/stm32/Kconfig.tim
+++ b/arch/arm/src/common/stm32/Kconfig.tim
@@ -1000,7 +1000,7 @@ endchoice
 
 config STM32_ONESHOT
        bool "TIM one-shot wrapper"
-       depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || STM32_COMMON_H7_H5 || 
ARCH_CHIP_STM32WB || STM32_COMMON_L4_L5_U5 || ((ARCH_CHIP_STM32C5 || 
ARCH_CHIP_STM32U3) && STM32_TIM)
+       depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || STM32_COMMON_H7_H5 || 
ARCH_CHIP_STM32WB || STM32_COMMON_L4_L5_U5 || ((ARCH_CHIP_STM32C5 || 
ARCH_CHIP_STM32U3 || ARCH_CHIP_STM32WL5) && STM32_TIM)
        default y if STM32_COMMON_L4_L5_U5 && SCHED_TICKLESS
        ---help---
                Enable a wrapper around the low level timer/counter functions to
@@ -1008,7 +1008,7 @@ config STM32_ONESHOT
 
 config STM32_FREERUN
        bool "TIM free-running wrapper"
-       depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || ARCH_CHIP_STM32WB || 
STM32_COMMON_L4_L5_U5 || ((ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3) && STM32_TIM)
+       depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || ARCH_CHIP_STM32WB || 
STM32_COMMON_L4_L5_U5 || ((ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3 || 
ARCH_CHIP_STM32WL5) && STM32_TIM)
        default y if STM32_COMMON_L4_L5_U5 && SCHED_TICKLESS
        ---help---
                Enable a wrapper around the low level timer/counter functions to
diff --git a/arch/arm/src/stm32wl5/Kconfig b/arch/arm/src/stm32wl5/Kconfig
index 3d68246fc3d..ba7e90bf806 100644
--- a/arch/arm/src/stm32wl5/Kconfig
+++ b/arch/arm/src/stm32wl5/Kconfig
@@ -50,6 +50,10 @@ config STM32_STM32WL5XXX_CPU1
        select STM32_HAVE_LPUART1
        select STM32_HAVE_SPI1
        select STM32_HAVE_SPI2S2
+       select STM32_HAVE_TIM1
+       select STM32_HAVE_TIM2
+       select STM32_HAVE_TIM16
+       select STM32_HAVE_TIM17
        select STM32_HAVE_TIM2_32BITS
 
 endif # ARCH_CHIP_STM32WL5

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