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commit e4cf86452b4a66486c51dee751f087ffed14be12 Author: raiden00pl <[email protected]> AuthorDate: Sat Oct 10 13:35:07 2026 +0200 arch/arm/src/common/stm32: simplify Kconfig of the common timer drivers Every STM32 family that exposes its timers now uses the common timer, one-shot, free-running, quadrature encoder and pulse count drivers, so their options only need to depend on the timer they use. Drop the per-family conditions from these options and remove the helper symbols STM32_QENCODER_MAIN, STM32_QENCODER_STM32, STM32_QENCODER_F0, STM32_QENCODER_TIMS_1_4, STM32_QENCODER_TIMS_1_8, STM32_HAVE_QENCODER_MAIN and STM32_HAVE_QENCODER_16BIT. The options are now available on every family with timers. Also remove STM32_HAVE_IP_ONESHOT_M3M4_V1 and STM32_HAVE_IP_FREERUN_M3M4_V1, which several families select but nothing uses. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- arch/arm/src/common/stm32/Kconfig.have | 16 --------- arch/arm/src/common/stm32/Kconfig.tim | 59 ++++++++++------------------------ arch/arm/src/stm32f1/Kconfig | 2 -- arch/arm/src/stm32f2/Kconfig | 2 -- arch/arm/src/stm32f3/Kconfig | 6 ---- arch/arm/src/stm32f4/Kconfig | 2 -- arch/arm/src/stm32g4/Kconfig | 2 -- arch/arm/src/stm32l1/Kconfig | 2 -- 8 files changed, 17 insertions(+), 74 deletions(-) diff --git a/arch/arm/src/common/stm32/Kconfig.have b/arch/arm/src/common/stm32/Kconfig.have index d16b2357c4a..9ffaa1dcaf8 100644 --- a/arch/arm/src/common/stm32/Kconfig.have +++ b/arch/arm/src/common/stm32/Kconfig.have @@ -928,16 +928,6 @@ config STM32_HAVE_PWM_MULTICHAN default y if (ARCH_CHIP_STM32L4 || ARCH_CHIP_STM32H5 || ARCH_CHIP_STM32U5) && STM32_PWM default y if ARCH_CHIP_STM32L5 && STM32_PWM_MULTICHAN_L5_TIMERS -config STM32_HAVE_QENCODER_MAIN - bool - default y if STM32_HAVE_IP_TIMERS || STM32_COMMON_F7_H7 - default y if STM32_COMMON_L4_L5_U5 - default y if ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3 || ARCH_CHIP_STM32WL5 - -config STM32_HAVE_QENCODER_16BIT - bool - default y if STM32_QENCODER_STM32 || STM32_QENCODER_F0 - config STM32_ENERGYLITE bool select STM32_HAVE_TIM6 if STM32_HAVE_IP_TIMERS @@ -1065,12 +1055,6 @@ config STM32_HAVE_LPTIM3 config STM32_HAVE_LPTIM4 bool -config STM32_HAVE_IP_ONESHOT_M3M4_V1 - bool - -config STM32_HAVE_IP_FREERUN_M3M4_V1 - bool - # TSC capabilities config STM32_HAVE_TSC diff --git a/arch/arm/src/common/stm32/Kconfig.tim b/arch/arm/src/common/stm32/Kconfig.tim index f4a3ba08d3d..ec9729f01a5 100644 --- a/arch/arm/src/common/stm32/Kconfig.tim +++ b/arch/arm/src/common/stm32/Kconfig.tim @@ -28,7 +28,6 @@ config STM32_CAP config STM32_PULSECOUNT bool - depends on STM32_HAVE_IP_TIMERS || STM32_COMMON_F0_L0_G0_C0 || STM32_COMMON_F7_H7 || ARCH_CHIP_STM32L4 || ARCH_CHIP_STM32H5 select ARCH_HAVE_PULSECOUNT select PULSECOUNT @@ -42,27 +41,6 @@ config STM32_PWM_MULTICHAN_L5_TIMERS default y if STM32_TIM4_PWM || STM32_TIM5_PWM || STM32_TIM8_PWM default y if STM32_TIM15_PWM || STM32_TIM16_PWM || STM32_TIM17_PWM -config STM32_QENCODER_TIMS_1_4 - bool - default y if STM32_TIM1 || STM32_TIM2 || STM32_TIM3 || STM32_TIM4 - -config STM32_QENCODER_TIMS_1_8 - bool - default y if STM32_QENCODER_TIMS_1_4 - default y if STM32_TIM5 || STM32_TIM8 - -config STM32_QENCODER_MAIN - bool - default y if STM32_HAVE_QENCODER_MAIN && SENSORS_QENCODER && STM32_QENCODER_TIMS_1_8 - -config STM32_QENCODER_STM32 - bool - default y if STM32_HAVE_IP_TIMERS && SENSORS_QENCODER && STM32_QENCODER_TIMS_1_8 - -config STM32_QENCODER_F0 - bool - default y if STM32_HAVE_IP_TIMERS && SENSORS_QENCODER && STM32_QENCODER_TIMS_1_4 - config STM32_PWM bool @@ -1000,7 +978,7 @@ endchoice config STM32_ONESHOT bool "TIM one-shot wrapper" - depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || STM32_COMMON_H7_H5 || ARCH_CHIP_STM32WB || STM32_COMMON_L4_L5_U5 || ((ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3 || ARCH_CHIP_STM32WL5) && STM32_TIM) + depends on STM32_TIM default y if STM32_COMMON_L4_L5_U5 && SCHED_TICKLESS ---help--- Enable a wrapper around the low level timer/counter functions to @@ -1008,7 +986,7 @@ config STM32_ONESHOT config STM32_FREERUN bool "TIM free-running wrapper" - depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || ARCH_CHIP_STM32WB || STM32_COMMON_L4_L5_U5 || ((ARCH_CHIP_STM32C5 || ARCH_CHIP_STM32U3 || ARCH_CHIP_STM32WL5) && STM32_TIM) + depends on STM32_TIM default y if STM32_COMMON_L4_L5_U5 && SCHED_TICKLESS ---help--- Enable a wrapper around the low level timer/counter functions to @@ -1017,7 +995,6 @@ config STM32_FREERUN config STM32_ONESHOT_MAXTIMERS int "Maximum number of oneshot timers" depends on STM32_ONESHOT - depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || ARCH_CHIP_STM32H7 || STM32_COMMON_L4_H5_L5_U5 || ARCH_CHIP_STM32WB default 1 range 1 8 ---help--- @@ -2751,7 +2728,6 @@ config STM32_PWM_MULTICHAN config STM32_TIM1_PULSECOUNT bool "TIM1 pulse count" depends on STM32_TIM1 - depends on STM32_HAVE_IP_TIMERS || STM32_COMMON_F7_H7 || ARCH_CHIP_STM32L4 || ARCH_CHIP_STM32H5 select STM32_PULSECOUNT ---help--- Reserve timer 1 for pulse count output. @@ -2785,7 +2761,6 @@ endif # STM32_TIM1_PULSECOUNT config STM32_TIM8_PULSECOUNT bool "TIM8 pulse count" depends on STM32_TIM8 - depends on (STM32_HAVE_IP_TIMERS && STM32_TIM) || STM32_COMMON_F7_H7 || ARCH_CHIP_STM32L4 || ARCH_CHIP_STM32H5 select STM32_PULSECOUNT ---help--- Reserve timer 8 for pulse count output. @@ -3793,7 +3768,7 @@ config STM32_TIM17_CH1IDLE config STM32_QENCODER_DISABLE_EXTEND16BTIMERS bool "Disable QEncoder timers extension from 16-bit to 32-bit" - depends on STM32_HAVE_QENCODER_16BIT + depends on SENSORS_QENCODER ---help--- Disable the extension of 16-bit timers to 32-bit via interrupt-based overflow tracking. When enabled, timers will use their native hardware @@ -3802,7 +3777,7 @@ config STM32_QENCODER_DISABLE_EXTEND16BTIMERS config STM32_QENCODER_INDEX_PIN bool "Enable QEncoder timers support for index pin" - depends on STM32_HAVE_QENCODER_16BIT + depends on SENSORS_QENCODER ---help--- Enable support for quadrature encoder index pin. The index pin can be used to reset the encoder position to a known value when the index @@ -3810,14 +3785,14 @@ config STM32_QENCODER_INDEX_PIN config STM32_TIM1_QE bool "TIM1 QE" - depends on (STM32_QENCODER_MAIN && STM32_TIM1) || (STM32_HAVE_IP_TIMERS && STM32_TIM1) + depends on STM32_TIM1 select STM32_QE ---help--- Reserve TIM1 for use by QEncoder. config STM32_TIM1_QEPSC int "TIM1 QE pulse prescaler" - depends on (STM32_QENCODER_MAIN || STM32_QENCODER_F0) && STM32_TIM1_QE + depends on STM32_TIM1_QE default 1 ---help--- This prescaler divides the number of recorded encoder pulses, @@ -3825,14 +3800,14 @@ config STM32_TIM1_QEPSC config STM32_TIM2_QE bool "TIM2 QE" - depends on (STM32_QENCODER_MAIN && STM32_TIM2) || (STM32_HAVE_IP_TIMERS && STM32_TIM2) + depends on STM32_TIM2 select STM32_QE ---help--- Reserve TIM2 for use by QEncoder. config STM32_TIM2_QEPSC int "TIM2 QE pulse prescaler" - depends on (STM32_QENCODER_MAIN || STM32_QENCODER_F0) && STM32_TIM2_QE + depends on STM32_TIM2_QE default 1 ---help--- This prescaler divides the number of recorded encoder pulses, @@ -3840,14 +3815,14 @@ config STM32_TIM2_QEPSC config STM32_TIM3_QE bool "TIM3 QE" - depends on (STM32_QENCODER_MAIN && STM32_TIM3) || (STM32_HAVE_IP_TIMERS && STM32_TIM3) + depends on STM32_TIM3 select STM32_QE ---help--- Reserve TIM3 for use by QEncoder. config STM32_TIM3_QEPSC int "TIM3 QE pulse prescaler" - depends on (STM32_QENCODER_MAIN || STM32_QENCODER_F0) && STM32_TIM3_QE + depends on STM32_TIM3_QE default 1 ---help--- This prescaler divides the number of recorded encoder pulses, @@ -3855,14 +3830,14 @@ config STM32_TIM3_QEPSC config STM32_TIM4_QE bool "TIM4 QE" - depends on (STM32_QENCODER_MAIN && STM32_TIM4) || (STM32_HAVE_IP_TIMERS && STM32_TIM4) + depends on STM32_TIM4 select STM32_QE ---help--- Reserve TIM4 for use by QEncoder. config STM32_TIM4_QEPSC int "TIM4 QE pulse prescaler" - depends on (STM32_QENCODER_MAIN || STM32_QENCODER_F0) && STM32_TIM4_QE + depends on STM32_TIM4_QE default 1 ---help--- This prescaler divides the number of recorded encoder pulses, @@ -3870,14 +3845,14 @@ config STM32_TIM4_QEPSC config STM32_TIM5_QE bool "TIM5 QE" - depends on STM32_QENCODER_MAIN && STM32_TIM5 + depends on STM32_TIM5 select STM32_QE ---help--- Reserve TIM5 for use by QEncoder. config STM32_TIM5_QEPSC int "TIM5 QE pulse prescaler" - depends on STM32_QENCODER_MAIN && STM32_TIM5_QE + depends on STM32_TIM5_QE default 1 ---help--- This prescaler divides the number of recorded encoder pulses, @@ -3885,14 +3860,14 @@ config STM32_TIM5_QEPSC config STM32_TIM8_QE bool "TIM8 QE" - depends on STM32_QENCODER_MAIN && STM32_TIM8 + depends on STM32_TIM8 select STM32_QE ---help--- Reserve TIM8 for use by QEncoder. config STM32_TIM8_QEPSC int "TIM8 QE pulse prescaler" - depends on STM32_QENCODER_MAIN && STM32_TIM8_QE + depends on STM32_TIM8_QE default 1 ---help--- This prescaler divides the number of recorded encoder pulses, @@ -3900,7 +3875,7 @@ config STM32_TIM8_QEPSC config STM32_QENCODER_FILTER bool "Enable filtering on STM32 QEncoder input" - depends on STM32_QENCODER_MAIN || STM32_QENCODER_F0 + depends on SENSORS_QENCODER default y ---help--- Enable input filtering on quadrature encoder channels to reduce noise. diff --git a/arch/arm/src/stm32f1/Kconfig b/arch/arm/src/stm32f1/Kconfig index 179229a4d2b..63e7ed6c930 100644 --- a/arch/arm/src/stm32f1/Kconfig +++ b/arch/arm/src/stm32f1/Kconfig @@ -325,12 +325,10 @@ config STM32_STM32F10XX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_F1F3 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_I2C_M3M4_V1 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_PWR_M3M4_V1 select STM32_HAVE_IP_RTC_COUNTER_M3M4_V1 select STM32_HAVE_IP_RTC_M3M4_V1 diff --git a/arch/arm/src/stm32f2/Kconfig b/arch/arm/src/stm32f2/Kconfig index 787ca89d9bd..50a162050ba 100644 --- a/arch/arm/src/stm32f2/Kconfig +++ b/arch/arm/src/stm32f2/Kconfig @@ -146,12 +146,10 @@ config STM32_STM32F20XX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_F2F4 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_I2C_M3M4_V1 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS select STM32_HAVE_IP_OTGHS_M3M4_V1 select STM32_HAVE_IP_PWR_M3M4_V1 diff --git a/arch/arm/src/stm32f3/Kconfig b/arch/arm/src/stm32f3/Kconfig index ee3cba39454..24e560922e5 100644 --- a/arch/arm/src/stm32f3/Kconfig +++ b/arch/arm/src/stm32f3/Kconfig @@ -439,13 +439,11 @@ config STM32_STM32F30XX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_F1F3 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1 select STM32_HAVE_IP_I2C_M3M4_V2 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_PWR_M3M4_V1 select STM32_HAVE_IP_RTC_M3M4_V1 select STM32_HAVE_IP_RTCC_M3M4_V1 @@ -533,13 +531,11 @@ config STM32_STM32F33XX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_F1F3 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1 select STM32_HAVE_IP_I2C_M3M4_V2 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_OPAMP_M3M4_V1 if STM32_HAVE_OPAMP1 || STM32_HAVE_OPAMP2 || STM32_HAVE_OPAMP3 || STM32_HAVE_OPAMP4 || STM32_HAVE_OPAMP5 || STM32_HAVE_OPAMP6 select STM32_HAVE_IP_PWR_M3M4_V1 select STM32_HAVE_IP_RTC_M3M4_V1 @@ -612,13 +608,11 @@ config STM32_STM32F37XX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_F1F3 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1 select STM32_HAVE_IP_I2C_M3M4_V2 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_PWR_M3M4_V1 select STM32_HAVE_IP_RTC_M3M4_V1 select STM32_HAVE_IP_RTCC_M3M4_V1 diff --git a/arch/arm/src/stm32f4/Kconfig b/arch/arm/src/stm32f4/Kconfig index bdd6536a99d..2727ce6fea7 100644 --- a/arch/arm/src/stm32f4/Kconfig +++ b/arch/arm/src/stm32f4/Kconfig @@ -273,12 +273,10 @@ config STM32_STM32F4XXX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_F2F4 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_I2C_M3M4_V1 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_OTGHS_M3M4_V1 select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS select STM32_HAVE_IP_PWR_M3M4_V1 diff --git a/arch/arm/src/stm32g4/Kconfig b/arch/arm/src/stm32g4/Kconfig index 2c864d02d9c..46d6312cd1d 100644 --- a/arch/arm/src/stm32g4/Kconfig +++ b/arch/arm/src/stm32g4/Kconfig @@ -112,13 +112,11 @@ config STM32_STM32G4XXX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_G4 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1 select STM32_HAVE_IP_I2C_M3M4_V2 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_OPAMP_M3M4_V1 if STM32_HAVE_OPAMP1 || STM32_HAVE_OPAMP2 || STM32_HAVE_OPAMP3 || STM32_HAVE_OPAMP4 || STM32_HAVE_OPAMP5 || STM32_HAVE_OPAMP6 select STM32_HAVE_IP_PWR_M3M4_V1 select STM32_HAVE_IP_RNG_M3M4_V1 if STM32_HAVE_RNG diff --git a/arch/arm/src/stm32l1/Kconfig b/arch/arm/src/stm32l1/Kconfig index 04462c26c5e..27030d41501 100644 --- a/arch/arm/src/stm32l1/Kconfig +++ b/arch/arm/src/stm32l1/Kconfig @@ -282,13 +282,11 @@ config STM32_STM32L15XX select STM32_HAVE_IP_FLASH_M3M4_V1 select STM32_HAVE_IP_FLASH_M3M4_L1 select STM32_HAVE_IP_FMC_M3M4_V1 if STM32_HAVE_FMC - select STM32_HAVE_IP_FREERUN_M3M4_V1 select STM32_HAVE_IP_FSMC_M3M4_V1 if STM32_HAVE_FSMC select STM32_HAVE_IP_GPIO_M3M4_V1 select STM32_HAVE_IP_HRTIM_M3M4_V1 if STM32_HAVE_HRTIM1 select STM32_HAVE_IP_I2C_M3M4_V1 select STM32_HAVE_IP_I2S_M3M4_V1 - select STM32_HAVE_IP_ONESHOT_M3M4_V1 select STM32_HAVE_IP_PWR_M3M4_V1 select STM32_HAVE_IP_RTC_M3M4_V1 select STM32_HAVE_IP_RTCC_M3M4_L1 if !STM32_HAVE_RTC_COUNTER
