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Hi dear,
Does working draft 1532D define data block size for single DMA cycle for Ultra DMA READ or WRITE command ? (like block size on READ MULTIPLE command)
The only word I found in the document is:
(p.112 of 1532D rev4 vol2)
Transition DDMA1:DDMA0: When the DMA burst is terminated and all data for the command has not been transferred, the device shall make a transition to the DDMA:Prepare state.
When this happens? For each sector? Any time when device buffer is empty?
Or it does not violate the rule even if I transfer whole 256 sector in one burst cycle ?
Regards,
Stellar
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