Does working draft 1532D define data block size for single DMA cycle for Ultra DMA READ or WRITE command ? (like block size on READ MULTIPLE command)
Rumour tells me some hosts and devices implement just enough of the standard to work with some of the others, leaving out fully arbitrary support for termination at any time.
For example, I don't often see a UDma trace pause repeatedly inside a block. And "what ain't tested don't work so good".
When this happens? For each sector? Any time when device buffer is empty?
Or it does not violate the rule even if I transfer whole 256 sector in one burst cycle ?
I'm no expert on that document, but so far as I know the document places no limit on bytes per burst. I agree that's silly. crc strength is not infinite.
Pat LaVarre
