Jim M:
If there is anything I would
add to the standard it is more data on the error detecting capability of
the CRC (since that is a rather specialized area of technical
knowledge).
Yes I'm curious, for one, thank you. How strong is the UDma CRC? Does the UDma CRC defeat any stuck data pin? What kind of noise does the UDma CRC overcome?
There is no point at which CRC becomes unreliable. The probability of misdetection of an error using the CRC grows over the length of the burst, but there is no cliff effect.
Very helpful clarification, yes thank you, myself for the last dozen years or so I haven't needed to recall the CRC mathematics I once knew.
I do not see the word "unreliable" but I do see unreliability perhaps unintentionally implied by the phrase "probability of undetected errors" at:
--- orphaned at page 236 of 244 in d1532v2r4.pdf
E.5.3.2 CRC calculation and comparison
...
The longer the Ultra DMA burst size the greater the likelihood of an undetected error. Burst lengths longer than 131,072 bytes will increase the probability of undetected errors above that of the ATA/ATAPI-6 and earlier standards.
---
At the time it was created we did the calculations for misdetection of
single bit errors up to 64Kibytes, and people were satisfied. Under the
old protocol that was the maximum transfer length per command.
Whoa.
Ata max was xFF blocks before 48-bit lba', aye.
Atapi max data/cdb was xFFFF lba's in practice, beyond that in theory, since SFF 8020i of 1996-01. Rumour tells me Win Atapi max is often 64 KiB/cdb, I have myself observed more like 192 KiB/cdb across some connections, and more in Linux & Mac.
So the protocol does not require a maximum burst length, but if you worry about CRC reliability then forcing a burst to break around 64Kibytes would be safe (and be an extremely small impact on performance).
Does my distrust of the CRC have a foundation in something real i.e. CRC mathematics?
Or are we discussing negligibly near zero probabilities of undetected error?
Remember that either the host or device can shut down a burst, so if one
party is picky they can always have their way. That's why there is no
maximum burst size in the standard - let the engineers make the
tradeoffs that are appropriate to them.
From parallel posts in this thread, when a device or host design engineer tells me they have designed no max because the standard gives no guidance, I know now to point to the 128 KiB mentioned in ATA/PI 7, as quoted above.
Pat LaVarre
