This message is from the T13 list server.
On Wed, 17 Mar 2004 09:35:38 -0700, Pat LaVarre wrote: >This message is from the T13 list server. >Rumour tells me some hosts and devices implement just enough of the >standard to work with some of the others, leaving out fully arbitrary >support for termination at any time. Maybe, but that would be very dangerous and I've never seen this in shipping devices. >For example, I don't often see a UDma trace pause repeatedly inside a >block. And "what ain't tested don't work so good". A device has no control over when a host might pause or terminate and the host may do that due to PCI bus activity that the device can not predict or control. >I'm no expert on that document, but so far as I know the document >places no limit on bytes per burst. I agree that's silly. crc >strength is not infinite. In ATA/ATAPI-7 see the last paragraph in clause E.5.3.2 - there is a "recommendation" that a burst should not be more than 131072 bytes. Hale *** Hale Landis *** www.ata-atapi.com ***
