AMD General Hi,
> -----Original Message----- > From: Jiang, Haochen <[email protected]> > Sent: 13 October 2026 12:47 > To: Sharma, Dipesh <[email protected]>; [email protected] > Cc: [email protected]; Liu, Hongtao <[email protected]>; > [email protected]; Kumar, Venkataramanan > <[email protected]> > Subject: RE: [PATCH 2/4] Share builtins and md patterns from avx10.2 and > vnniint{8,16} for avx10v1aux. > > Caution: This message originated from an External Source. Use proper > caution when opening attachments, clicking links, or responding. > > > > From: Sharma, Dipesh <[email protected]> > > Sent: Tuesday, October 13, 2026 2:59 PM > > > From: Jiang, Haochen <[email protected]> > > > Sent: 12 October 2026 12:19 > > > > From: Dipesh Sharma <[email protected]> > > > > Sent: Wednesday, September 23, 2026 7:05 PM > > > > To: [email protected] > > > > Cc: Jiang, Haochen <[email protected]>; [email protected]; > Liu, > > > > Hongtao <[email protected]>; [email protected]; Dipesh > > > > Sharma <[email protected]>; Venkataramanan Kumar > > > > <[email protected]> > > > > Subject: [PATCH 2/4] Share builtins and md patterns from avx10.2 and > > > > vnniint{8,16} for avx10v1aux. > > > > > > > > diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index > > > > e4bc746dacc..16cde4c53a0 100644 > > > > --- a/gcc/config/i386/sse.md > > > > +++ b/gcc/config/i386/sse.md > > > > @@ -715,7 +715,7 @@ > > > > [V16SI (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL")]) > > > > > > > > (define_mode_iterator VI4_AVX10_2 > > > > - [(V16SI "TARGET_AVX10_2") V8SI V4SI]) > > > > + [(V16SI "TARGET_AVX10_2 || TARGET_AVX10V1AUX") V8SI V4SI]) > > > > > > You should not alter this iterator since SM4 patterns are also using them. > > > Please use a new one. > > > > I would have created a new iterator if I were introducing new patterns. In > this > > case, we are only trying to share the existing patterns with AVX10V1AUX. > > > > Since the 512-bit variant of the SM4 instructions is already guarded by SM4 > > && AVX10.2, would it be possible to rewrite the iterator as shown below? > > (define_mode_iterator VI4_AVX10_2 > > - [(V16SI "TARGET_AVX10_2") V8SI V4SI]) > > + [(V16SI "TARGET_AVX512F") V8SI V4SI]) > > > > AVX10.2 implies AVX512F, and this change may allow other upcoming > > patterns to reuse the iterator as well. > > A new iterator will reduce confusion here. Theoretically, we could directly > use VI4_AVX512F for many vnni patterns. Using VI4_AVX10_2 is an explicit > reminder for AVX10.2 usage. So, I would prefer a new iterator > VI4_AVX10_2_V1_AUX. Okay, I'll define a new iterator. Also, as the name suggested, I believe it is like (define_mode_iterator VI4_AVX10_2_V1_AUX [(V16SI "TARGET_AVX10_2 || TARGET_AVX10V1AUX") V8SI V4SI]) This iterator also needs to be updated at all the sites where we are sharing pattern between AVX10_2 and AVX10V1AUX. > > One more thing, you also need to change for VI2_AVX10_2 iterator due to > auto vectorization part. Sure, I had a look at it. It is not being used anywhere other than dop_prod patterns. Hence, sharing the V32HI mode with target ' TARGET_AVX10_2 || TARGET_AVX10V1AUX ' should be suffice along with renaming the iterator like suggested in the above case. Thanks, Dipesh.
