On 10/03/2016 02:19 PM, why...@f-cpu.org wrote:
> Let's think again about an idea I suggested, probably in 2009...
>

Can you find a link to that suggestion? I would like to read it and
trace this idea's history.

> GHDL is a VHDL compiler.
> Let's create a pseudo-machine target where the generated code
> can be simulated, when run by a virtual machine, which will also
> tag data as they pass throught function, ports etc.
> 
> A few runs will "discover", or simply "cover" all the datapaths
> and thus create a directed dependency graph, which can be then
> traced back from the outputs.
> 
> There, you have a synthesiser which would seamlessly integrate
> with the best open source VHDL simulator.

I doubt I clearly see what you have envisioned but kudos for the
novelty, innovation, and generally for thinking outside of the box!


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