Hi, On 15/03/18 13:40, Martin Lucina wrote: > Hi, > > On Thursday, 15.03.2018 at 11:43, Andre Przywara wrote: >>> 648 MHz seems to have helped a lot, I've done several warm and cold boots >>> and only seen the BUG once so far. Will try lowering the frequency further >> >> Cool! I see other Allwinner boards using 624 MHz, so that might be a >> sweet spot. Alternatively you could also try 408 MHz, which should work >> everywhere. > > Still running at 648 Mhz and haven't seen the BUG again, but am only > moderately loading the board with building and running self-tests for the > project I'm working on [1] out of tmpfs. > >> I really wonder if this is about the PCB delay lines. So far we were >> getting away with the Pine64(?) values for other boards as well, but the >> Olimex board might be substantially different in the PCB layout. > > A friend here mentioned that just from eyeballing the board the DRAM lines > seemed "too simple" to him compared to other ARM boards he's used.
>From all I know Olimex knows what they are doing in this regard. Do you have access to an original BSP image from Olimex? My understanding was the "boot0" blob used in there is tailored to each board, as it contains the proper delay values for each DRAM line as laid out on the PCB. We took the values from the Pine64 boot0 for the SPL. I don't really know if those blobs are *really* board specific or if people just copy from each other, but at least it's worth a try. So if you send me (or point me to) the blob, I can bake a patch which uses those delay values and you could give it a test. I just need the part from 8KB to 40KB of an SD card image. It should have some eGON signature in the first line of a hexdump. It should look something like this: https://github.com/longsleep/build-pine64-image/blob/master/blobs/boot0.bin Cheers, Andre. >>> I've found what looks like a datasheet for the DRAM part at [2]; I know >>> nothing about DRAM initialisation so have no idea where to find the correct >>> frequency to use in that document. >> >> Thanks, that very helpful! So it looks like these are actually even >> 800MHz capable chips. But either this requires some tuning on the PCB >> delays or the voltage is wrong (as on the Pine64, where we fix this). >> I will add some code to print the actual DRAM voltage in ATF, will send >> you something for testing later tonight. > > Thanks! > > -mato > -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
