Hi, On 19/03/18 10:12, Martin Lucina wrote: > Hi, > > On Friday, 16.03.2018 at 10:36, Andre Przywara wrote: >> So I looked at this a64-olinuxino.dts you referenced in that other mail, >> which has those values spelt out in the "dram" node. Interestingly they >> are somewhat different from the values in this boot0, also different >> from the values used in the SPL (taken from the Pine64 boot0). >> We can cover up for some values in U-Boot rather easily (by providing a >> new file in U-Boot's arch/arm/mach-sunxi/dram_timings/ directory), but >> that would not cover the delay lines, which - at the moment - are >> hardcoded in the DRAM driver and are per-SoC. So it smells we need some >> rework of the driver, and also find a way to feed in DRAM parameters in >> a more sane way. >> I will try to hack something up tonight so that you can have a SPL >> tailored to the Olinuxino, so you could give it a try to see if that >> fixes your issues. If it does, it would be worthwhile to look at >> refactoring the driver. I think that also opens up the possibility of >> clocking the DRAM at 800MHz, as the chips and the controller should be >> able to do that. > > I've given the SPL you put together a go and left a comment in the Github > issue [1]. To keep the information also in this thread, in summary, the > PMIC setup on a warm boot appears to succeed but the reported DRAM voltage > is different (1.50V for warm boot vs. 1.36V for cold boot, with > CONFIG_DRAM_CLK=624).
Thanks, I commented there. Short answer: The 1.5V is due to a bug in the Olinuxino kernel .dtb. Will send a patch shortly. Cheers, Andre > [1] https://github.com/apritzel/arm-trusted-firmware/issues/8 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
