There's certainly a progress. Now only glean/readPixSanity and 
texturing/texDepth tests are failing. I've checked glean/readPixSanity and 
it's failing for 24bit depth buffer (no stencil buffer) visuals.
I've tried modifying radeon_span.c code but without a luck.
I'm attaching the patch I've used.

Regards,
Maciej

Dnia czwartek, 12 listopada 2009 o 20:55:08 Brian Paul napisał(a):
> Please update your Mesa from git.  I fixed the assertion at line 123
>  yesterday.
> 
> -Brian
> 
> On Thu, Nov 12, 2009 at 12:23 PM, Maciej Cencora <[email protected]> 
wrote:
> > I've tried your patch (+some minor fixes to make it work) but running
> > texdepth with it results in failing assertion  rb->Format ==
> > MESA_FORMAT_X8_Z24 (s_readpix.c:123).
> > I've also tried modifying span functions to convert between Z24_S8 (hw
> > format) to S8_Z24 (mesa format) but wasn't able to get correct result.
> > Any other ideas?
> >
> > Maciej
> >
> > Dnia czwartek, 12 listopada 2009 o 00:18:54 Brian Paul napisał(a):
> >> I think the problem is confusion between MESA_FORMAT_Z24_S8 and
> >> MESA_FORMAT_S8_Z24 in the radeon drivers.
> >>
> >> Looking at the span code, it appears that R300, R200 use Z24_S8 format
> >> while R600 and others use S8_Z24.
> >>
> >> Here's a patch that attempts to fix things.  I don't have radeon
> >> hardware to test so maybe someone else can start with this and finish
> >> it up.
> >>
> >> -Brian
> >>
> >> 2009/11/11 Maciej Cencora <[email protected]>:
> >> > I've checked the other failing tests.
> >> > Following were also passing before the texformat-rework merge:
> >> > fdo23670-drawpix_stencil
> >> > stencil-drawpixels
> >> > fragProg1 (Z write test)
> >> > readPixSanity
> >> > stencil2
> >> >
> >> > Maciej
> >> >
> >> > Dnia środa, 11 listopada 2009 o 03:44:18 Brian Paul napisał(a):
> >> >> It passes with swrast and the i965 driver here.
> >> >>
> >> >> Did this test pass prior to the texformat work?
> >> >>
> >> >> -Brian
> >> >>
> >> >> 2009/11/10 Maciej Cencora <[email protected]>:
> >> >> > It doesn't assert anymore, but the test is still failing.
> >> >> >
> >> >> > @test: texturing/texdepth
> >> >> > info: @@@Returncode: 1\n\nErrors:\nMesa: Mesa 7.7-devel DEBUG build
> >> >> > Nov 8 2009 21:21:48\nMesa warning: couldn\'t open libtxc_dxtn.so,
> >> >> > software DXTn compression/decompression unavailable\nMesa:
> >> >> > Initializing x86-64 optimizations\nMesa: 3Dnow!
> >> >> > detected\n\n\nOutput:\nProbe at (80,16)\n Expected: 0.250000
> >> >> > 0.250000 0.250000 1.000000\n  Observed: 0.000000 0.000000 0.000000
> >> >> > 1.000000\nTest failed: \'Render textures GL_LUMINANCE (no shadow
> >> >> > functionality)\'\nSee above for details.\n\n
> >> >> > errors!
> >> >> >
> >> >> > Maciej
> >> >> >
> >> >> > Dnia środa, 11 listopada 2009 o 02:25:52 Brian Paul napisał(a):
> >> >> >> Can you try again with Mesa git/master?  I've updated the
> >> >> >> assertions.
> >> >> >>
> >> >> >> -Brian
> >> >> >>
> >> >> >> On Tue, Nov 10, 2009 at 3:43 PM, Maciej Cencora
> >> >> >> <[email protected]>
> >> >
> >> > wrote:
> >> >> >> > It is r300 driver (RV530 GPU).
> >> >> >> >
> >> >> >> > I'm sending the backtrace as attachement.
> >> >> >> >
> >> >> >> > Maciej
> >> >> >> >
> >> >> >> > Dnia wtorek, 10 listopada 2009 o 23:38:09 Brian Paul napisał(a):
> >> >> >> >> Which driver?
> >> >> >> >>
> >> >> >> >> Could you provide a stack trace for the failed assertion?
> >> >> >> >>
> >> >> >> >> -Brian
> >> >> >> >>
> >> >> >> >> On Tue, Nov 10, 2009 at 3:30 PM, Maciej Cencora
> >> >> >> >> <[email protected]>
> >> >> >
> >> >> > wrote:
> >> >> >> >> > Hi Brian,
> >> >> >> >> >
> >> >> >> >> > there's at least one more regression in the code.
> >> >> >> >> > Piglit's texdepth test is failing because of following
> >> >> >> >> > assertion: texdepth: swrast/s_readpix.c:122:
> >> >> >> >> > read_depth_pixels: Assertion `rb-
> >> >> >> >> >
> >> >> >> >> >>InternalFormat == 0x81A6' failed.
> >> >> >> >> >
> >> >> >> >> > There are also other regressions (mostly related to
> >> >> >> >> > depth/stencil buffer) but I'm not sure it's the texformat
> >> >> >> >> > branch merge is to blame: fdo23670-drawpix_stencil
> >> >> >> >> > stencil-drawpixels
> >> >> >> >> > fragProg1 (Z write test)
> >> >> >> >> > paths
> >> >> >> >> > polygonOffset
> >> >> >> >> > readPixSanity
> >> >> >> >> > stencil2
> >> >> >> >> >
> >> >> >> >> > Regards,
> >> >> >> >> > Maciej
> >> >> >> >> >
> >> >> >> >> > Dnia piątek, 23 października 2009 o 23:23:34 Brian Paul
> >
> > napisał(a):
> >> >> >> >> >> Alex, Nicolai,
> >> >> >> >> >>
> >> >> >> >> >> Would you guys please test the texformat-rework branch
> >> >> >> >> >> again?
> >> >> >> >> >>
> >> >> >> >> >> If it looks OK, I'd like to merge to master soon, but
> >> >> >> >> >> probably not until next week.
> >> >> >> >> >>
> >> >> >> >> >> Thanks.
> >> >> >> >> >>
> >> >> >> >> >> -Brian
> >> >> >> >> >>
> >> >> >> >> >>
> >> >> >> >> >> ------------------------------------------------------------
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> >> >> >> >> >> _______________________________________________
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> >> >> >> >> >
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> 
diff --git a/src/mesa/drivers/dri/common/drirenderbuffer.c b/src/mesa/drivers/dri/common/drirenderbuffer.c
index 4e7e92c..4ee9139 100644
--- a/src/mesa/drivers/dri/common/drirenderbuffer.c
+++ b/src/mesa/drivers/dri/common/drirenderbuffer.c
@@ -101,10 +101,12 @@ driNewRenderbuffer(gl_format format, GLvoid *addr,
          assert(cpp == 4);
          break;
       case MESA_FORMAT_Z24_S8:
+      case MESA_FORMAT_Z24_X8:
          drb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT;
          assert(cpp == 4);
          break;
       case MESA_FORMAT_S8_Z24:
+      case MESA_FORMAT_X8_Z24:
          drb->Base.DataType = GL_UNSIGNED_INT_24_8_EXT;
          assert(cpp == 4);
          break;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index ded81ff..23168e7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -65,6 +65,16 @@ typedef struct radeon_context *radeonContextPtr;
 #define RADEON_TCL_FALLBACK_TCL_DISABLE       0x80 /* user disable */
 #define RADEON_TCL_FALLBACK_FOGCOORDSPEC      0x100 /* fogcoord, sep. spec light */
 
+/** Formats to use for Z+S or Z surfaces */
+#if defined(RADEON_R200) || defined(RADEON_R300)
+#define RADEON_ZS_FORMAT MESA_FORMAT_Z24_S8
+#define RADEON_Z_FORMAT MESA_FORMAT_Z24_X8
+#else
+#define RADEON_ZS_FORMAT MESA_FORMAT_S8_Z24
+#define RADEON_Z_FORMAT MESA_FORMAT_X8_Z24
+#endif
+
+
 /* The blit width for texture uploads
  */
 #define BLIT_WIDTH_BYTES 1024
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index bf69cd9..0aefd1e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -121,7 +121,7 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
    case GL_STENCIL_INDEX8_EXT:
    case GL_STENCIL_INDEX16_EXT:
       /* alloc a depth+stencil buffer */
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = RADEON_ZS_FORMAT;
       rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
       cpp = 4;
       break;
@@ -133,13 +133,13 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
    case GL_DEPTH_COMPONENT:
    case GL_DEPTH_COMPONENT24:
    case GL_DEPTH_COMPONENT32:
-      rb->Format = MESA_FORMAT_X8_Z24;
+      rb->Format = RADEON_Z_FORMAT;
       rb->DataType = GL_UNSIGNED_INT;
       cpp = 4;
       break;
    case GL_DEPTH_STENCIL_EXT:
    case GL_DEPTH24_STENCIL8_EXT:
-      rb->Format = MESA_FORMAT_S8_Z24;
+      rb->Format = RADEON_ZS_FORMAT;
       rb->DataType = GL_UNSIGNED_INT_24_8_EXT;
       cpp = 4;
       break;
@@ -280,11 +280,11 @@ radeon_create_renderbuffer(gl_format format, __DRIdrawablePrivate *driDrawPriv)
 	    rrb->base.DataType = GL_UNSIGNED_SHORT;
             rrb->base._BaseFormat = GL_DEPTH_COMPONENT;
 	    break;
-	case MESA_FORMAT_X8_Z24:
+	case RADEON_Z_FORMAT:
 	    rrb->base.DataType = GL_UNSIGNED_INT;
             rrb->base._BaseFormat = GL_DEPTH_COMPONENT;
 	    break;
-	case MESA_FORMAT_S8_Z24:
+	case RADEON_ZS_FORMAT:
 	    rrb->base.DataType = GL_UNSIGNED_INT_24_8_EXT;
             rrb->base._BaseFormat = GL_DEPTH_STENCIL;
 	    break;
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 7a124a8..e820a16 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -1503,14 +1503,14 @@ radeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
     if (mesaVis->depthBits == 24) {
       if (mesaVis->stencilBits == 8) {
 	struct radeon_renderbuffer *depthStencilRb =
-           radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
+           radeon_create_renderbuffer(RADEON_ZS_FORMAT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base);
 	depthStencilRb->has_surface = screen->depthHasSurface;
       } else {
 	/* depth renderbuffer */
 	struct radeon_renderbuffer *depth =
-           radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
+           radeon_create_renderbuffer(RADEON_Z_FORMAT, driDrawPriv);
 	_mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base);
 	depth->has_surface = screen->depthHasSurface;
       }
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 2bc7d31..9356192 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -526,10 +526,7 @@ static GLubyte *radeon_ptr_2byte_8x2(const struct radeon_renderbuffer * rrb,
 #define WRITE_DEPTH( _x, _y, d )					\
 do {									\
    GLuint *_ptr = (GLuint*)radeon_ptr_4byte( rrb, _x + x_off, _y + y_off );		\
-   GLuint tmp = *_ptr;				\
-   tmp &= 0x000000ff;							\
-   tmp |= ((d << 8) & 0xffffff00);					\
-   *_ptr = tmp;					\
+   *_ptr = d << 8;					\
 } while (0)
 #elif defined(RADEON_R600)
 #define WRITE_DEPTH( _x, _y, d )					\
@@ -660,10 +657,7 @@ do {									\
 #define WRITE_STENCIL( _x, _y, d )					\
 do {									\
    GLuint *_ptr = (GLuint*)radeon_ptr_4byte(rrb, _x + x_off, _y + y_off);		\
-   GLuint tmp = *_ptr;				\
-   tmp &= 0xffffff00;							\
-   tmp |= (d) & 0xff;							\
-   *_ptr = tmp;					\
+   *_ptr = (d) & 0xff;					\
 } while (0)
 #elif defined(RADEON_R600)
 #define WRITE_STENCIL( _x, _y, d )					\
@@ -858,9 +852,9 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
 		radeonInitPointers_ARGB1555(&rrb->base);
 	} else if (rrb->base.Format == MESA_FORMAT_Z16) {
 		radeonInitDepthPointers_z16(&rrb->base);
-	} else if (rrb->base.Format == MESA_FORMAT_X8_Z24) {
+	} else if (rrb->base.Format == RADEON_Z_FORMAT) {
 		radeonInitDepthPointers_z24(&rrb->base);
-	} else if (rrb->base.Format == MESA_FORMAT_S8_Z24) {
+	} else if (rrb->base.Format == RADEON_ZS_FORMAT) {
 		radeonInitDepthPointers_s8_z24(&rrb->base);
 	} else if (rrb->base.Format == MESA_FORMAT_S8) {
 		radeonInitStencilPointers_s8_z24(&rrb->base);
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