On Tue, Apr 24, 2012 at 7:50 AM, Jonas Bonn <[email protected]> wrote:
> > > > > Right now my plan is to add another bit called ND to the SR register. > > I suppose bit 17 isn't currently taken, so I'll use that one. SR[ND] > > will be zero for cores like the OR1200 that have a delay slot, and 1 > > for my core that doesn't have it. > > I don't see why this is needed. I need to know this at compile time... > why do I need to know it at runtime? > > So when you are debugging a non working program on a system that you thought had no delay slot you can query the hardware and check for sure. Personally I would have gone with positive logic where you have a delay bit that is 1 when you have a delay and 0 when you don't. John Eaton
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