At 09:56 AM 5/4/01 -0400, Mamdouh Wahab wrote:

>I use Protel 99 SE on Windows 98 , a couple of times
>when I generate the netlist from the Schematics, some
>connections drop out, they are on the schematics but
>they don't appear on the netlist. Is there a way over that
>without having to review the whole netlist.

How do you know that the connections are "on the schematics"?

Simply because something appears to the eye as a wire does not mean that a 
connection has actually been made.

OrCAD, or Tango, used to not connect pins which had the wire drawn too far 
into the pin. It was essential that the wire *end* on the pin. Protel will 
not ordinarily do this because auto-junction will add a junction if you 
cross a pin. But if you turn autojunction off or if you delete what looks 
like an unnecessary junction, you will be eliminating the connection even 
though it appears to be there.

Ordinarily, also, an unconnected pin will generate an error when one runs 
ERC. But one may decide to ignore unconnected pin warnings, particularly if 
there are many of them, or one may have the matrix set so that, for 
example, unconnected outputs are not flagged. *Every* unconnected pin 
should generate a warning. When you are drawing the schematic and you want 
to leave an explicit pin unconnected, drop a No-ERC Directive on the pin. 
That way the warning will be suppressed.

Only in a dire emergency would I release a net list to PCB when it has 
errors or warnings. A properly-drawn schematic should have neither. 
Sometimes the cause of a warning can be pretty hard to find, but net 
listing is unreliable in the presence of warnings, plus there are plenty of 
conditions which can cause errors even if there are no warnings.

One of the common ones is to use two variations of the same net name. 
Suppose on one page there is a net called "netl." Then on another page one 
names what is intended to be the same net "net1." Do you see the 
difference? I think I'll leave this one as a little puzzle to brighten up 
our days.... If you know the answer, or figure it out, don't post it until 
tomorrow, if you post it at all.

Anyway, *any* difference in net names will probably cause a problem. So 
what we can do is to run a list of nets (not the same thing as a net 
list!!! -- seems today is puzzle Friday!) and look down it. This won't help 
you if the first letters of the net are different such that the net is 
listed far away from the first one, but most errors it will catch.

If you want to be *entirely* certain, the only way is to have someone 
manually make a net list from a printed copy of the schematic. Then this 
list can be compared with the computer-generated list, using the Protel 
netlist comparison tool, and any differences can be verified. Why not just 
mark off the net list against the schematic? For the same reason that 
scientists prefer double-blind tests if they are practical. What you expect 
can influence what you see.

Using Sheet Symbols/Port connections is probably safest, since it forces 
you to be explicit on all levels, and if a net is misnamed on one sheet it 
will either create a warning or error if its name does not match what is on 
the sheet symbol, and from then on the name does not matter.

If I were to use Netlabels and Ports Global, or Ports Only Global, I'd 
probably write a utility to sort the net names from a list of nets, sorting 
on last character first, then next-to-last, etc., i.e., "batx2" would be 
sorted after "datx2" (probably immediately after), making it easy to find 
*initial* letter errors.

Note a single-pin net warnings is often an indication that a net naming 
error exists; this catches many connection errors; but it can happen that 
two sections of a net are isolated by an error, and each section has more 
than one pin. If all the pins are passive, for example, every net will have 
more than one pin and no warning will be generated.

However, if one is thorough with nailing down ERC errors and warnings, and 
one double-checks the net names, and, as another wrote, one works on grid, 
preferably 0.1 inch grid, the incidence of hard errors can become low 
enough that it is more economical to go ahead an make a prototype, which 
will catch nearly all remaining errors. Yes, it's an expensive way to find 
an error, but it is also expensive to sit there and verify a net list.

In another thirty years, perhaps when we try to name a net "bat2," the 
'puter will say to us, "Is this what you want? You have another net named 
"dat2." On the other hand, who knows how much of this job we will still be 
doing....

"Computer, make me a device which will turn down the heat when I start to 
sweat unless I have a fever. And I don't want to wear anything."

"Yes, sir, I can get most of it off the shelf for TC50 and the sensor 
interface will cost TC80 to design and build through mak-yr-own.com. Shall 
I go ahead?"

"Show me the plans first."

"Here's a display of the system diagram. The complete plans will take about 
three hours to show you. Shall I go ahead?"

"Never mind, I think I'll just tell you when I want the heat turned down...."

[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433


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