At 09:04 AM 11/27/01 +1000, [EMAIL PROTECTED] wrote:

>Plus all the 'widebus' type logic IC's. The inability to easily gate swap 
>is one
>of the reasons people resort to laying the PCB out first and creating the SCH
>second. Its a cumbersome system in Protel and a backward step from V2.8.

I'm going to repeat that it is not difficult to gate-swap in Protel. What 
is missing is the pin-association and gate-swap intelligence, leaving two 
ways to do the job:

(1) Change the schematic and Update PCB. If the PCB has a lot of nodes, 
however, this may take too much time.

(2) Edit the net assignments of the pads to effect a swap. Then run the 
Synchronizer (Schematic: Update PCB) or Load Nets and preview the macros. 
Right-click in the window and create a macro report. I think this aborts 
the macro execution; if it doesn't, cancel. This report will be, 
effectively, a change list. Use it to edit the schematic. When the 
Synchronizer is run again there should be no macros or some error has been 
made in changing the schematic (or was made when the pad nets were swapped).

There is a variation on (2) that might be faster. Unlock the primitives and 
move the pads around to interchange them. Before moving the pads, pop a 
small pad on each of the component pads, give it a pad name like "TEMP." 
Lock these extra pads. They can be used to snap the larger moved footprint 
pads into place. They can also be placed on a mech layer for the same 
purpose. (One fast way to create a lot of these position pads for a 
footprint is to photoplot the footprint, import the gerber to a scratch PCB 
file, edit the pads to a mech layer, and copy and paste them over the 
original footprint. The general idea of making a template to control 
positioning of primitives has many applications....

If the footprint pad names were descriptive of what section of a gate they 
belong to and what type they are (i.e., input, output....), one would be 
able to see what was swappable directly on-screen. There is no law that 
says that the pads of a 7400 nand gate have to be numbered 1 - 14, they 
could be *named* 1A,1B,1OUT,2A,2B,2OUT,GND,3OUT,3B,3A,4OUT,4B,4A,VCC. Of 
course the schematic pins would have to be numbered the same way.

Once you get the gates swapped as desired -- which can happen during 
routing -- change the schematic, *update the footprints* to restore the 
original pad sequence (I think Protel will move the nets with the pads, 
creating errors), and then synchronize, which should leave no errors if you 
have made no mistakes. Be sure to do a global edit to leave all the 
components with primitives locked.

It might seem dangerous to move those pads around, but updating the 
footprints (this is done from the library) restores the correct positioning 
of the pads.

I have not personally done every step of what I have described, but I have 
used the general idea and I just added some details which might improve the 

Abdulrahman Lomax
Easthampton, Massachusetts USA

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