Howdy,

I do not know if any of the higher priced packages accomplish this check.  I do know 
that even Allegro's Autosilk function does not correctly or always prevent text on 
pads.  Valor does check for these violations, though it may not be an economical 
solution.

Cheers!
Drew


----- Original Message ----- 
From: "Ian Wilson" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Tuesday, January 01, 2002 3:48 AM
Subject: Re: [PEDA] Design Rules


> On 09:17 AM 28/12/2001 -0500, Anthony Whitesell said:
> 
> >Does anyone know if it is possible (or how to) set a design rule to check
> >between the overlay and the soldermask layers?  If you place a designator
> >over a pad or via then it does not appear correctly on the finished PCB.  I
> >have simplified the solution to check the reference designators versus the
> >[inverted] soldermask of the same side and make sure they don't overlap.  I
> >was hoping to automate the process with a design rule.  Any ideas?
> >
> >Anthony Whitesell
> >Sunrise Labs
> 
> Out of luck I think - there is no possibility using the current set of 
> design rules (from memory).  I was asked about this some time ago and spent 
> a little time looking at it but I can't even remember where we got to.  I 
> know I am still doing it with a visual check so I guess I did not work out 
> a better way.
> 
> I would certainly like a better solution.  A server could be written to do 
> the check but there is absolutely no incentive in writing such servers 
> unless you have lots of free time or your company will pay you to do it.
> 
> There may be some combination layer colours and "Transparent layer 
> colouring" that would show up violations clearly but this does not do much 
> for mis-registration (there is no clearance parameter).
> 
> I know that some of the CAM packages can do an overlay/silkscreen cut to 
> prevent text on pads but I do not know if Camtastic has such a checking 
> function.
> 
> A design rule would be nice.
> 
> Ian Wilson
> 

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