At 04:00 PM 14/01/02 -0500, you wrote:

>         Hey all,
>
>         Rather dumb question here, but I'm stumped. Can someone enlighten 
> me as to where the footprints for surface-mount chip resistor arrays are, 
> and how I would set them up against my schematic? I want to use something 
> like an EZA or EXB series resistor array to help cut down on component 
> count/size in a rather demanding layout, but I can't seem to find 
> anything other than the standard discreet SMT footprints (1206, 0805, 
> etc) that I've been using thus far.
>
>         Any help would be greatly appreciated. I assume that I must be 
> missing something stupid.
>
>-- Matt

It really is very little problem to make your own footprints, once you take 
the time to learn how (and there is help in the manuals).  What is harder 
is having the experience to sort of judge what will work when you have no 
guidelines.  If you can find a manufacturers recommended layout then you 
can easily transfer this into a Protel library.

I suggest you create new Sch and PCB library documents and look about for 
suitable footprint data from a couple of manufacturers and then take the 
time to learn how to create both Sch symbols and PCB footprints.  Then you 
can look at existing Sch and PCB libraries for ideas/suggestions on how 
footprints are created.

For PCB footprints you probably only need to add a number of top layer 
surface pads (that is hole size of zero) and some tracks on the top overlay 
to give the bounding rectangle.  The size and position of the pads comes 
from the manufacturers data - usually it is not given in the 
centre-to-centre format that you will need for Protel and so some 
subtractions and additions may be required.

As far as the overlay goes, creating the bounding rectangle is often where 
I am most fussy as big outlines are really clumsy but if they are too small 
then they do not show (adequately) the required manufacturing clearances 
and/or you risk overlay drifting onto the pads when there is manufacturing 
mis-registration.  I usually keep overly about 8 mils wide and at least 10 
mils from pads - sometimes further depending on what mood I am in.

I am fairly sure I created the 1206 quad-Res footprint we use from 
manufacturers suggested layout so such info must be around.  Doing a 1:1 
laser plot, centred on the page, can be a useful check if you are nervous.

As for Sch symbols - these are also easy enough to create but there is more 
info that can be entered into the library. I strongly suggest that you take 
the time to understand the different pin types and be religious about 
assigning the correct pin type to each pin.  This will make ERC 
reliable.  Also, entering in details such as the default designator etc 
will also speed your later work.  Make sure you choose a naming scheme that 
is unlikely to conflict with existing components as this can cause problems 
- less so than in the past though since the component cache matching has 
been tightened up.  With a resistor array you have the choice of making a 
multi-part component or putting all the array elements together.  This 
choice depends largely on your Sch style and preference.  There is also 
help in the manuals on creating Sch symbols.

Once you have created the library parts do not forget to add them to the 
library list of the Sch and PCB documents you are editing. Remember a 
library document that is open for editing is not necessarily available in 
the library list for other documents.

Sorry is the above is old hat and you already new all of it.  But the 
faster that Protel users realize that they are not constrained by the 
existence of components that happen to be in the Protel supplied libraries 
the better.  (Many people swear off any packaged libraries, preferring to 
at least carefully check pre-prepared symbols and footprints very carefully 
before use and then extracting/modifying into their own validated library 
system.)

Bye for now,
Ian Wilson


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