On 09:36 AM 19/09/2002 +0200, Ian Wilson said on PEDA:

>snip<

The P99SE DRC system does not consider multi-layer entities as also 
existing on the various copper layers.  This is why Kulajew's rule does
not 
work.  I have raised this with Altium on a number of occasions.  It is a

structural issue I gather.  It is not a bug but a limitation of the 
underlying architecture.  To us users, though, it is annoying.

>> very annoying, and its STILL the same on DXP!  What gives Atium?  We
do mostly single/PTH boards, and very rarely mulilayer.  My library has
overy large bottom layer pads (for single sided boards) and very small
top layer pads (to encourage solder to flow up pth wall and stop shorts
etc on top)  this means however that when I route on top layer it
>loooks< as though im going to short (because I see the biggest pad,
bottom) and not the extra space around the top pad)  Arrrgh!  

I have not checked whether DXP is clever enough to know that a
multilayer 
pad also exists on each copper layer but it does support selective
tenting.


>>> no its not!  This is >one< of the reasons we will not purchase yet.
Any comments Altium?  Is there a way around this or have I missed
something during my 5 minutes with DXP?

Rich

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