One of my pet gripes is that "multilayer" entities are always shown,
(unless turned off completely) even when they are irrelevant to the
layer set being displayed.

In particular, when I'm using blind vias it's particularly difficult
to work on circuitry on one board side when the other has blind vias
all over it - not because the DRC stuffs up or anything, but because
the other side vias are always drawn at the front of the drawing order.

I'd prefer that the portion of a multilayer entity that affects the
current layer be displayed at the front of the drawing order, while
the non-current layer portion be user-definable for colour and drawing
order.

This would allow varying pad diameters in a padstack to show clearly
as one worked on different layers, as well as making it possible to
visually distinguish between vias that affect the region where I'm
currently working from vias that I can ignore because they don't pass
through the current working layer.

John Haddy

> -----Original Message-----
> From: Rich Thompson [mailto:[EMAIL PROTECTED]]
> Sent: Friday, 20 September 2002 3:37 PM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] Selective tenting on one side only
> 
> 
> Ian
> 
> Yes DRC works as it should and I can route properly, however I can't SEE
> what I am routing as the largest pad always covers the samller pad.  It
> LOOKS as though there is a short (which there isn't) I know, im being
> picky ;-)  I just think it's a pain that bottom/top layer will not show
> the correct pad sizes, I certainly think it should.
> 
> I just re-tried this on DXP, if I turn multilayer off, I don't seem to
> be able to see any evidence of pads at all.  On 99SE at least you can
> fool it by turning holes, drill and solder/paster mask layers on.  I
> have turned these layers on but I can only see the pads in multi layer
> mode.  Am I missing something here?
> 
> 
> 
> -----Original Message-----
> From: Ian Wilson [mailto:[EMAIL PROTECTED]] 
> Sent: 20 September 2002 01:12
> To: Protel EDA Forum
> Subject: Re: [PEDA] Selective tenting on one side only
> 
> 
> On 07:50 PM 19/09/2002 +0100, Rich Thompson said:
> 
> >On 09:36 AM 19/09/2002 +0200, Ian Wilson said on PEDA:
> >
> > >snip<
> >
> >The P99SE DRC system does not consider multi-layer entities as also 
> >existing on the various copper layers.  This is why Kulajew's rule does
> 
> >not work.  I have raised this with Altium on a number of occasions.  It
> 
> >is a
> >
> >structural issue I gather.  It is not a bug but a limitation of the 
> >underlying architecture.  To us users, though, it is annoying.
> >
> > >> very annoying, and its STILL the same on DXP!  What gives Atium?  
> > >> We
> >do mostly single/PTH boards, and very rarely mulilayer.  My library has
> 
> >overy large bottom layer pads (for single sided boards) and very small 
> >top layer pads (to encourage solder to flow up pth wall and stop shorts
> 
> >etc on top)  this means however that when I route on top layer it
> > >loooks< as though im going to short (because I see the biggest pad,
> >bottom) and not the extra space around the top pad)  Arrrgh!
> 
> I just tested this in DXP - it seems to work OK at least DRC allowed me
> to 
> bring the top tracks close to the top pad size while bottom layer tracks
> 
> were controlled by the size of the bottom layer pad size.
> 
> In fact I thought this worked OK in P99SE as well.  The clearance DRC, I
> 
> thought, is smart enough to use the different pad sizes according the 
> tracks layer.
> 
> I must be missing something here.  Can you explain more?  Can you email
> me 
> (directly not to the list - [EMAIL PROTECTED]) a small sample
> file 
> showing the issue?
> 
> My problem with multilayer entities is really restricted to the
> calculated 
> layers like paste and mask layers.
> 
> Ian
> 

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