----- Original Message ----- From: "Ian Wilson" <[EMAIL PROTECTED]> To: "Protel EDA Forum" <[EMAIL PROTECTED]> Sent: Wednesday, September 03, 2003 8:10 PM Subject: Re: [PEDA] Joining 2 different nets keeping seperate identifiers?
> On 12:43 PM 4/09/2003, JaMi Smith said: > >There are basically two different ways that a current sense resistor is > >normally used. The first is between a voltage source and a "load", and the > >second is between the "load" and ground. In both cases, the voltage drop is > >measured across the current sense resistor between the supply leg and the > >"load". > > > I think, Jami, that you are missing a critical aspect or it is getting > buried in too much verbage. Sorry if I have just missed it, I am afraid I > am doing you something of a disservice by not reading your post(s) in full. > You are right in that sometimes I can get too longwinded in trying to explain someting, and I really need to try and just keep it short and simple. > It is common to have four connections to a current sense resistor, two on > each side. One on each side will be big and fat to carry the current, and > the other with be a signal trace (carrying no current) that ensures the > voltage drop across just the resistor is sensed - the voltage drop across > power tracks, ground planes etc are ignored. The only tricky stuff with > this is that it requires common-mode input ranges beyond, or at least close > to, the supplies in many situations - but this is no longer rocket science. > I agree with most here except the "carrying no current", where I would say that that there is quite probably at least a small amount current (unless the amplifier has CMOS or FET inputs) but which is nontheless large enough to be affected by the restivity of the trace, where too narrow a trace, or differences in thickness and or width in manufacturing could cause differences in operation of the sensing circuit from board to board. If this is a very high current application, there could even be some fairly decent currents in the feedback loop, depending on just what was going on in the "regulator" portion of the circuit. In many regulator IC's this feedback input can even be the base of a bipolar transistor, whose operation is actually current controlled, notwithstanding that it may appear an amplifier in the datasheet. Even in the case of CMOS or FET inputs to an amplifier, which I think would be avoided in this type of application, but which really would have no current flow involved, I would still maintain that crosstalk and any losses due to restivity should still be avoided. I concurr respecting the 4 connections, but I am simply assuming that the 2 connections on the side of the voltage source (or ground in the sceneario discribed by Abd) are considersd internal to the regulation circuit, and have therefore not discussed them. I am also assumming that there is a regulator circuit involved in the original application which lead to the initial questions in this post, but possibly I am going to far in that assumption, which I have based most of my comments on, and even some here above. Oh well. Thanks for the feedback. JaMi * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
