Oops, sorry for the empty response . . . that's what happens when you double
click the reply button . . . operator error . . .

I think that there should be a little more clarification of a few things
before the misunderstanding in this thread becomes too rampant.

There are basically two different ways that a current sense resistor is
normally used. The first is between a voltage source and a "load", and the
second is between the "load" and ground. In both cases, the voltage drop is
measured across the current sense resistor between the supply leg and the

Typically, in this type of scenario, the voltage source is the output of a
regulator, with the "feedback" from the "load" side of the current sense
resistor being used to control the output of that regulator.

My original response and follow-up, as well as my response to Ian's post,
are based on a current sense resistor being used between the voltage source
and the "load".

I believe that Ian's response to my post also assumed that we were talking
about the current sense resistor being placed between the voltage source and
the "load" also, but it may not have, although it does not really make a
difference in his post or in my response to it.

It appears that Abd, in his response below, is invisioning the current sense
resistor in the second location mentioned above, which is between the "load"
and ground, or possibly that could be better understood if it is stated as
the between the "return" from the "load" and the ground. While this is
different than I envisioned, the problem is really the same, and that is
that the current sense resistor is usually put in one leg of a supply or
regulator curcuit (either positive or negative) so that the current can be
determined by measuring the voltage drop across the resistor between that
leg of the supply and the "load", or if you prefer, between the "load" and
the supply.

In either case, the "feedback" to the amplifier must be connected to the
"load" side of the current sense resistor, with the other side of the
current sense resistor connected to the appropriate positive or negative
source, as dictated by the design requirements of the circuit, such that the
current sense resistor is "in series" with the "load"

This "load" side of the current sense resistor is both the place that any
high currents going to or comming from the "load" must travel in order to
get from or to the supply (or regulator circuit), and it is also the place
from which a "feedback" trace must be connected back to the input of the
amplifier that moniters the voltage drop across the current sense resistor.

I am pointing this out so that anyone reading this compilation of responses
can understand the differences in the possible location of the current sense
resistor in the different discussions, and understand that while there are
these differences, the requirements for handling the "feedback" from the
"load" side of the current sense resistor is virtually the same in all of
the discussions, notwithstanding possible confusion brought about by where
the "supply" end of the current sense resistor is located.

With that said, I have a few additional comments below.


----- Original Message -----
From: "Abd ul-Rahman Lomax" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Wednesday, September 03, 2003 4:50 PM
Subject: Re: [PEDA] Joining 2 different nets keeping seperate identifiers?

> At 07:09 AM 9/3/2003, Joe McCauley wrote:
> >I need to have a current return line with 3mm thickness. This line has a
> >identifier of 'Iret'.
> >This line connects to a current sense resistor. I need to take a line
> >this resistor to an amplifier input.
> Here is what I understand from this: this circuit is measuring current by
> measuring the voltage drop across the sense resistor. The current being
> measured is sufficient that a 3 mm trace is required. Presumably the
> temperature rise calculations have been done.... Or the trace is that fat
> so that error due to voltage drop in the trace is minimized.
> >There is no need for this amplifier input line to be 3mm thick, in fact
> >the point of view of routing it would be better if it were not!
> Mr. McCauley writes about one line. Really, there are two, since one is
> measuring the voltage drop across a resistor. Of course, if there is a
> solid enough ground at the ground side of the sense resistor, one might
> assume that the drop in that part of the circuit can be neglected. Or
> perhaps the circuit will be calibrated to account for that additional
> Otherwise one needs *two* sense lines, which will feed a differential
> amplifier of some kind.
> Presumably there will be negligible current in the sense line (the
> "amplifier input line.") At least whatever measures that voltage should be
> designed to minimize the current. So the line can be narrow, really it
> needs to be wide enough to be reliably fabricated.

I would disagree here, in that I believe that the trace should be large
enough to not contribute any "losses" of its own by being so narrow that
differences in manufacturing runs may produce traces which may have
differences in their own resistivity, which will in fact affect the circuit.
There needs to be a good direct path from the "load" side of the current
sense resistor back to the input of the amplifier, and it needs to have no
problems of its own such as losses or crosstalk from other circuits.

> >  Is there a
> >way of joining 2 different nets in the schematic while keeping seperate
> >identifiers? If there were then I could setup the design rules in PCB to
> >always have the 'Iret' net 3mm thick, while the other one which connects
> >it could be (say) 0.35mm. Am I over complicating things by trying to do
> >this way?
> I don't think so. I'm from the school that thinks that good DRC is very
> important. You can certainly accomplish what you want by setting the
> minimum thickness for Iret at 0.35 mm and the maximum at 3 mm. But this
> won't guarantee that you get 3 mm where it is needed.
> There might be some way to do this with from-tos, as mentioned by another
> designer, but I don't know that. I do notice that From-To Class is one of
> the possible attributes controlling width rules, but I've never
> investigated that rule. Maybe I should read the manual.... Naah, that's
> something I recommend to others, I don't do it myself.... :-)
> As mentioned by Mr. Ross, the so-called "virtual short" will accomplish
> this. Once you have built this footprint, have placed a symbol for it on
> the schematic and have wired it, and have set a design rule for the
> footprint (or component class, if by some chance you had different kinds
> these creatures), it is pretty much set and forget.
> You would have your IRet net, being the return net for your large current.
> Then you would place, on your schematic, the virtual short, which is, for
> schematic purposes, a jumper. One side of the jumper is connected to IRet,
> typically right at the sense resistor pad. The other side of the jumper is
> connected to your sense net that goes to the amplifier. You could actually
> make the jumper structure part of the sense resistor pad, which would
> guarantee that the short is placed in the proper location. In other words,
> you'd build a symbol and footprint for the sense resistor that had two
> extra pads for the sense connections.

Assuming that "Iret" is in fact the "return net" from the "load", and is a
large trace connected to one end (the "load" end) of the current sense
resistor, with the other end of the current sense resistor being connected
to ground (the negative supply), I would say that there should be another
trace going from the same "Iret" end of the current sense resistor to the
amplifier input. This trace is the "feedback" portion of the "Iret" trace,
or what I would call the "feedback" trace, but there is absolutely no reason
in the world that this trace should have a different "net" name, or have any
"virtual short" involved with it.

All you need is a good clean direct trace of moderate dimension (to avoid
any losses) that goes back to the amplifier input and avoids any crosstalk
from other traces. It is really that simple. If you do anything else, you
are shooting yourself in the foot.

With no offense intended, I would say that this is one place that the "Lomax
Virtual Short" should not even be considered, let alone discussed, since
even by  your own discussion here you must admit that you cannot really
control what is happening at manufacturing level with the gerbers etc., and
you cannot explicitly rule out that there could be some etching into the
trace at the point of the "gap" during manufacturering, which will in fact
unquestionabaly affect the resistivity of the trace, and therefore the
operation of the circuit.

With that said, I think that almost everything else said here is not
relevant to the real problem at hand, which is really boiled down to two
very simple issues, the width of the trace from the "load" end of the
current sense resistor to the "load" itself, and the width of the trace from
that same "load" end of the current sense resistor back to the input of the
amplifier that is sensing the voltage drop across the resistor.

Everything else here is totally irrelevant and confusing the issue.

> These pads have a gap between them which is below fabrication possibility.
> Properly designed, there will actually be *no* gap on the films, because
> the gap will be well below the gerber resolution. It might be, say 4
> microinches. (Protel can get a tad flaky in the microinch region since
> that's the database resolution, as I recall, otherwise it could be 1
> microinch!) Then a design rule allows pads in that particular footprint to
> be very close to each other, say 2 microinches, without creating a DRC
> violation. By the way, you'll use rectangular pads....
> How do you make the virtual short? I described above the principle for
> using fabrication limits to create a physical short that Protel considers
> as being unconnected. There is at least one other way, which became
> practical and reasonably safe when the CAM Manager was created, allowing
> custom CAM setups for your design. One of the mech layers is dedicated to
> short, that is, a shorting trace is on that mech layer. It is merged with
> the normal layer as part of the CAM definition for the normal layer.
> With the fabrication limit method, you need to create a design rule. It's
> good thing that if you forget to do this, you will get a DRC error, so
> is quite safe. The down side of this method is that if you aren't careful
> about how your CAM pad definitions are created, roundoff can leave a real
> gap on the film and a helpful fabricator will increase it for you, this
> actually happened. The mech layer merge technique will produce a
> bulletproof fab film, but if you forget to create the CAM definition for
> the merge, or it is done incorrectly, there will be no DRC warning.
> Generally, once one has verified that whatever setup you use is working
> *and that there is no gap, i.e, that the gerber pads, as defined, are in
> actual contact (i.e, below 0.1 mil or whatever resolution was chosen for
> the films), it will continue to work, i.e., whenever changes are made to
> the design, DRC will verify that the widths are correct.
> Virtual shorts are useful wherever you want a copper connection with two
> separate nets. Examples would be:
> RF parts, such as inductors, made with traces.
> Separated grounds, such as DGND and AGND, which are connected together but
> which must be controlled to be in two (or more) different nets tied at
> one place.
> And, this application: sense lines used with high-current traces.
> Abd ul-Rahman Lomax
> PCB design, consulting, and training
> Protel EDA license resales
> Easthampton, Massachusetts, USA
> (413) 527-3881, efax (419) 730-4777
> 1 Protel 99SE license for sale, $3500 OBO.

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