[...] Where did I give the impression that I suppress warnings? Or am I reading to much into a simple statement?
You didn't give that impression. My comment was general, not critical of you. I write not just for one person, but for the readership. I use an individual case as a basis for making general comments; here I was proceeding to make a general case for doing what you had already made clear that you do, track down and fix schematic problems.
Protel makes it easy to suppress warnings and errors, a good feature that can be abused by someone who doesn't want to take the time to find out why the error/warning is being issued. It's more common for engineers who are going to avoid finding and fixing the problems just to ignore the errors and warnings, and, if one is going to do that, it's better to leave them rather than pop a No-ERC Directive on them. This is what I was writing about.
It's best, of course, to fix the problem so that no error or warning is issued, but in the case of unconnected pin warnings, the only way to do that, if the disconnection is intentional, and short of turning off unconnected pin warnings, is to put a No-ERC marker on top of the error marker, thus suppressing it for all time. In fact, it's a good idea to place these as you go, whenever you intentionally leave a pin open (unless you intend to connect the pin later).
In the material I deleted above was this:
For single pin issues in 99SE I usually just placed a 0.5x0.5mm SMT test pad on those net, so no warnings :-) Taking them out the BOM was a pain, but better than an error
Sure, better than an error, if you don't mind placing the pad on the PCB. It shouldn't be necessary to take the part out of the BOM, I think that if the Type field is blank, it is left off anyway. But placing a test pad isn't necessary in my view, a No-ERC directive is just fine. Anyone looking at the schematic can see immediately that it is an unconnected pin! And they see the X on the pin, which tells them that this unconnected state is deliberate. It works.
You will see from the top sheet I took a screenshot of that I always add a netlabel to the connecting wires & buses, although you did not see all the child sheets you eill find a net label as well for every port as well (just like id key.sch).
Just to make sure you understand, I'll add that my comment about adding net labels to connecting wires on top-level sheet to sheet connections was a general one, taken from my head in trying to think of some 99SE quirks. The net labels shouldn't be needed, but I think they are in some cases. But adding them also has another benefit. When a net is labeled on the top level, this is the name that will be given to the net, regardless of what it is called on lower levels in the hierarchy. Usually, it is a benefit to have the name of a net in the PCB correspond to what the net is called in the schematic! Port and Sheet Entry names in 99SE don't control netlist net names, they are intersheet connection devices. I think this is may be different in DXP, that there are some options with regard to this.
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