Hello Vinay
Good News. I offer some good advice.
If your career path is embedded software engineer as opposed to Linux
application programmer buy these Jumper's.
You could have fixed your cable easily but more importantly you can hook up o
scope and logic analyzer and probe connectors.
Today's
, 'Mark Lazarewicz' via BeagleBoard
wrote:
Using Serial Debug Port on BeagleBone Black - KiranPalla.com
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Using Serial Debug Port on BeagleBone Black - KiranPalla.com
It is interesting to see boot messages while the OS is coming up on BeagleBone
Using Serial Debug Port on BeagleBone Black - KiranPalla.com
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Using Serial Debug Port on BeagleBone Black - KiranPalla.com
It is interesting to see boot messages while the OS is coming up on BeagleBone
Black. The messages are useful …
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Try this
https://www.dummies.com/computers/pcs/hardware/serial-ports-on-your-pc/
Sent from Yahoo Mail on Android
On Fri, Jul 2, 2021 at 5:14 AM, Vinayakumar Chikkadi
wrote: Hi
I am trying to get the debug serial working on Ubuntu for my beagle bone black
board.
I am powering up the BBB
AC or brushless DC electric motor are identified as two orthogonal
components that can be visualized with a vector.
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On Fri, Jun 18, 2021 at 3:20 AM, 'Mark Lazarewicz' via
BeagleBoard wrote: Even Nick the TI resident
PRU genius used 2 PRU to implement his
they ported libprio fixed it and
documented it properly
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On Fri, Jun 18, 2021 at 2:58 AM, 'Mark Lazarewicz' via
BeagleBoard wrote: Slightly off subject but to
me this AM64 looks big
https://training.ti.com/sitara-am64x-processors-combine-powerful-communication
for the PRU來
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On Wed, Jun 16, 2021 at 11:52 AM, 'Mark Lazarewicz' via
BeagleBoard wrote: Both PRUs exchange the last
ring buffer writing position by DRam (or scratch pad).
Too many RAMS we need to be clear to avoid confusion please
DDR is DRAM
Internal RAM
Both PRUs exchange the last ring buffer writing position by DRam (or scratch
pad).
Too many RAMS we need to be clear to avoid confusion please
DDR is DRAM
Internal RAM is SRAM and there are several
SBL ARM internal SRAM (fast from ARM)PRU shared RAMPRU data and instruction
RAM( fastest for
#The question is can PRU0 read FIFO0 while PRU1 #might try to read FIFO1 at the
same time?
If these FIFOS are in Data RAM it's recommended to use shared memory. What's
confusing is as I understood it there's a PRU shared RAM and another larger
shared memory so sample code must be inspected
Hello Walter
Two ansychronous processor's it's entirely possible eventually ones writing and
other is reading and gets bad Data that's why they invented hardware dual port
ram.
Ping pong circular buffer's work on one processor systems you disable
interrupts in critical regions or lock it with a
The touch response on my am335x SK works well. SD card comes with a touch GUI.
Schematics and BOM
https://www.ti.com/tool/TMDSSK3358
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On Thu, Jun 3, 2021 at 5:32 PM, John Dammeyer wrote:
#yiv9544055886 #yiv9544055886 -- _filtered {} _filtered {}
Hello AMF
I have 5 year old quad core win 8.1 64 bit 8 G ram laptop running Ubuntu 16.04
VM I used it to build SDK kernel no problems and
a new Debian 10 VM with a 64 bit GCC on same machine. The Debian VM is flaky
last attempt I just got memory calloc error on building 5.5 TI BSP from the
, 2021, 03:52:25 PM CDT, 'Mark Lazarewicz' via
BeagleBoard wrote:
Hello
I've failed to build following those instructions twice in Mainline and twice
using the TI BSP.version. the 2nd attempt of TI BSP is hung as we speak after
resolving dependencies for several hours. Each attempt takes
Hello
I've failed to build following those instructions twice in Mainline and twice
using the TI BSP.version. the 2nd attempt of TI BSP is hung as we speak after
resolving dependencies for several hours. Each attempt takes hours and the
build_kernel script doesnt care you already cloned 2G
long weekend.
Regards
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On Fri, May 28, 2021 at 2:35 PM, Robert Nelson
wrote:
On Fri, May 28, 2021 at 2:19 PM 'Mark Lazarewicz' via BeagleBoard
wrote:
Thanks Robert
I love these instructions very well done
my goal is to be able to build something
found this link before did not know it existed
So I guess my question is which version will work as is for testing some PRU
MSG examples as is?
Mark
On Friday, May 28, 2021, 1:45:35 PM CDT, Robert Nelson
wrote:
On Fri, May 28, 2021 at 1:39 PM 'Mark Lazarewicz' via BeagleBoard
wrote
Dumb question by a Debian Newb
I am following this now Debian: Getting Started with the BeagleBone Black
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Debian: Getting Started with the BeagleBone Black
This is a page about TI's Cortex-A8 based; BeagleBone Black. Availability
Boards: BeagleBone Black at
Very helpful post Bruce thanks. I am just a PRU observer. The resource file is
discussed in some TI documents it's a way to let Linux understand what
resources the PRU will need is what I understood.
I'm guessing the SDK examples I played with had this all set up.
My guess this file will be
Bruce
Make sure any approach you choose meets your requirement of using more RAM than
the PRUS have available if this is still a requirement.
Mark
On Tuesday, May 25, 2021, 01:41:27 PM CDT, Darren Freed
wrote:
Bruce,
I feel your frustration with getting familiar with PRU. What I
Bruce
I agree with your assessment.There is no one way to do this I mentioned two.PRU
cookbook and SDK Perhaps GitHub works as well.I know one method works doesn't
mean others won't.
I now understand better what you tried and where you got it from. Thanks .
My parting comment is only an
Bruce
What do " The Others" say is wrong?
I have seen that PRU support package.
In my reply last week it appears to me you have adopted what I call the apple
and oranges approach.
I'm trying to say serious but I think "the other's" were a mysterious cult on
star trek.
These instructions look
@Dennis thanks for clarification I think his previous post a week ago
mentioned Bb AI but Bruce please don't assume everyone read your recent
previous post is my advice.
So you need to narrow down something after you reply to Dennis confirming you
have correct Linux .
Start with an unmodified
John
Ohh boy you got me started now. My Verizon hotspot jetpack (my 3rd purchase)
resets very frequently sometimes 4 time's rebooting during important updates to
my online database of vinyl. It also Freeze's up after 2 years intermittently
for days. Linux and poor design. I suspect it's the
Hello Bruce in my opinion your missing some things important
1 Most important what's it doing?2 This is the BB AI correct?3 Where did this
code come from?4 What is your ARM OS and version. Compiler host details5 Brief
Summary of what you tried with important details(start from 5 and work
#Let's call it AssignIO(). This requests and locks #the scarce resource in
prep for an open. Odds are #unless you have some fancy hardware #multiplexing
it would stay assigned for the entire #program. But nothing stops you from
doing a #ReleaseIO() and then setting a GPIO bit to mux in #the
# I can't step the machine code past the ioctl system call
Hi John
What are using to step? It's been a long time but I remember being able to go
as deep as I wanted into the linux OS. The hard part was getting kernel source
code setup but i had that working requires debugging from linux build
is just a gatewayAs I understood
TJF solved this issue with libpru but his solution wasn't adopted As I have
mentioned before I have seen custom solutions to share data between the ARM and
DSP so I know its possible using TI Socs
On Tuesday, May 18, 2021, 04:10:00 PM CDT, 'Mark Lazarewicz
@TJF on this forum promotes a solution called libpruio that might work. I
don't know if it's fast enough though.
I thought libprio was designed to be very fast was my understanding. I Saw in
TI forum docs that UIO isn't supported in SDK Linux by TI.
I would definitely agree with below and your
Hi Walter
Probally unrelated but I wanted to share I saw if the linker command files
didn't include startup code to initialize variables or zero them like the ARM
does.A huge uncleaned index intyo an array wouldn't be good.
Perhaps this PRUDebug tool can speed up your debugging have not tried
Hello
Google Am335x PRU Support package it's got 6 labs and examples including ADC.
It's written for the SDK Linux Dennis mentioned but people have gotten these
examples to work with Linux supported in this group
There's also a Support package tar containing step by step HTML of all the
labs
Hi John
Interesting we used Pic for a CAN to USB Bridge for a doctors laptop to get
Data and and out of doctors tablet for an implantable heart pump.
TI 28335 DSP was master, TI DSP Piccolo ran the implant motor and we had a PIC
doing some system house keeping. All 3 processors were connected
Lazarewicz' via BeagleBoard schrieb am
Fr., 14. Mai 2021, 23:18:
CCS/JTAG works for me . I have used FPGA arm cores and ESP32 My position and
opinion is unique in this group I see no value in a PRU UNLESS every
peripheral is used on DSP/ARM and you need more peripherals I have seen that
done
CCS/JTAG works for me . I have used FPGA arm cores and ESP32 My position and
opinion is unique in this group I see no value in a PRU UNLESS every
peripheral is used on DSP/ARM and you need more peripherals I have seen that
done in a RTOS on ARM DSP PRU omapL178 very complex Motor controller
C means boot ROM icrocode isn't finding what's expected. Could be your
hardware or that your needing something in EMC.
You should read the AM335x TRM boot sequence and understand it well even if
your only a hardware designer.
- The AM335x has a boot loader (the '0th' stage if you will)
was unmaintainable. They liked that boss couldn't get rid of
them because changing the software would break the entire application.
Ahh I digress .
Mark
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On Thu, May 13, 2021 at 7:11 PM, 'Mark Lazarewicz' via
BeagleBoard wrote: Hi Kasimir
What's wrong
Hi Kasimir
What's wrong with below??
My datastructure was not in internal ram.volatile Event_t *event_knoten =
(Event_t *) (PRU0_DRAM + 0x200);
IMO
I think placing anything in a guaranteed memory area is best done with
sections from linker command file.
There's examples about placing data
Great news
Can you share how it ended up in external RAM?Incorrect Linker cmd file?
Mark
On Thursday, May 13, 2021, 05:24:27 PM CDT, Kasimir
wrote:
Hi all,
it's SOLVED :-)Thanks for all your input.Problem was located in memory
allocation.
Was not using the PRU-Dram. The
Have you seen the PRU Support Package examples???I saw examples of linker
placement in shared RAM
This example below the C variable is in by default in local RAM
What is smallest pulse period you require for your application?
void main(void){ volatile uint32_t gpio;
/* Clear
Hello Kasmir
I will take a look and hopefully others who are using PRU can also be helpful I
began programming in asm many many years ago but haven't used PRU assembler.
Can you reply whether you have an oscilloscope or high speed logic analyzer?
This is what we used to debug many years ago.
The memory access will add some cycle post your assembler code with comments
you're correct it doesn't make sense maybe someone will see the issues. The PRU
labs discuss measuring cycle times in CCS if you have JTAG but toggle a GPIO
and measure with a scope is probably easier.
Sent from
_ _ _ _| _ |___ ___ ___ ___ |
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_| _||__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___|
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Arago Project http://arago-project.org am335x-evm ttyS0
Arago 2019.11 am335x-evm ttyS0
am335x-evm login:
On Tuesday, May 11, 2021, 02:39:31 PM CDT, 'Mark Lazarewicz' via
BeagleBoard wrote:
HI Cheng
I have
HI Cheng
I have two Beaglebone White and the am335x SK both have JTAG on the board so no
soldering. The key is to follow the labs 1 to 3 only dont use any RPMsg
examples The other key is the PRU gel script is crucial there is a typo error
in the instructions about correct .gel file name and
GMT-0500 (CDT), 'Mark Lazarewicz' via
BeagleBoard wrote:
Hello Cheng
I learned a few things this weekend I thought I would share
The PRU Labs examples 1 to 3 can be loaded with CCS and JTAG from Windows 10
You can even debug both PRU0 and PRU1 at the same time examine memory and use
HW
Hello Cheng
I learned a few things this weekend I thought I would share
The PRU Labs examples 1 to 3 can be loaded with CCS and JTAG from Windows 10
You can even debug both PRU0 and PRU1 at the same time examine memory and use
HW uart debug to speed up development
The RPMSG example LAB must
will reproduce and post up the detail
in a separate post…
On Tue, May 4, 2021 at 5:20 PM 'Mark Lazarewicz' via BeagleBoard
wrote:
Cheng
Yes difference between the two Linux is why the E2E wants to know which Linux
you running.
Walter
Here is a shared RAM CCS JTAG PRU discussion but as Cheng stated
Cheng
Yes difference between the two Linux is why the E2E wants to know which Linux
you running.
Walter
Here is a shared RAM CCS JTAG PRU discussion but as Cheng stated the user is
using SDK Linux.
Perhaps the code examples will help you solve your freeze up. It's possible ARM
Linux is using
Walter
This below code you posted in another thread was what I was referring to. Does
the E2E forum support cloud 9 dev on BBB???
I'm also curious how you actually build/modify your Linux kernel with no Linux
box.
Walter Cromer wrote:changed the code to this and
get the same error.
fd = open
Walter
Yes I remember everything about your application including the Debian ARM
Linux application delays nobody seemed to have answers on fixing.
Your running windows 10 not using the SDK using cloud 9 and Debian as I
understand. What is E2E saying about your compiler errors your asking
# I did install Code Composer Studio (CCS) from #TI, but gave up on it.
There's no easy way to #transfer your compiled firmware to the BBB from #within
it according to TI.
Hi Walter
This doesn't look correct or sound like TI.JTAG loads code extremely fast
especially on the ARM. If you're
<< wrote:
Hey Mark,
Thanks for spending time for replying. I really appreciate it. I totally agree
with you that one should spend time investigating first. I apologize if they
are dumb questions, but I have stuck there for two weeks. I am more a circuit
guy and just started picking up
wrote: Hi Cheng
The tarball has step by step instructions for that example you mentioned in
initial post.you need that when starting out.
Why? because few in this group use SDK. Unfortunately you have no choice to
ask questions here.
When code doesn't work on ARM you will get advise to use
Hi Cheng
The tarball has step by step instructions for that example you mentioned in
initial post.you need that when starting out.
Why? because few in this group use SDK. Unfortunately you have no choice to
ask questions here.
When code doesn't work on ARM you will get advise to use cookbook
Cheng
I'm actually using the SDK now so be careful about generic advisethe
instructions are for Ubuntu not Debian'Since I had questions myself right now
I realized this PRU code you have just a small part of the SDKMy point was you
never read the SDK quick startPlease do so here is the doc
Hello
I know the code. It's all explained in the SDK documention. I also like these
examples.Your asking questions about an SDK that's supported by Texas
Instruments. You do understand this .org group you posted in may contain TI
employees but is NOT TI support it's Beagle board Debian.
I
Have you looked at libruio? it fix everything. free support as well in group
by TJ.
Sent from Yahoo Mail on Android
On Fri, Apr 23, 2021 at 4:31 PM,
pierrick.ra...@gadz.org wrote: Have you check M
Yoder PRU cookbook?
Pierrick Rauby
On 23 Apr 2021, at 16:56, Cheng Chen wrote:
Hi
Clock cycle's good subject. Seems some thinks everything PRU does is one clock
cycle ( 5ns) perhaps assembler instructions are. Also confusion about actual
speed of control loops.A 100ns control loop runs every 100ns and does input,
decisions and output that fast. Lastly the PRU has small
Hello Walter
Which TI PRU examples are you using I've seen so many examples I've lost
track. I've seen the archive that contains the labs1 to labs 6.
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On Wed, Apr 21, 2021 at 2:55 PM, Walter Cromer
wrote: Well the solution to the overflow was actually
This Might be helpful Justin
helpful
https://e2e.ti.com/support/processors/f/processors-forum/209489/am335x-iep-interrupt
#Or does it access the IEP clock over some bus
Page 14 the block diagram in PRU Sub system pdf shows what's local to PRU so I
would say not possible in one cycle. I also
Dump or print the quantity pointed at if you're intrigued to see if it's
correct.
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On Wed, Apr 21, 2021 at 8:13 AM, Walter Cromer
wrote: I'm working on that very thing. I fairly certain what is printing is
an address although it doesn't seem to correspond
Hello Walter
Not dumb you have done well I'm taking credit藍 for your sucess just kidding.I
saw a bunch of good examples somewhere maybe SDK.What was cool was they had PRU
code that used every peripheral possible from the PRU. Excellent starting
point the TI examples combined with Cookbook you
Hello Walter
I didn't see your definition of readBuf.why you expecting an address to change?
I am glad you found the TI examples helpful.
Mark
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On Tue, Apr 20, 2021 at 12:33 PM, Walter Cromer
wrote: I am using a Beaglebone Black and C to read analog inputs
of development
Mark
Sent from Yahoo Mail on Android
On Mon, Apr 19, 2021 at 11:22 AM, 'Mark Lazarewicz' via
BeagleBoard wrote: Hello Thomas
My experience is not only way
We pick the processor then the tools ( RTOS,JTAG. Compiler/ IDE if the stuff
doesn't work or if vendor's don't
Hello Thomas
My experience is not only way
We pick the processor then the tools ( RTOS,JTAG. Compiler/ IDE if the stuff
doesn't work or if vendor's don't support properly we don't use their product(
I determine this usually). Like you I expect answers 鸞
So pick chip, OS then architecture then
Sorry Chrome browser on windows this works for me
https://groups.google.com/g/beagleboard/c/-WlvGEaqrKU/m/EatslVHvCwAJ
On Friday, April 16, 2021, 01:51:00 PM CDT, 'Mark Lazarewicz' via
BeagleBoard wrote:
Hi Jeff
I have it open on my PC in gmail I'll send you a link to your personal
Hi Jeff
I have it open on my PC in gmail I'll send you a link to your personal email.
Strange stuff going on in my Yahoo client. And searching the group on Google
group's took me a few tries to find this so no your not crazy Jeff. Key words
seem important I'd imagine this group's archive is
Hello Walter
I think so nice novel approach. Since the 2nd PRU is started manualy from
command line in Linux you shouldnt get clobbered as thats what that memory is
for the PRU code and Resource Tables from my reading. Id guess address
translation is required. shared RAM could be used as
Hello TJF
Looks very powerful and code is very generic and well thought out. I thought
you couldn't code?藍
I'm on tablet forgive my laziness where are the ADC examples located in c
language if possible
Looks like you support multiple languages nice.
I'm guessing below reference you mentioned
Beaglebone Black SRM
Have not seen this can you share a link
Thanks
Mark
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On Thu, Apr 15, 2021 at 8:15 AM, Walter Cromer
wrote: I'm sticking with remoteproc for now. I spent most of yesterday
reading TI's documentation and the Beaglebone Black SRM in
- learn to read ADC values in RB mode (first from ARM side, then from PRU)
- learn to exchange data between ARM and PRU
- finally put all together in your PRU mainloop (perhaps test on ARM before)
Hello TJFI thought he had an unacceptable delay reading ADC from ARM?Just
That reference Dennis provided especially the block diagram showing everything
about both PRU have access to is essential and a good thing to really consume.
Note each PRU has instruction ram and data RAM.
Instruction ram is where a debugger or rproc loads your pru program.
Keep in mind any ADC
Walter
Just trying to be a guiding light. Why not get the control loop working on PRU
first.?
Your being pulled into to many directions. I know how that feels I've been
there.
Once the ADC and output works worry about getting Data over to ARM.
Too many new things will kill you. Master the PRU
Walter
Your best bet.
Run your whole control loop on the PRU that's as realtime as you get. Use a
foreground background loop. Use the ARM like a PC with Linux to access the
system via ethernet.
You could also run control on ARM without linux but this way you have all the
resources of Linux to
Look for a registrer similar name to ADC clk Ctrl in TRM under the ADC section.
That's looks like a C macro and it's writing 0x02 to that register. Macro
Probably defined in a header file.
the registers will have different offsets depending on ARM or PRU access
Perhaps revisit init code on
Hello TJF
Drop rproc, and use uio_pruss driver instead. Then data exchange is pretty
easy. Ie use DRam[0,1] for PRU-writing and SRam for ARM-writing. A simple and
effective concept to avoid writing collisions (and pretty fast as well).
uio_pruss driver provides pointers to that memory, while
I believe you will Walter
I just thought it prudent to mention doing some designs validation coding
first. I do think the the through put coding could be done quickly on ARM . If
you're doing the other code functions on PRU you mentioned your going to face
the learning curve anyway you asked
Plenty of data Walter thanks.
You could write some linux code that reads Data from from PRU ram( I'm not sure
if there's several ways to get Data beyond remote messaging and reading the
shared ram directly) factor in delay for new sample's to be updated from ADC
at least you could ensure that
Hi
??but I think the BBBw can easily sample at this rate, right?
Asking about ARM/linux side ? or
PRU side
Polling or Interrupt?
Explain you delay details at least delay duration and what your app does with
data would help.
The calculation I mentioned seeing people reply about were on the
I'd share your timing requirement needs I've seen people get help in here
before after doing this. search group. That way you don't spend time trying to
meet a goal not attainable on PRU.
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On Fri, Apr 9, 2021 at 10:19 AM, pierric...@gadz.org
wrote: Hi, I
1) Linux is not a real-time operating system (OS) in and of itself. ... “The
idea is to run critical applications like the control loop on VxWorks and then
run non-deterministic analytics on Linux.
Hard realtime apps like closed loop positioning used in pressing
plants,automation,fighter
s
vectors are in it. Start or start-up. Asm
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On Mon, Mar 8, 2021 at 9:56 AM, Graham Stott
wrote:
You could look at the TI starterware code for examples of setting up the
interrupt table and the code at the tables.
Graham
From: 'Mark Lazar
Lazarewicz' via BeagleBoard [mailto:beagleboard@googlegroups.com]
Sent: Sunday, March 07, 2021 12:30 PM
To: beagleboard@googlegroups.com
Subject: Re: [beagleboard] Re: BBB Setting up the Interrupt Vector Table
Your handler needs the keyword interrupt to save the registers so when the
vector
Your handler needs the keyword interrupt to save the registers so when the
vector occurs whatever was running isn't corrupted
Besides interrupt vector table don't forget exceptions they need a vector as
well as in bus error or address error
Here's a brief reference you should look for interrupt
ag monitor.
On Thu, 4 Mar 2021 at 18:41, 'Mark Lazarewicz' via BeagleBoard
wrote:
Hi Robert
That's good to know I saw the x15 7.0 BSPWhere you able to rebuild BSP sources
?And do they actually respond to support questions for educational users?
Looks like most of their revenue comes from a
ar 2021 at 18:41, 'Mark Lazarewicz' via BeagleBoard
wrote:
Hi Robert
That's good to know I saw the x15 7.0 BSPWhere you able to rebuild BSP sources
?And do they actually respond to support questions for educational users?
Looks like most of their revenue comes from automobile info
gineer think this through carefully so
Lucas is first. Then also drink some scotch
Regards
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On Thu, Mar 4, 2021 at 2:17 PM, 'Mark Lazarewicz' via
BeagleBoard wrote: I'm afraid their reply tells
me everything. Their website says they have it an
Lucas is first. Then also drink some scotch
Regards
Sent from Yahoo Mail on Android
On Thu, Mar 4, 2021 at 2:17 PM, 'Mark Lazarewicz' via
BeagleBoard wrote: I'm afraid their reply tells
me everything. Their website says they have it and they asked for $$$ for it so
it's not free
ore we start
with 7.0 we need the document above
On Wednesday, March 3, 2021, 12:58:16 PM CST, 'Mark Lazarewicz' via
BeagleBoard wrote:
These commands you entered are where? uboot?
--> fatload mmc 0 0x8100 prebuilt-bsp-ti-beaglebone.ifs--> go 0x8100
Why not
concerned this stuff you started with is
very old and probally not supported by Blackberry
You have to start simple and slowly and logically so be patient before we start
with 7.0 we need the document above
On Wednesday, March 3, 2021, 12:58:16 PM CST, 'Mark Lazarewicz' via
BeagleBoard wrote
Hi Robert
If my memory is correct support told him not to work with SP1Too many
discrepancies going on. Tool mismatches I'm also not sure if he's got paid
support or if that exist.?
I'm not surprised QNX left working binaries anybody can get that working and
that's pretty typical his issue is
The read me for the BSP zip files you attached go look at itIt says it's a QNX
6.50 BSP.See if you can get the latest BSP 7.0
Sent from Yahoo Mail on Android
On Thu, Mar 4, 2021 at 10:49 AM, Lucas SOLDA wrote:
I think the guide refers to this :
The BSP pdf you sent references another BSP user's guide can you find it?
Sent from Yahoo Mail on Android
On Thu, Mar 4, 2021 at 1:20 AM, Lucas SOLDA wrote:
Yes I entered these commands in u-boot, I could have automated them but I
prefer to write them for the moment.
"In theory if you
Let's start with some history about what rev board you have , what was on SD
before and whats in the emc now and details about tools you installed to build
BSP and QNX and exactly the BSP file's you are compiling as well as your goals.
Are you trying to eventually modify the BSP source?I'm
a mismatch
do you have access to BSP users guide? .
Sent from Yahoo Mail on Android
On Tue, Mar 2, 2021 at 5:24 PM, 'Mark Lazarewicz' via
BeagleBoard wrote: Hi Robert I think Lucas is
saying he's only trying to build the BSP not QNX.
I did this 10 years ago and I also had the latest BSP
Hi Robert I think Lucas is saying he's only trying to build the BSP not QNX.
I did this 10 years ago and I also had the latest BSP guides I tried getting
these and you need a customer login. It says it's free for education but again
BlackBerry bought this.
What's funny is this link below takes
Hi Fischer
what I meant to say is the AM57xx is definitely more complicated as there's
more cores and that will definitely break quickly without correctly modifying
the table for the DSP or M4.
There's absolutely no docs beyond the SDK and many people are not using SDK
they use the Debian
Hello Fischer
This file looks like it's processing the resource table
https://docs.huihoo.com/doxygen/linux/kernel/3.7/remoteproc__core_8c_source.html
* 804 * take a firmware and boot a remote processor with it. 805 */ 806
static int rproc_fw_boot(struct rproc *rproc, const struct
I remember sd card setup was important on Beagle board. your probably
following old or incorrect instructions. What was on this board could be
important. What instructions as well.They used to have a forum before
Blackberry bought them.
Sent from Yahoo Mail on Android
On Mon, Mar 1,
My last contribution hopefully I dont want to confuse people but I think this
is important
No matter which SOC you pick the TI DSP has access to on chip peripherals
Perhaps you been using a PRU UART,SPI,I2C
The good news is the DSP core can use and access these peripherals as well.
Its a much
To Debug and Test a DSP app on OMAP L138 dev kit using CCS and Jtag I used the
following guide.
Only one DSP core so its much easier to get up and running I used below
10.3.12. OMAP-L137/C6747 EVM Hardware Setup Guide
10.1. Target — Processor SDK RTOS Documentation
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10.1. Target —
Update for TI Soc using the DSP coreThe .TI DSP's are optomized for Signal
Processing very good skillset for industry used in military and medical and
avionics
The Omap L138 is another option to the Beagle X15 I tested the TEXAS
INSTRUMENTS OMAP-L138/C6748 LCDK-PCB-004 DSP+ARM Development
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